JPH0129461B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a data communication system, and in particular, the present invention relates to a data communication system, and in particular, the present invention relates to a data communication system, and in particular to a data communication system that uses a digital switching system that can perform immediate calls, stored call exchanges, and program execution in the same storage device. The present invention relates to a data communication method in which data processing, communication processing, and exchange processing are performed in the same device.

[Prior art]

Conventionally, when data processing and communication processing are performed by the same subscriber, extremely troublesome procedures and complicated equipment are used, and the exchange processing is performed at an exchange center before transmission to the other party.

FIG. 1 is an explanatory diagram of the operation of a switching network when performing multiple conventional processes.

For example, a subscriber at terminal 2 processes some data and sends the result to broadcast function 15 in exchange 10'.
If you want to send a message to the subscribers of terminals 3 and 3' using After (route),
Once again, the exchange 10' having the broadcast function 15 is accessed (route), and the broadcast function 15 allows the terminal 3,
The processing results are sent to each subscriber of 3' (route). As described above, in the conventional method, when transmitting the results after data processing, a large number of station equipment and relay lines are required, and the operating procedures for terminal subscribers are complicated. .

The inventors of the present invention previously proposed a digital switch (hereinafter referred to as an integrated switch) that is capable of executing immediate calls (circuit switching), stored calls (packet switching), and switching processing programs in the same storage device. (See the specification of Japanese Patent Application No. 58-99239, ``Digital Switching Machine'' filed on June 3, 1988). However, the above proposal does not mention the case where the terminal subscriber simultaneously performs data processing, communication processing, and exchange processing.

[Purpose of the invention]

It is an object of the present invention to eliminate the above-mentioned drawbacks of the conventional technology, to perform data processing, communication processing, and exchange processing on the same data all at once using the same device, and to eliminate the need for a relay line connecting the exchange and the calculation center. Another object of the present invention is to provide a data communication system that can significantly reduce the number of station facilities, etc. at each station and simplify the operating procedures for subscribers.

[Summary of the invention]

The data communication system of the present invention is a digital exchange equipped with a hierarchical storage device that includes a high-speed storage section that accepts access from a time-division multiplex transmission path and access from a program, and a low-speed storage section or file storage section. , it is determined whether the data sent from the originating terminal via the transmission path is immediate call data or data that requires processing and modification, and if it is immediate call data, the exchange program is・If the data involves changes, use the exchange program and processing/conversion program.
accessing the hierarchical configuration storage device by means of an immediate call address managed by an exchange program residing in the hierarchical configuration storage device, if the data is immediate call data to a called terminal; The data is immediately exchanged with the receiving terminal by the high-speed storage unit, and the data is sent to the receiving terminal via the transmission path, and if the data is data that requires processing or modification of the contents to the receiving terminal. , the first managed by said exchange program.
The hierarchical configuration storage device is accessed using the stored call address, and the data to be sent to the called terminal is stored in the low-speed storage section or file storage section in the hierarchical configuration storage device via the high-speed storage section, and the data to be sent to the called terminal is accessed via the high-speed storage section. The data stored in the first stored call address is processed and converted in the high-speed storage unit by a processing/conversion program existing in the device, and the data stored in the first stored call address is stored again in the hierarchical configuration storage device. storing at a second stored call address different from the first stored call address, and then accessing the hierarchical configuration storage device by the exchange program at the second stored call address,
Means is provided for reading data from a low-speed storage section or a file storage section in the hierarchical storage device to the receiving terminal via the high-speed storage section and transmitting the data to the receiving terminal via a transmission path. It is characterized by the fact that data processing/conversion and exchange processing between originating and receiving terminals are performed in the same device. Another feature of the data communication system is that the first stored call address and the second stored call address are the same.

[Embodiments of the invention]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 2 is a conceptual diagram showing the operating principle of the present invention.

As shown in FIG. 2, in this embodiment, an integrated switching system ( Using the above-mentioned digital exchange (1), data processing, communication processing, and switching processing are executed all at once by the same device of one station.

In FIG. 2, the same process as shown in FIG.
A case is shown in which the results are sent to subscribers of other terminals 3, 3' using the broadcast function of the exchange.

First, the subscriber at terminal 2 instructs the integrated exchange 1 to process certain data and broadcast the processing results to the subscribers at terminals 3 and 3' (route). The integrated exchange 1 processes the given data according to the instructions and sends the results to the terminals 3,
3' to each subscriber (route).

In this way, after data is processed using the same storage device of the integrated exchange 1, broadcast communication is also processed immediately, so the total processing time is shortened and only the route source is used. The operation procedure for the subscriber of the terminal 2 is simplified.

FIG. 3 is an internal block diagram of an integrated switch showing one embodiment of the present invention.

In FIG. 3, 1 is an integrated exchange, 2 is a calling terminal, 3 is a receiving terminal, 4 is a multiplexing device, and 11 is a high-speed storage unit (hereinafter referred to as cache memory) having an interface with a time division multiplex transmission line. , 12 is a main storage device having a data transfer path with the cache memory 11, 13 is a file storage device with a data transfer path with the main storage device 12, and 14 is the cache memory 11, the main storage device 12, and a file storage device. It is a processor that has an interface with 13, manages each of them, and executes programs. The cache memory 11 also has the function of storing a copy of the data in the main storage device 12, like the cache memory of a normal computer system, and management functions such as address conversion are performed by hardware. It will be realized.

In FIG. 3, the originating terminal 2 is the multiplexer 4
and the integrated exchange 1's cash
While transmitting the data to the memory 11, the processor 14 is notified of the processing details, the receiving terminal number, etc. The processor 14 processes the data stored in the cache memory 11 based on the notified processing details, returns the resulting data after the processing is completed to the cache memory 11, and transfers the data to the notified terminal number. It is sent to the terminal 3 via the multiplexer 4 via the line.

FIG. 4 is an explanatory diagram of the operation of the main memory device in FIG. 3.

FIG. 4 shows a state in which data sent from the originating terminal 2 is processed in the main storage device 12, and shows a case where a virtual storage space is used. A copy of the necessary data in the main storage device 12 is
They are automatically stored in cache memory 11 by hardware, so that accesses to main memory 12 are actually automatically converted to accesses to cache memory 11.

In FIG. 4, 121 is a receiving and transmitting buffer, 122 is an application program requested by the sending terminal 2, and 123 is a management program for managing the system.

First, when a call is set up from the calling terminal 2, the processor 14 allocates a buffer area 121 in the main memory 12. Next, data from the originating terminal 2 is stored in the allocated buffer area 121 in real time under hardware control (route). After all this data is stored,
The processor 14 sequentially reads and executes the application programs 122 requested by the originating terminal 2, and processes the data from the originating terminal 2 (route). After processing, the obtained result data is transferred to buffer area 1.
21 to the receiving terminal 3 in real time under hardware control (route). When performing this processing, the operation of the entire system is managed in an integrated manner by the processor 14 executing the management program 123 (path).

In the case of broadcasting, the management program 123 and processor 14 repeatedly read the same buffer contents to the hardware after the above processing is completed, based on a request from the calling terminal 2 at the time of call setup, and This is achieved by instructing 3 to transmit at the same time.

FIG. 5 is a flowchart showing the procedure when the processor accesses the cache memory (main storage device) in FIG. 4.

Two cache access cycles correspond to one time slot of the input/output line.
One of them can be used for exchange (immediate call, stored call) and the other one can be used for programming, and the exchange cycle is programmed only when the exchange cycle is empty and there is a program access request. It is possible to use it in For this reason, in FIG. 5, judgment functions of blocks 103 and 105 are provided. The purpose of using the cash cycle is
For each cache cycle, block 1 in Figure 5
03, 104, and 105, and in the case of an immediate call, an immediate call address generation 106
However, in the case of a stored call, the cache access 1 is performed immediately after processing of stored call address generation 107, virtual → real address conversion 108, and real → cache address conversion 109 is performed.
Do 10. In the case of a program, the same processing as the stored call is performed except that the stored call address generation 107 is omitted. When a new call is to be set up or disconnected, the request is notified by the control channel on the incoming line, so it is determined for each time slot of each incoming and outgoing line whether the time slot in question belongs to the control channel or not. Based on the control channel information, various initial settings and READY/
It is necessary to determine and notify BUSY. Therefore, in FIG. 5, blocks 100, 101, 1
02 functions are provided, and these functions are activated for each input/output line time slot.
3-110 are activated for each cache cycle. In Figure 5, if all steps cannot be processed in the same cache cycle due to the required processing speed, parts used, etc., each step is processed in a pipeline manner, starting from the determination of the purpose of use of the cache cycle. A configuration may also be adopted in which actual cache access is performed after a delay of two cache cycles. In this embodiment, pipeline processing is not performed to simplify the explanation, but pipeline processing is easily possible by installing various buffers.
Further, although a virtual storage method is adopted in this embodiment, even if this is not adopted, the embodiment of the present invention can be configured more easily than a normal file management method. In this case, in FIG. 5, the address conversion 108 becomes unnecessary, and the contents of the initial settings 102 are changed.

FIG. 6 shows the content block structure of the processor 14 in FIG. 4. The storage management mechanism () 401 in the figure is the block 100 in FIG.
~102, the cache cycle allocation mechanism 402 is implemented by blocks 103 to 105 in FIG. 5, the immediate call address generator 403 is implemented by block 106 in FIG. 5, and the stored call address generator 404 is implemented by block 10 in FIG.
7. Storage management mechanism ( ) 405 realizes the mechanism of block 108 in FIG. 5, and cache access management mechanism 406 realizes the mechanism of block 109 in FIG. 5, respectively. A program control unit is required to realize the functions of the storage management mechanisms ( ) 401 and ( ) 405 . A memory access request for running a program on the processor 14 is
All processing is performed via the cache cycle allocation mechanism 402, and is processed between immediate call processing and stored call processing using the program cache cycle shown in FIG.

The * mark from the program control unit indicates processor memory access, the ** mark indicates various control information, and the *** mark from the storage management mechanism ( ) 401 indicates READY/BUSY input to the signal transmission/reception circuit 17.
The signals are shown respectively. In addition, the white arrow in Figure 6 is a virtual address, the diagonal arrow is a real address,
Each black arrow indicates a cache address.
From the signal transmission/reception circuit 7 to the storage management mechanism () 401
When there is a call setup/disconnection request in
Executes READY/
At the same time as sending the BUSY signal, the initial value setting signal and line control information are sent to the cache cycle allocation mechanism 402, immediate call address generator 403, and stored call address generator 404, and the storage management table update signal is sent to the storage management mechanism ( ) 405. The cache cycle allocation mechanism 402 accepts processor memory access according to the timing from the clock, sends a program cycle access order to the memory management mechanism () 405, and
It also receives line control information and performs immediate call cycles.
Immediate call address generator 403 sends the access order and stored call cycle access order to stored call address generator 404, respectively. The instant call address generator 403 directly accesses the cache memory 11 using the cache address.
The stored call address generator 404 sends the virtual address to the storage management mechanism ( ) 405, and
After performing real address conversion and further sending the real address to the cache access management mechanism 406 to perform real cache address conversion, the cache memory 11 is accessed. Memory management mechanism ()4
05 activates the file storage unit 13 with a file access order.

〔Effect of the invention〕

As explained above, according to the present invention, data processing, communication processing, and switching processing can be carried out at once by using a digital switch that can exchange instant calls, stored calls, and run programs in the same storage device. Since the system can be executed by the same device, it is possible to significantly reduce the number of relay lines between the switching center and the calculation center and the number of station facilities at each station, and to simplify the operating procedures for terminal subscribers.

[Brief explanation of drawings]

Fig. 1 is an explanatory diagram of multiple processing in a conventional switching network, Fig. 2 is a conceptual diagram showing the operating principle of the present invention, Fig. 3 is an internal block diagram of an integrated exchange showing an embodiment of the present invention, and Fig. 4 5 is a flowchart of the memory access shown in FIG. 4, and FIG. 6 is an internal block diagram of the processor shown in FIG. 4. 1: integrated exchange, 2: originating terminal, 3, 3': receiving terminal, 4: multiplexer, 5: computer center, 1
1: cache memory, 12: main memory, 1
3: File storage device, 14: Processor, 12
1: Transmission/reception buffer, 122: Application program,
123: Management program.

Claims (1)

[Scope of Claims] 1. In a digital exchange equipped with a hierarchical storage device that includes a high-speed storage section that accepts access from a time division multiplex transmission path and access from a program, and a low-speed storage section or a file storage section. , determines whether the data sent from the originating terminal via the transmission path is immediate call data or data that requires processing and modification, and if it is immediate call data, the exchange program If the data is subject to change, an exchange program and processing
means for respectively activating a conversion program, and when the data is immediate call data to a called terminal, the hierarchical configuration storage device is configured to execute a conversion program according to an immediate call address managed by an exchange program residing in the hierarchical configuration storage device. accessing the device and performing an immediate exchange to the incoming terminal using the high-speed storage unit;
Data is sent to the receiving terminal via a transmission path, and if the data involves processing or modification of the content to the receiving terminal, the data is sent to the receiving terminal using the first stored call address managed by the exchange program. Accessing the hierarchical configuration storage device, storing data to be sent to the receiving terminal in a low-speed storage unit or file storage unit in the hierarchical configuration storage device via the high-speed storage unit, and processing existing in the hierarchical configuration storage device. - The data stored in the first stored call address by the conversion program is processed and converted in the high speed storage unit, and is stored again in the hierarchical configuration storage device as the first stored call address managed by the exchange program. Accumulation is performed using a different second stored call address, and then the hierarchical configuration storage device is accessed by the exchange program using the second stored call address, and the A means is provided for reading data to the receiving terminal via the high-speed storage section and transmitting the data to the receiving terminal via the transmission path, and processing and conversion of data from the calling terminal and exchange processing between the sending and receiving terminals are performed in the same device. A data communication method that is characterized by being integrated. 2. The data communication system according to claim 1, wherein the first stored call address and the second stored call address are the same.