JPH01291589A - Automatic gain control circuit - Google Patents
Automatic gain control circuitInfo
- Publication number
- JPH01291589A JPH01291589A JP63121013A JP12101388A JPH01291589A JP H01291589 A JPH01291589 A JP H01291589A JP 63121013 A JP63121013 A JP 63121013A JP 12101388 A JP12101388 A JP 12101388A JP H01291589 A JPH01291589 A JP H01291589A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- gain
- variable amplifier
- change rate
- frequency
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 claims description 5
- 230000003321 amplification Effects 0.000 abstract description 9
- 238000003199 nucleic acid amplification method Methods 0.000 abstract description 9
- 230000007257 malfunction Effects 0.000 abstract description 5
- 230000002159 abnormal effect Effects 0.000 abstract 2
- 238000010586 diagram Methods 0.000 description 5
- 230000005856 abnormality Effects 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000000034 method Methods 0.000 description 1
Landscapes
- Control Of Amplification And Gain Control (AREA)
- Television Signal Processing For Recording (AREA)
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明は、磁気記録再生装置、例えばVTRにおける再
生時の自動利得制御(AGC)回路に関するものである
。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to an automatic gain control (AGC) circuit during reproduction in a magnetic recording and reproducing apparatus, such as a VTR.
従来の技術
従来、VTRの色信号再生回路は、第2図に示すような
構成であった。第2図において低域変換さされた信号は
再生され、端子Aより可変増幅器1に入力し、復調回路
2でテレビ信号の搬送周波数、例えば、NTSC方式で
は3.579545M Ilzに戻される。復調時に同
時に発生した不要周波数成分を除去するため、周波数選
別器3として、搬送周波数を通すバンドパスフィルタを
通し、端子Cに現れる復調信号で、AGCのためのレベ
ル検出が検出器4でなされ、その結果で利得調整回路5
で定められた値で可変増幅器1が動作する。2. Description of the Related Art Conventionally, a color signal reproducing circuit for a VTR has had a configuration as shown in FIG. In FIG. 2, the low-frequency converted signal is regenerated, inputted to the variable amplifier 1 from the terminal A, and returned to the carrier frequency of the television signal, for example, 3.579545M Ilz in the NTSC system, by the demodulation circuit 2. In order to remove unnecessary frequency components generated at the same time during demodulation, the demodulated signal is passed through a bandpass filter that passes the carrier frequency as a frequency selector 3, and level detection for AGC is performed by a detector 4 using the demodulated signal appearing at the terminal C. As a result, the gain adjustment circuit 5
The variable amplifier 1 operates with the value determined by .
復調回路2で使用する信号を作成するため、端子Cの復
調信号は、端子Bから入力される搬送波基準周波数と位
相比較器6で比較され、その結果、発振器7の周波数が
調整され、低域変換方式に応じた復調周波数作成回路8
により信号が作られる。第3図は各状態(a) 、 (
b) 、 (e) 、 (d)における記号模式図であ
る。In order to create a signal to be used in the demodulation circuit 2, the demodulated signal at the terminal C is compared with the carrier wave reference frequency input from the terminal B at the phase comparator 6, and as a result, the frequency of the oscillator 7 is adjusted and the low frequency Demodulation frequency generation circuit 8 according to the conversion method
A signal is created by Figure 3 shows each state (a), (
It is a symbol schematic diagram in b), (e), and (d).
これらの動作により色信号の復調と復調における振幅の
一定化、構成要素によるばらつきが吸収される。These operations demodulate the color signal, stabilize the amplitude in the demodulation, and absorb variations due to components.
発明が解決しようとする課題
このような従来の構成では、復調のためのPLL回路9
が正常に動作をしていないVTRの使用状態が発生した
り、再生速度を変える特殊再生時等において、RLL回
路が時間的に不安定な時間を含む場合に、周波数選別器
3の出力振幅が小さくなり、その結果、AGCループと
しては可変増幅器1の増幅率を太き(する様に動作する
。これを第3図(b)に示す。しかし、ずれ量が大きす
ぎた場合、第3図(C)に示す様に、可変増幅器等のダ
イナミックレンジを越し、振幅制限を受け、波形として
歪んでしまう問題点があった。この様にダイナミックレ
ンジを越す場合には、波形異状となり、PLLループに
も影響を与え、復帰に時間を要したり、誤動作の安定状
態になり復帰できないことが発生する。特に信号処理を
A/D変換をし、デジタル信号処理を行なう場合、非常
に問題となる。Problems to be Solved by the Invention In such a conventional configuration, the PLL circuit 9 for demodulation
If the RLL circuit includes a temporally unstable period, such as when the VTR is not operating normally or during special playback where the playback speed is changed, the output amplitude of the frequency selector 3 may change. As a result, the AGC loop operates to increase the amplification factor of the variable amplifier 1. This is shown in Figure 3 (b). However, if the amount of deviation is too large, the amplification factor of the variable amplifier 1 increases. As shown in (C), there is a problem in that the dynamic range of a variable amplifier, etc. is exceeded, the amplitude is limited, and the waveform is distorted.When the dynamic range is exceeded in this way, waveform abnormalities occur, and the PLL loop This can cause a long time to recover, or a stable state of malfunction may occur that cannot be recovered.This is a serious problem, especially when signal processing involves A/D conversion and digital signal processing. .
本発明はこのような問題点を解決するもので、PLLの
動作異状を検出し、AGC回路の可変増幅器の増幅率を
一定の幅に制限し、各構成要素でのダイナミックレンジ
を越えた出力が各構成要素で発生しないようにすること
を目的とするものである。The present invention solves these problems by detecting abnormalities in PLL operation, limiting the amplification factor of the variable amplifier of the AGC circuit to a certain range, and preventing outputs exceeding the dynamic range of each component. The purpose is to prevent this from occurring in each component.
課題を解決するための手段
この問題点を解決するために本発明は、復調回路におけ
る復調処理信号を発生するPLL回路の発振器の周波数
を周波数検知器で判別し、異状動作時には、利得制限回
路において、可変増幅器ま、たは、利得調整回路の増幅
率に一定の制限を与えるか、もしくは、可変増幅器の増
幅率を一定にしたものである。Means for Solving the Problem In order to solve this problem, the present invention uses a frequency detector to determine the frequency of the oscillator of the PLL circuit that generates the demodulated signal in the demodulation circuit. , the amplification factor of the variable amplifier or the gain adjustment circuit is set to a certain limit, or the amplification factor of the variable amplifier is made constant.
作用
この構成により、PLL回路でのずれ量が大きい場合で
も、AGC回路における増幅率に制限が与えられ、各構
成要素で波形歪や誤動作が発生することを防止すること
になる。Effect: With this configuration, even if the amount of deviation in the PLL circuit is large, the amplification factor in the AGC circuit is limited, thereby preventing waveform distortion or malfunction from occurring in each component.
実施例
第1図は本発明の一実施例によるVTRの色信号処理回
路のAGC回路図であり、第1図において、周波数検知
器10による利得変化率制限回路11は、直接に、可変
増幅器1に作用してもいいし、また利得変化率制限回路
11は利得調整回路5に作用してもよい。また利得変化
率制限回路は、利得調整回路5と同一回路に構成するこ
とも可能である。利得変化率制限回路11における利得
制限は、ある制限幅を持つことも一定利得に固定するこ
とも可能である。Embodiment FIG. 1 is an AGC circuit diagram of a color signal processing circuit of a VTR according to an embodiment of the present invention. In FIG. Alternatively, the gain change rate limiting circuit 11 may act on the gain adjustment circuit 5. Further, the gain change rate limiting circuit can also be configured in the same circuit as the gain adjustment circuit 5. The gain limit in the gain change rate limiting circuit 11 can have a certain limit width or can be fixed to a constant gain.
発明の効果
以上のように本発明によれば、AGC回路において、ダ
イナミックレンジオーバーによる収れん時間がかかった
ことの改善と、誤動作の防止に役立つ。特に映像信号を
デジタル処理する場合、誤動作の防止と、A/D変換器
のビット数の余裕度向上に役立ち、ダイナミックレンジ
の有効利用に役立つという効果が得られる。Effects of the Invention As described above, the present invention is useful for improving the time required for convergence due to dynamic range overflow in an AGC circuit, and for preventing malfunctions. Particularly when digitally processing a video signal, it is useful to prevent malfunctions, increase the margin of bit number of the A/D converter, and effectively utilize the dynamic range.
第1図は本発明の一実施例によるAGC回路を示すブロ
ック図、第2図は従来のAGC回路を示すブロック図、
第3図は各状態(a)〜(d)における信号模式図であ
る。
1・・・・・・可変増幅器、2・・・・・・復調回路、
3・・・・・・周波数選別器、4・・・・・・レベル検
出器、5・・・・・・利得調整器、6・・・・・・位相
比較器、7・・・・・・発振器、8・・・・・・復調周
波数作成器、9・・・・・・PLL回路、10・・・・
・・周波数検知器、11・・・・・・利得変化率制限回
路、A・・・・・・再生信号入力端子、B・・・・・・
基準周波数入力端子、C・・・・・・再生出力端子。
代理人の氏名 弁理士 中尾敏男 ばか1名第1図
第2図
第3図FIG. 1 is a block diagram showing an AGC circuit according to an embodiment of the present invention, FIG. 2 is a block diagram showing a conventional AGC circuit,
FIG. 3 is a schematic diagram of signals in each state (a) to (d). 1... variable amplifier, 2... demodulation circuit,
3... Frequency selector, 4... Level detector, 5... Gain adjuster, 6... Phase comparator, 7... - Oscillator, 8... Demodulation frequency generator, 9... PLL circuit, 10...
...Frequency detector, 11...Gain change rate limiting circuit, A...Reproduction signal input terminal, B...
Reference frequency input terminal, C...Reproduction output terminal. Name of agent Patent attorney Toshio Nakao One idiot Figure 1 Figure 2 Figure 3
Claims (1)
発振器および復調周波数作成器を有するPLL回路と、
前記発振器の信号を検知する周波数検知回路と、この検
知信号で制御される利得変化幅制限回路と、前記周波数
選別器の信号を検出するレベル検出回路およびこのレベ
ル検出回路の信号で制御される利得調整回路とをそなえ
て、前記利得変化幅制限回路と前記利得調整回路とを前
記可変増幅器に結合したことを特徴とする自動利得制御
回路。Variable amplifier, demodulation circuit, frequency selector, phase comparator,
a PLL circuit having an oscillator and a demodulation frequency generator;
a frequency detection circuit that detects the signal of the oscillator, a gain change width limiting circuit that is controlled by this detection signal, a level detection circuit that detects the signal of the frequency selector, and a gain that is controlled by the signal of this level detection circuit. An automatic gain control circuit comprising: an adjustment circuit, the gain change width limiting circuit and the gain adjustment circuit being coupled to the variable amplifier.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63121013A JPH01291589A (en) | 1988-05-18 | 1988-05-18 | Automatic gain control circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63121013A JPH01291589A (en) | 1988-05-18 | 1988-05-18 | Automatic gain control circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH01291589A true JPH01291589A (en) | 1989-11-24 |
Family
ID=14800646
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP63121013A Pending JPH01291589A (en) | 1988-05-18 | 1988-05-18 | Automatic gain control circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH01291589A (en) |
-
1988
- 1988-05-18 JP JP63121013A patent/JPH01291589A/en active Pending
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