JPH01284102A - Hybrid integrated circuit device - Google Patents

Hybrid integrated circuit device

Info

Publication number
JPH01284102A
JPH01284102A JP11585088A JP11585088A JPH01284102A JP H01284102 A JPH01284102 A JP H01284102A JP 11585088 A JP11585088 A JP 11585088A JP 11585088 A JP11585088 A JP 11585088A JP H01284102 A JPH01284102 A JP H01284102A
Authority
JP
Japan
Prior art keywords
high frequency
integrated circuit
hybrid integrated
circuit device
circuit pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11585088A
Other languages
Japanese (ja)
Inventor
Junichi Kono
淳一 河野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP11585088A priority Critical patent/JPH01284102A/en
Publication of JPH01284102A publication Critical patent/JPH01284102A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for

Landscapes

  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Abstract

PURPOSE:To enable the postadjustment of a high frequency characteristic by providing a microconductor antenna for adjustment on a circuit pattern. CONSTITUTION:A high frequency circuit is constituted of the circuit pattern formed on the upper surface of an insulating substrate 1 and packaged electronic parts 2. Besides, electric input output terminals 3 and the microconductor antenna 4 installed on the circuit pattern on the insulating substrate 1 are provided. In this case, by fine-controlling respectively the fitting angle and the line length of the microantenna 4, the influence of an electromagnetic field or parasitic capacity can be lessened.

Description

【発明の詳細な説明】 〔産業上の利用分野１ 本発明は混成集積回路装置に関し、特に高周波用混成集
積回路装置に関する。DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application 1] The present invention relates to a hybrid integrated circuit device, and particularly to a high frequency hybrid integrated circuit device.

〔従来の技術〕[Conventional technology]

従来、比較的高周波を扱う混成集積回路装置では、基板
上に形成する回路パターンの引きまわし、が回路全体の
特性に大きな影響をおよぼすので、誘導、寄生容量、誘
電体の誘電率、電磁界等、各種の要因を考慮しつつ、パ
ターン設計がなされている。Conventionally, in hybrid integrated circuit devices that handle relatively high frequencies, the routing of the circuit pattern formed on the board has a large effect on the characteristics of the entire circuit, so it is important to consider factors such as induction, parasitic capacitance, dielectric constant of dielectric material, electromagnetic field, etc. , the pattern is designed taking various factors into consideration.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

しかしながら、上述した従来の混成集積回路装置の設計
技術では、高周波特性に関するかぎりその回路特性を把
握できず、設計後の評価で思うような特性が得られなか
ったり、或いは部品等のバラツキにより特性が変化する
ことがある。従って、特に高周波特性に対する調整回路
を設けない限り設計通りの回路装置を得ることは困難で
ある。However, with the conventional hybrid integrated circuit device design technology described above, it is not possible to grasp the circuit characteristics as far as high frequency characteristics are concerned, and the expected characteristics may not be obtained in post-design evaluation, or the characteristics may be deteriorated due to variations in components, etc. Subject to change. Therefore, it is difficult to obtain a circuit device as designed unless an adjustment circuit particularly for high frequency characteristics is provided.

本発明の目的は、上記の情況に鑑み、高周波特性に対す
る事後調整手段を備えた混成集積回路装置を提供するこ
とである。SUMMARY OF THE INVENTION In view of the above circumstances, an object of the present invention is to provide a hybrid integrated circuit device having post-adjustment means for high frequency characteristics.

〔課題を解決するための手段〕[Means to solve the problem]

本発明によれば、混成集積回路装置は、絶縁基板と、前
記絶縁基板上に高周波回路を構成する回路パターンおよ
び電子部品と、前記回路パターン上に設けられる高周波
特性調整用の微小導体アンテナとを含んで構成される。According to the present invention, a hybrid integrated circuit device includes an insulating substrate, a circuit pattern and electronic components that constitute a high frequency circuit on the insulating substrate, and a microconductor antenna for adjusting high frequency characteristics provided on the circuit pattern. It consists of:

〔実施例〕〔Example〕

以下図面を参照して本発明の詳細な説明する。 The present invention will be described in detail below with reference to the drawings.

第１図は本発明の一実施例を示す混成集積回路装置の斜
視図である。本実施例によれば、本発明の混成集積回路
装置は、上面に回路パターンを形成し、実装される電子
部品２とにより高周波回路を構成して搭載する絶縁基板
１と、絶縁基板１上からひき出される電気的入出力端子
３と、絶縁基板１．Ｆの回路パターンに設けられた高周
波特性調整用の微小導体アンテナ４とを含む。本実施例
によねば、アンテナ４は電磁界および寄生容量の影響を
電気的にとり除き高周波回路の特性を改善するため、取
付角度および長さ等が微調整される。FIG. 1 is a perspective view of a hybrid integrated circuit device showing one embodiment of the present invention. According to this embodiment, the hybrid integrated circuit device of the present invention includes an insulating substrate 1 on which a circuit pattern is formed on the upper surface and an electronic component 2 to be mounted to form a high-frequency circuit. The electrical input/output terminal 3 and the insulating substrate 1. It includes a micro conductor antenna 4 for adjusting high frequency characteristics provided in the circuit pattern F. According to this embodiment, the mounting angle, length, etc. of the antenna 4 are finely adjusted in order to electrically remove the effects of electromagnetic fields and parasitic capacitance and improve the characteristics of the high frequency circuit.

〔発明の効果〕〔Effect of the invention〕

以上説明したように、本発明によれば、混成集積回路装
置の回路パターン上には導電体からなる微少アンテナが
設けられ、取付角度および線路長をそれぞれ微調整する
ことにより電磁界や寄生容量の影響を少なくできるなめ
、高周波特性の良い混成集積回路装置を提供することが
できる。As explained above, according to the present invention, a minute antenna made of a conductor is provided on the circuit pattern of a hybrid integrated circuit device, and the electromagnetic field and parasitic capacitance are reduced by finely adjusting the installation angle and line length. Since the influence can be reduced, a hybrid integrated circuit device with good high frequency characteristics can be provided.

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は本発明の一実施例を示す混成集積回路装置の斜
視図である。 １・・・絶縁基板、２・・・電子部品１．３・・・電気
的入出力端子、４・・・微小導体アンテナ。 −−一、ノFIG. 1 is a perspective view of a hybrid integrated circuit device showing one embodiment of the present invention. DESCRIPTION OF SYMBOLS 1... Insulating substrate, 2... Electronic component 1.3... Electrical input/output terminal, 4... Micro conductor antenna. --1, no

Claims (1)

【特許請求の範囲】[Claims] 絶縁基板と、前記絶縁基板上に高周波回路を構成する回
路パターンおよび電子部品と、前記回路パターン上に設
けられる高周波特性調整用の微小導体アンテナとを含む
ことを特徴とする混成集積回路装置。A hybrid integrated circuit device comprising: an insulating substrate; a circuit pattern and electronic components forming a high frequency circuit on the insulating substrate; and a microconductor antenna for adjusting high frequency characteristics provided on the circuit pattern.
JP11585088A 1988-05-11 1988-05-11 Hybrid integrated circuit device Pending JPH01284102A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11585088A JPH01284102A (en) 1988-05-11 1988-05-11 Hybrid integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11585088A JPH01284102A (en) 1988-05-11 1988-05-11 Hybrid integrated circuit device

Publications (1)

Publication Number Publication Date
JPH01284102A true JPH01284102A (en) 1989-11-15

Family

ID=14672684

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11585088A Pending JPH01284102A (en) 1988-05-11 1988-05-11 Hybrid integrated circuit device

Country Status (1)

Country Link
JP (1) JPH01284102A (en)

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