JPH01280371A - Semiconductor substrate having superconductor layer - Google Patents
Semiconductor substrate having superconductor layerInfo
- Publication number
- JPH01280371A JPH01280371A JP63110014A JP11001488A JPH01280371A JP H01280371 A JPH01280371 A JP H01280371A JP 63110014 A JP63110014 A JP 63110014A JP 11001488 A JP11001488 A JP 11001488A JP H01280371 A JPH01280371 A JP H01280371A
- Authority
- JP
- Japan
- Prior art keywords
- buffer layer
- composite oxide
- semiconductor
- substrate
- oxide superconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 55
- 239000002887 superconductor Substances 0.000 title claims abstract description 55
- 239000000758 substrate Substances 0.000 title claims abstract description 45
- 239000013078 crystal Substances 0.000 claims abstract description 37
- 239000002131 composite material Substances 0.000 claims abstract description 34
- 239000010409 thin film Substances 0.000 claims abstract description 9
- MCMNRKCIXSYSNV-UHFFFAOYSA-N Zirconium dioxide Chemical compound O=[Zr]=O MCMNRKCIXSYSNV-UHFFFAOYSA-N 0.000 abstract description 22
- 238000000034 method Methods 0.000 abstract description 9
- 238000004544 sputter deposition Methods 0.000 abstract description 6
- 238000001451 molecular beam epitaxy Methods 0.000 abstract description 4
- 239000010408 film Substances 0.000 abstract description 3
- 238000007733 ion plating Methods 0.000 abstract 2
- 239000000463 material Substances 0.000 description 13
- 239000000843 powder Substances 0.000 description 7
- 230000000737 periodic effect Effects 0.000 description 6
- 229910052751 metal Inorganic materials 0.000 description 5
- 239000002184 metal Substances 0.000 description 5
- 238000007740 vapor deposition Methods 0.000 description 5
- 229910000530 Gallium indium arsenide Inorganic materials 0.000 description 3
- 239000002784 hot electron Substances 0.000 description 3
- 238000005422 blasting Methods 0.000 description 2
- RKTYLMNFRDHKIL-UHFFFAOYSA-N copper;5,10,15,20-tetraphenylporphyrin-22,24-diide Chemical group [Cu+2].C1=CC(C(=C2C=CC([N-]2)=C(C=2C=CC=CC=2)C=2C=CC(N=2)=C(C=2C=CC=CC=2)C2=CC=C3[N-]2)C=2C=CC=CC=2)=NC1=C3C1=CC=CC=C1 RKTYLMNFRDHKIL-UHFFFAOYSA-N 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000010354 integration Effects 0.000 description 2
- 150000002500 ions Chemical class 0.000 description 2
- 229910052747 lanthanoid Inorganic materials 0.000 description 2
- 150000002602 lanthanoids Chemical class 0.000 description 2
- 239000012071 phase Substances 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 239000012808 vapor phase Substances 0.000 description 2
- 229910052727 yttrium Inorganic materials 0.000 description 2
- 229910052684 Cerium Inorganic materials 0.000 description 1
- 229910052688 Gadolinium Inorganic materials 0.000 description 1
- 229910052689 Holmium Inorganic materials 0.000 description 1
- 240000002329 Inga feuillei Species 0.000 description 1
- 229910052765 Lutetium Inorganic materials 0.000 description 1
- 229910052769 Ytterbium Inorganic materials 0.000 description 1
- 229910052797 bismuth Inorganic materials 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 229910052746 lanthanum Inorganic materials 0.000 description 1
- 238000001755 magnetron sputter deposition Methods 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 230000000704 physical effect Effects 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
- 229910052706 scandium Inorganic materials 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 238000005245 sintering Methods 0.000 description 1
- 229910021521 yttrium barium copper oxide Inorganic materials 0.000 description 1
Classifications
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E40/00—Technologies for an efficient electrical power generation, transmission or distribution
- Y02E40/60—Superconducting electric elements or equipment; Power systems integrating superconducting elements or equipment
Landscapes
- Superconductors And Manufacturing Methods Therefor (AREA)
- Inorganic Compounds Of Heavy Metals (AREA)
- Crystals, And After-Treatments Of Crystals (AREA)
- Physical Vapour Deposition (AREA)
- Chemical Vapour Deposition (AREA)
- Containers, Films, And Cooling For Superconductive Devices (AREA)
- Recrystallisation Techniques (AREA)
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明は、半導体基板に関する。より詳細には、少なく
とも１層の超電導体層を有する半導体単結晶基板に関す
るものである。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to semiconductor substrates. More specifically, the present invention relates to a semiconductor single crystal substrate having at least one superconductor layer.
本発明の半導体基板は上記超電導体層を半導体集積回路
の線材料として用いるだけで無く、上記超電導体にジョ
セフソン結合を形成したジョセフソン素子あるいは超電
導体と半導体とを組み合わせた超電導トランジスタやホ
ットエレクトロントランジスタ等の素子の材料として用
いることができる。The semiconductor substrate of the present invention not only uses the superconductor layer as a line material for a semiconductor integrated circuit, but also a Josephson element in which a Josephson bond is formed in the superconductor, a superconducting transistor in which a superconductor and a semiconductor are combined, and a hot electron It can be used as a material for elements such as transistors.
従来の技術
従来の半導体集積回路はシリコン等の半導体単結晶基板
上に絶縁膜を形成してパターニングを施し、熱拡散、イ
オン注入等で不純物をドープすることにより必要な素子
を作製し、金属を蒸着させて配線している。Conventional technology Conventional semiconductor integrated circuits are made by forming an insulating film on a semiconductor single crystal substrate such as silicon, patterning it, doping with impurities by thermal diffusion, ion implantation, etc. to fabricate the necessary elements, and then metal. Wiring is done by vapor deposition.
上記金属配線パターンは、蒸着で形成されるため断面積
が非常に微小となり、信号電流のロスがあった。Since the metal wiring pattern is formed by vapor deposition, its cross-sectional area is extremely small, resulting in loss of signal current.
また、超電導体と半導体とを組み合わせた超電導トラン
ジスタやホットエレクトロントランジスタ等の集積回路
素子は概念的には提案されているが複合酸化物超電導材
料を具体的に用いたものは作製されていない。Furthermore, although integrated circuit elements such as superconducting transistors and hot electron transistors that combine superconductors and semiconductors have been conceptually proposed, none have been manufactured using composite oxide superconducting materials specifically.
発明が解決しようとする課題
半導体集積回路の金属配線パターンは、蒸着等で形成さ
れるため断面積が微小で信号電流のロスが避けられなか
った。また、半導体集積回路の動作速度を向上させるに
は、素子そのものの動作速度を向上させることも重要で
あるが、配線における信号伝播速度を向上させることも
必要である。Problems to be Solved by the Invention The metal wiring patterns of semiconductor integrated circuits are formed by vapor deposition or the like, so their cross-sectional area is minute, and loss of signal current is unavoidable. Furthermore, in order to improve the operating speed of a semiconductor integrated circuit, it is important to improve the operating speed of the element itself, but it is also necessary to improve the signal propagation speed in wiring.
ところが、従来の半導体集積回路では配線部分における
ロスのため信号伝播速度を向上させるのに限界があった
。また、配線部分におけるロスのため素子の集積度があ
がり高密度化が進むと、消費電力が上昇し、それに伴う
発熱のため集積度の限界も自ずから決まってしまってい
た。However, in conventional semiconductor integrated circuits, there is a limit to improving the signal propagation speed due to loss in the wiring portion. Furthermore, as the degree of integration of elements increases due to loss in wiring portions and density increases, power consumption increases, and the heat generated thereby naturally limits the degree of integration.
さらに、超電導体と半導体とを組み合わせた超電導トラ
ンジスタやホットエレクトロントランジスタ、ＦＥＴ等
の素子を形成する場合には半導体単結晶基板上に超電導
材料の層を均一に形成した基板が必須であるが、従来の
Ｎｔ］系の超電導材料では半導体基板上に超電導材料の
層を均一に形成したものはなかった。また、金属系超電
導体は、臨界温度が低く実用的でなかった。Furthermore, when forming elements such as superconducting transistors, hot electron transistors, and FETs that combine superconductors and semiconductors, a substrate with a uniform layer of superconducting material formed on a semiconductor single crystal substrate is essential. There is no Nt]-based superconducting material in which a layer of superconducting material is uniformly formed on a semiconductor substrate. Furthermore, metal-based superconductors have low critical temperatures and are not practical.
本発明の目的は、上記の問題を解決して半導体単結晶基
板上に、臨界温度を始めとする超電導特性が優れた複合
酸化物超電導体薄膜層を有する半導体基板を提供するこ
とにある。An object of the present invention is to solve the above problems and provide a semiconductor substrate having a composite oxide superconductor thin film layer having excellent superconducting properties including critical temperature on a semiconductor single crystal substrate.
課題を解決するための手段
本発明に従うと、ＩｎＧａＡｓ Ｐ単結晶上に形成され
ている１ｒＯ２またはＭｇＯからなるバッファ層を具備
する基板上に、複合酸化物超電導体よりなる薄膜層が形
成されていることを特徴とする超電導体層を有する半導
体基板が提供される。Means for Solving the Problems According to the present invention, a thin film layer made of a composite oxide superconductor is formed on a substrate provided with a buffer layer made of 1rO2 or MgO formed on an InGaAsP single crystal. A semiconductor substrate having a superconductor layer characterized by the following is provided.
本発明においては、上記ＺｒＯ□またはＭｇＯのバッフ
ァ層の厚さは、５０〜１０００人であることが好ましい
。また、上記２ｒＯ□または！、Ｉｇｏのバッファ層の
結晶構造は以下のいずれかであることが好ましい。In the present invention, the thickness of the ZrO□ or MgO buffer layer is preferably 50 to 1000. Also, the above 2rO□ or! , the crystal structure of the Igo buffer layer is preferably one of the following.
１、 ＺｒＯ２マたはＭｇＯバッファ層がアモルファス
構造であること。1. The ZrO2 material or MgO buffer layer has an amorphous structure.
２、ＺｒＣｈバッファ層が正方晶であって、（１（ｉｏ
）面が表面となる配向性を有するか、または（１００）
面が表面となる単結晶であること。2. The ZrCh buffer layer is tetragonal and (1(io
) has an orientation such that the plane is the surface, or (100)
Must be a single crystal with a surface as the surface.
３．２ｒＯ□バッファ層が立方晶であって、（１００）
面が表面となる配向性を有するか、または（１００）面
が表面となる単結晶であること。3.2rO□ buffer layer is cubic crystal, (100)
It has an orientation in which the plane is the surface, or it is a single crystal in which the (100) plane is the surface.
４、ＭｇＯ２バッファ層が（１００）面が表面となる配
向性を有するか、または（１００）面が表面となる単結
晶であること。4. The MgO2 buffer layer has an orientation with the (100) plane as the surface, or is a single crystal with the (100) plane as the surface.
５、ＭｇＯ□バッファ層が（１１１）面が表面となる配
向性を有するか、または（１１１）面が表面となる単結
晶であること。5. The MgO□ buffer layer has an orientation with the (111) plane as the surface, or is a single crystal with the (111) plane as the surface.
本発明に従うと、上記超電導体は複合酸化物超電導材料
によって形成されているのが好ましい。According to the invention, the superconductor is preferably formed of a composite oxide superconducting material.
この複合酸化物超電導材料としては公知の任意の材料を
用いることができる。例えば、
式：（α１−６βｘ）ｒｙＯ□
（但し、αは周期律表■ａ族に含まれる元素であり、β
は周期律表ｍａ族に含まれる元素であり、ｒは周期律表
Ｉ ｂ、 ＩＩ ｂ、 ｌｌＩｂ、 ＩＶａおよび■ａ
族から選択される少なくとも一つの元素であり、Ｘ、ｙ
、ｚはそれぞれ０．１ ≦Ｘ≦０．９．０．４≦ｙ≦３
．０．１≦２≦５を満たす数である）
で示されるペロブスカイト型または擬似ペロブスカイト
型酸化物を主体としていると考えられる複合酸化物が好
ましい。Any known material can be used as this composite oxide superconducting material. For example, the formula: (α1-6βx)ryO□ (where α is an element included in group ■a of the periodic table, and β
is an element included in the ma group of the periodic table, and r is an element included in the periodic table I b, II b, llIb, IVa and ■a
at least one element selected from the group X, y
, z are respectively 0.1 ≦X≦0.9.0.4≦y≦3
．． A composite oxide that is considered to be mainly composed of a perovskite-type or pseudo-perovskite-type oxide represented by the following formula (a number satisfying 0.1≦2≦5) is preferable.
上記周期律表［ａ族元素αとしては、Ｂａ、 Ｓｒ。The periodic table [a group elements α include Ba and Sr.
［１：ａ、 Ｍｇ５Ｂｅ等が好ましく、例えば、Ｂａ、
Ｓｒを挙げることができ、この元素αの１０〜８０％
をＭｇ５Ｃａ。[1:a, Mg5Be etc. are preferable, for example, Ba,
Sr can be mentioned, and 10 to 80% of this element α
Mg5Ca.
Ｓｒから選択された１種または２種の元素で置換するこ
ともできる。また上記周期律表ＩＩＩａ族元素βはとし
ては、Ｙのイ也Ｌａ、 Ｓｃ、 Ｃｅ、 Ｇｄ、 Ｈｏ
、巳ｒｓＴｍ。It can also be replaced with one or two elements selected from Sr. Further, the group IIIa element β of the periodic table is Y, La, Sc, Ce, Gd, Ho.
, MirsTm.
Ｙｂ、 Ｌｕ等ランタノイド元素が好ましく、例えばＹ
、Ｌａ、 ）ｔｏとすることができ、この元素βのうち
、１０〜８０％をＳｃまたはランタノイド元素から選択
された１種または２種の元素で置換することもできる。Lanthanoid elements such as Yb and Lu are preferred, for example Y
, La, )to, and 10 to 80% of this element β can be replaced with one or two elements selected from Sc or lanthanide elements.
前記元素Ｔは一般にＣｕであるが、その一部を周期律表
■ｂ、ＩＩｂ、ＩＩ［ｂ％ Ｉ’Ｖａおよび■ａ族から
選択される他の元素、例えば、Ｔ１、Ｖ等で置換するこ
ともできる。具体的には、
Ｙ ＋Ｂａ２Ｃｕ＋ ０７−Ｘ％ Ｌａ１Ｂａ２Ｃｕ３
０７−ＸＳしａ＋５ｒ２ｃｕ３０７−Ｘ、 Ｈｏ、Ｂａ
、Ｃｕ３０ｔ−ｘｓＮｄ＋Ｂａ２Ｃｕ３０７−ＸＳＳｍ
ｌＢａ２Ｃｕａ ０７−ｘｓＥＵ１Ｂａ２Ｃｕ３Ｃｈ−
ｘｓ Ｇｄ＋Ｂａ２ＣＵ３０ｔ−ｘｓＤｙＪａ２ＣＵ＋
０ｔ−ｘ、 Ｅｒ＋Ｂａ２Ｃｕ３０７−×、Ｙｂ＋Ｂａ
２Ｃｕ３０７−Ｘ
（ただしＸはＱ＜ｘ＜ｌを満たす数である）で表される
複合酸化物超電導体が好ましい。The element T is generally Cu, but a part of it is replaced with other elements selected from Groups ■b, IIb, II [b% I'Va and ■a of the periodic table, such as T1, V, etc. You can also do that. Specifically, Y +Ba2Cu+ 07-X% La1Ba2Cu3
07-XS a+5r2cu307-X, Ho, Ba
, Cu30t-xsNd+Ba2Cu307-XSSm
lBa2Cua 07-xsEU1Ba2Cu3Ch-
xs Gd+Ba2CU30t-xsDyJa2CU+
0t-x, Er+Ba2Cu307-x, Yb+Ba
A composite oxide superconductor represented by 2Cu307-X (where X is a number satisfying Q<x<l) is preferable.
また、本発明においては、
式： Ｄ Ｌ （Ｅ ＋−ｎ、Ｃａｎ） Ｊｕｎ Ｏｐ
−＊（ここで、ＤはＢｉまたはＴＩであり、ＥはＤが８
１のときはＳｒであり、ＤがＴＩのときはＢａであり、
１＝４であり、ｍは６≦ｍ≦１０を満たし、ｎは４≦ｎ
≦８を満たし、ｐ＝ （３１＋２ｍ＋２ｎ） ／ ２で
あり、＃は０＜＃＜１を満たし、＊は
−２≦＊≦２を満たす数を表す）
で表される組成の、
Ｂ１４Ｓｒ４Ｃａ４ＣＵｇ０２ｏ＋＊ （ただし＊は一
２≦＊≦＋２を満たす数を表す）
Ｂ１２Ｓｒ２Ｃａ２ＣＬＩ３０）＋ｏ−＋ （ただし＊
は一２≦＊≦＋２を満たす数を表す）
Ｔ１４Ｂａ４Ｃａ４Ｃｕ６０２ｏ 、＊ （ただし＊は
一２≦＊≦＋２を満たす数を表す）
または
Ｔ１２Ｂａ２Ｃａ２Ｃｕ３０＋ｏ＋＋ （ただし＊は一
２≦＊≦＋２を満たす数を表す）
等で示される複合酸化物を主とした混合相と考えられる
超電導体を用いることも好ましいが、上記いずれかの複
合酸化物の単相であってもよい。Moreover, in the present invention, the formula: D L (E + - n, Can) Jun Op
-*(where D is Bi or TI and E is D is 8
When D is 1, it is Sr, when D is TI, it is Ba,
1=4, m satisfies 6≦m≦10, and n satisfies 4≦n
≦8, p=(31+2m+2n)/2, # satisfies 0<#<1, * represents a number satisfying -2≦*≦2), B14Sr4Ca4CUg02o+* (however * represents a number that satisfies -2≦*≦+2) B12Sr2Ca2CLI30)+o−+ (However, *
T14Ba4Ca4Cu602o, * (where * represents a number that satisfies -2≦*≦+2) or T12Ba2Ca2Cu30+o++ (however, * represents a number that satisfies -2≦*≦+2) Although it is preferable to use a superconductor that is considered to be a mixed phase mainly composed of complex oxides shown in the following, a single phase of any of the above complex oxides may be used.
上記ＺｒＯ２またはＭｇＯバッファ層は、上記ＩｎＧａ
Ａｓ Ｐ基板の（１００）面上に形成されていることが
有利である。The ZrO2 or MgO buffer layer is made of the InGa
Advantageously, it is formed on the (100) plane of an AsP substrate.
作用
本発明の超電導体層を有する半導体基板は、半導体単結
晶基板上に、ＺｒＯ２または’、ＩｇＯからなるバッフ
ァ層を介して複合酸化物超電導体層が形成されていると
ころにその主要な特徴がある。すなわち、本発明の超電
導体層を有する半導体基板は、従来のものと異なり、単
に半導体と複合酸化物超電導体を組み合わせただけでな
く、半導体と複合酸化物超電導体との界面状態を改善す
るバッファ層を備えている。The main feature of the semiconductor substrate having a superconductor layer of the present invention is that a composite oxide superconductor layer is formed on a semiconductor single crystal substrate with a buffer layer made of ZrO2 or IgO interposed therebetween. be. That is, unlike conventional ones, the semiconductor substrate having a superconductor layer of the present invention not only combines a semiconductor and a composite oxide superconductor, but also includes a buffer that improves the interface state between the semiconductor and the composite oxide superconductor. It has layers.
従来の超電導体層を有する半導体基板は、半導体基板上
に単に複合酸化物超電導体薄膜を形成しただけであった
。そのため、半導体と複合酸化物超電導体との界面状態
は、不安定であり、半導体デバイスとして機能しなかっ
たり、特性が悪いものがほとんどであった。A conventional semiconductor substrate having a superconductor layer is simply a composite oxide superconductor thin film formed on a semiconductor substrate. Therefore, the interface state between the semiconductor and the composite oxide superconductor is unstable, and most devices do not function as a semiconductor device or have poor characteristics.
本発明においては、半導体単結晶上に２ｒＣｈまたは）
４ｇＯからなるバッファ層を設け、さらにその上に複合
酸化物超電導体薄膜を形成しているため、従来のものと
比較して、界面の状態が大幅に改善され、半導体デバイ
スとしての特性も向上した。In the present invention, 2rCh or ) on the semiconductor single crystal
By providing a buffer layer consisting of 4gO and further forming a composite oxide superconductor thin film on top of it, the interface condition has been significantly improved compared to conventional ones, and the characteristics as a semiconductor device have also been improved. .
本発明において、上記バッファ層を形成するＺｒＯ２ま
たはＭｇＯの結晶構造は、以下のいずれかであることが
好ましい。In the present invention, the crystal structure of ZrO2 or MgO forming the buffer layer is preferably one of the following.
１、ＺｒＯ２またはＭｇＯバッファ層がアモルファス構
造であること。1. The ZrO2 or MgO buffer layer has an amorphous structure.
２、ＺｒＯ２バッファ層が正方晶であって、（１００）
面が表面となる配向性を有するか、または（１００）面
が表面となる単結晶であること。2. The ZrO2 buffer layer is tetragonal and (100)
It has an orientation in which the plane is the surface, or it is a single crystal in which the (100) plane is the surface.
３、ＺｒＯ。バッファ層が立方晶であって、（１００）
面が表面となる配向性を有するか、または（１００）面
が表面となる単結晶であること。3. ZrO. The buffer layer is cubic crystal, (100)
It has an orientation in which the plane is the surface, or it is a single crystal in which the (100) plane is the surface.
４、ＭｇＯ２バッファ層が（１００）面が表面となる配
向性を有するか、°または（１００）面が表面となる単
結晶であること。4. The MgO2 buffer layer has an orientation with the (100) plane as the surface, or is a single crystal with the (100) plane as the surface.
５、ＭｇＣｈバッファ層が（１１１）面が表面となる配
向性を有するか、または（１１１）面が表面となる単結
晶であること。5. The MgCh buffer layer has an orientation with the (111) plane as the surface, or is a single crystal with the (111) plane as the surface.
これは、複合酸化物超電導体の結晶性を向上させるため
で、上記の結晶構造のバッファ層上に形成された複合酸
化物超電導体薄膜は、結晶のＣ軸が基板成膜面に平行に
近い角度で揃う配向性を有するため特定の面方向および
深さ方向の臨界電流密度Ｊｃが向上する。This is to improve the crystallinity of the composite oxide superconductor, and in the composite oxide superconductor thin film formed on the buffer layer with the above crystal structure, the C-axis of the crystal is close to parallel to the substrate deposition surface. Since it has an orientation that is aligned at an angle, the critical current density Jc in a specific surface direction and depth direction is improved.
本発明の超電導体層を有する半導体基板は、配線部を従
来の金属から複合酸化物超電導体に置き換えた半導体集
積回路基板としてのみ使用できるだけでなく、複合酸化
物超電導体の部分にジョセフソン接合を形成した半導体
デバイスあるいは半導体基板と超電導体とを組み合わせ
た超電導トランジスタや熱電子トランジスタのような新
規な半導体素子を形成するためのデバイス用材料として
も用いることができる。The semiconductor substrate having the superconductor layer of the present invention can not only be used as a semiconductor integrated circuit board in which the wiring part is replaced with a composite oxide superconductor from conventional metal, but also can be used as a semiconductor integrated circuit board in which the wiring part is replaced with a composite oxide superconductor. It can also be used as a device material for forming semiconductor devices or new semiconductor elements such as superconducting transistors and thermionic transistors in which a semiconductor substrate and a superconductor are combined.
本発明の超電導体層を有する半導体基板に使用する複合
酸化物超電導体としては、ＹＢＣＯと称されるＹ １
Ｂａ２ＣＬＩ３０７−８で代表されるような多層ペロブ
スカイト結晶構造を有する複合酸化物超電導体、
Ｂｉ、５ｒ４Ｃａ、Ｃｕ６０２０＋１ （ただし＊は一
２≦＊≦＋２を満たす数を表す）
で示される複合酸化物超電導体、またはＴ１４Ｂａ４Ｃ
ａ４Ｃｕ６０２ｏ＋＊ （ただし＊は一２≦＊≦＋２を
満たす数を表す）
で示される複合酸化物超電導体等が好ましい。しかしな
がら、本発明で使用される超電導体はこれらに限定され
るものではなく、公知の超電導体の任意のものを使用す
ることが可能である。The composite oxide superconductor used in the semiconductor substrate having a superconductor layer of the present invention is Y1, which is referred to as YBCO.
A composite oxide superconductor having a multilayer perovskite crystal structure as represented by Ba2CLI307-8, a composite oxide superconductor represented by Bi, 5r4Ca, Cu6020+1 (where * represents a number satisfying -2≦*≦+2) , or T14Ba4C
A composite oxide superconductor represented by a4Cu602o+* (where * represents a number satisfying -2≦*≦+2) is preferable. However, the superconductor used in the present invention is not limited to these, and any known superconductor can be used.
また、半導体単結晶基板と複合酸化物超電導体の界面の
状態を改善するために設けるＺｒＯ２または！ＪｇＯバ
ッファ層を形成するには、スパッタリング、イオンブレ
ーティング、分子線エピタキシー、ＣＶＤ （化学的気
相反応法）等の方法を用いることが好ましく、その膜厚
は、界面の状態を改善するために５０Å以上必要であり
、また、半導体と絶縁体との超電導近接効果が起こり得
るためには、１０００Ａ以下であることが好ましい。In addition, ZrO2 or! is provided to improve the state of the interface between the semiconductor single crystal substrate and the composite oxide superconductor. To form the JgO buffer layer, it is preferable to use a method such as sputtering, ion blasting, molecular beam epitaxy, or CVD (chemical vapor phase reaction), and the film thickness is determined to improve the interface condition. 50 Å or more is required, and it is preferably 1000 A or less in order to cause the superconducting proximity effect between the semiconductor and the insulator.
さらに、本発明の超電導体層を有する半導体基板を作製
するには、ＺｒＯ２バッファ層またはＭｇＯバッファ層
を形成した半導体単結晶基板上にスパッタリング、イオ
ンブレーティング、分子線エピタキシー、ＣＶＤ （化
学的気相反応法）等の蒸着法あるいは蒸着法に類似の方
法で複合酸化物超電導体層を形成するのが好ましい。そ
の際、半導体単結晶の物性を損なわないよう基板温度を
７００℃以下で複合酸化物超電導体層を形成させること
が好ましい。Furthermore, in order to fabricate a semiconductor substrate having a superconductor layer of the present invention, sputtering, ion blasting, molecular beam epitaxy, CVD (chemical vapor phase It is preferable to form the composite oxide superconductor layer by a vapor deposition method such as a reaction method or a method similar to a vapor deposition method. At that time, it is preferable to form the composite oxide superconductor layer at a substrate temperature of 700° C. or lower so as not to impair the physical properties of the semiconductor single crystal.
さらに、上記の２ｒ○２バッファ層またはＭｇＯバッフ
ァ層はＩｎＧａＡｓ ｐ単結晶基板の（１００）面に形
成することが好ましい。これは、バッファ層が前記した
結晶構造を採り易いためで、ＩｎＧａＡＳＰ単結晶基板
の上記の面に形成された上記バッファ層は、前述の本発
明において好ましい結晶構造を採り易く、また、界面の
状態を改善するのにも有利である。Furthermore, it is preferable that the above 2r*2 buffer layer or MgO buffer layer be formed on the (100) plane of the InGaAs p single crystal substrate. This is because the buffer layer easily adopts the crystal structure described above, and the buffer layer formed on the above-mentioned surface of the InGaASP single crystal substrate easily adopts the crystal structure preferable in the present invention described above, and the interface condition It is also advantageous for improving
実施例
以下、本発明を実施例により具体的に説明するが、以下
に記載するものは本発明の単なる実施例に過ぎず、以下
の開示により、本発明の範囲が何等制限されないことは
勿論である。EXAMPLES Hereinafter, the present invention will be specifically explained by examples, but the following are merely examples of the present invention, and it goes without saying that the scope of the present invention is not limited in any way by the following disclosure. be.
ＩｎＧａＡｓ Ｐ単結晶基板上にバッファ層として１ｒ
ｏｘを５００人コートし、バッファ層上に複合酸化物超
電導体層を形成し、本発明の超電導体層を有する半導体
基板を作製した。Ｚｒ０ｚバッファ層は、スパッタリン
グ法により、ＩｎＧａＡｓ Ｐ単結晶基板の温度２５０
℃で形成した。1r as a buffer layer on an InGaAsP single crystal substrate
A composite oxide superconductor layer was formed on the buffer layer by coating 500 ox, thereby producing a semiconductor substrate having a superconductor layer of the present invention. The Zr0z buffer layer is formed by sputtering at a temperature of 250°C on an InGaAsP single crystal substrate.
Formed at °C.
市販のＢｉ２０ａ粉末、５ｒＣＯｓ粉末、ＣａＣ０＝粉
末、Ｃｕ○粉末を Ｂ１と、Ｓｒと、Ｃａと、Ｃｕの原
子比Ｂｉ ：Ｓｒ ：Ｃａ ：Ｃｕを１．４ ： １
： １ ：１．５とした原料粉末を常法に従って焼結し
て作ったＢｉ −３ｒ −Ｃａ−Ｃｕ−０複合酸化物、
ＹＢａ２Ｃｕ４． ｓ Ｏｘ焼結体粉末およびｔ（ｏＢ
ａ、 ２ｃｕ４．７０ ｘ焼結体粉末をターゲットとし
て、公知のマグネトロンスパッタリング法により、上記
バッファ層を形成したＩｎＧａＡｓ Ｐ半導体単結晶基
板の（１００）面上に複合酸化物ｍ電導体層を形成する
。基板とターゲットの位置関係および高周波電力の大き
さに特に注意し、基板温度７００℃でスパッタリングを
行い、複合酸化物超電導体層を１０００人まで成長させ
、試料とする。なお、比較のためバッファ層を形成しな
いＩｎＧａＡｓ Ｐ半導体単結晶基板の（１００）面上
に全く等しい条件で複合酸化物超電導体層を形成した。Commercially available Bi20a powder, 5rCOs powder, CaC0=powder, Cu○ powder. Atomic ratio of B1, Sr, Ca, and Cu: Bi:Sr:Ca:Cu: 1.4:1
: 1: Bi-3r-Ca-Cu-0 composite oxide made by sintering raw material powder of 1.5 according to a conventional method,
YBa2Cu4. sOx sintered powder and t(oB
a. Form a composite oxide m conductor layer on the (100) plane of the InGaAs P semiconductor single crystal substrate on which the buffer layer has been formed, by a known magnetron sputtering method using 2cu4.70x sintered body powder as a target. . Paying special attention to the positional relationship between the substrate and target and the magnitude of high-frequency power, sputtering is performed at a substrate temperature of 700° C. to grow a composite oxide superconductor layer of up to 1000 layers and use it as a sample. For comparison, a composite oxide superconductor layer was formed under exactly the same conditions on the (100) plane of an InGaAs P semiconductor single crystal substrate on which no buffer layer was formed.
上記の本発明の超電導体層を有する半導体基板は、いず
れのものも半導体とバッファ層およびバッファ層と超電
導体層の界面の状態がよく、半導体デバイス材料として
侵れた特性を有している。All of the above semiconductor substrates having a superconductor layer of the present invention have good interface conditions between the semiconductor and the buffer layer, and between the buffer layer and the superconductor layer, and have excellent characteristics as semiconductor device materials.
また、それぞれの試料の超電導体層の超電導臨界温度お
よび７７Ｋにおける臨界電流を以下に示す。Further, the superconducting critical temperature and critical current at 77K of the superconducting layer of each sample are shown below.
以上説明したように、本発明の超電導体層を有する半導
体基板は、半導体デバイス用基板としてたいへん有効で
ある。As explained above, the semiconductor substrate having the superconductor layer of the present invention is very effective as a substrate for semiconductor devices.
発明の効果
本発明により、新規な半導体デバイス材料としてたいへ
ん有効な超電導体層を有する半導体基板が提供される。Effects of the Invention The present invention provides a semiconductor substrate having a superconductor layer that is very effective as a novel semiconductor device material.
本発明により、半導体デバイスの高速化、高密度化がさ
らに推進される。さらに、本発明はジョセフソン素子と
異なり、３端子以上の端子を有する超電導体を利用した
半導体デバイス等に応用が可能である。The present invention further promotes higher speed and higher density of semiconductor devices. Further, unlike Josephson devices, the present invention can be applied to semiconductor devices using superconductors having three or more terminals.
特許出願人 住友電気工業株式会社Patent applicant: Sumitomo Electric Industries, Ltd.
Claims (1)
またはＭｇＯからなるバッファ層を具備する基板上に、
複合酸化物超電導体よりなる薄膜層が形成されているこ
とを特徴とする超電導体層を有する半導体基板。ZrO_2 formed on InGaAsP single crystal
Or on a substrate provided with a buffer layer made of MgO,
A semiconductor substrate having a superconductor layer, characterized in that a thin film layer made of a composite oxide superconductor is formed.
Priority Applications (7)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63110014A JPH01280371A (en) | 1988-05-06 | 1988-05-06 | Semiconductor substrate having superconductor layer |
| KR1019890005786A KR900017216A (en) | 1988-04-30 | 1989-04-29 | Semiconductor Substrate Having Superconductor Thin Film and Its Manufacturing Method |
| AU33896/89A AU614606B2 (en) | 1988-04-30 | 1989-05-01 | Semiconductor substrate having a superconducting thin film, and a process for producing the same |
| CA000598305A CA1330196C (en) | 1988-04-30 | 1989-05-01 | Semiconductor substrate having a superconducting thin film, and a process for producing the same |
| DE68918746T DE68918746T2 (en) | 1988-04-30 | 1989-05-02 | Semiconductor substrate with a thin superconductor layer. |
| EP89401238A EP0341148B1 (en) | 1988-04-30 | 1989-05-02 | A semiconductor substrate having a superconducting thin film |
| US07/726,124 US5179070A (en) | 1988-04-30 | 1991-07-02 | Semiconductor substrate having a superconducting thin film with a buffer layer in between |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63110014A JPH01280371A (en) | 1988-05-06 | 1988-05-06 | Semiconductor substrate having superconductor layer |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01280371A true JPH01280371A (en) | 1989-11-10 |
Family
ID=14524936
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP63110014A Pending JPH01280371A (en) | 1988-04-30 | 1988-05-06 | Semiconductor substrate having superconductor layer |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01280371A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0544399A2 (en) * | 1991-11-26 | 1993-06-02 | Xerox Corporation | Epitaxial magnesium oxide as a buffer layer for formation of subsequent layers on tetrahedral semiconductors |
-
1988
- 1988-05-06 JP JP63110014A patent/JPH01280371A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0544399A2 (en) * | 1991-11-26 | 1993-06-02 | Xerox Corporation | Epitaxial magnesium oxide as a buffer layer for formation of subsequent layers on tetrahedral semiconductors |
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