JPH01276974A - Image sensor - Google Patents

Abstract

PURPOSE:To form an image sensor on an Si chip having a small area by providing a control transistor which selects the state of a thyristor and transmits the state to an output transistor which accesses a phototransistor array or photodiode array. CONSTITUTION:Bases and emitters of npn transistors 4-1-4-4 for control are respectively connected in parallel with npn transistors 1-2-1-5 for inter-stage coupling. Therefore, the thyristor is set to a turned-on state when a shift clock is 'L' while the thyristor is in a conducted state. Therefore, when collectors of output transistors 5-1-5-4 are connected to collectors of phototransistors 6-1-4-4 for photodetection and emitters of the phototransistors 6-1-6-4 for photodetection are commonly connected, video signals of the electric charge accumulating mode of the phototransistors 6-1-6-4 for photodetection can be obtained from a video signal output line 9.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to an image sensor that makes it possible to read document information with high sensitivity and high resolution.

Conventional technology An image sensor in which a 7-phototransistor array or photodiode playback for light detection is scanned by a shift register using a thyristor is shown in Japanese Patent Application Laid-Open No. 198266/1982, but the above system has the following drawbacks: have.

Each thyristor of the shift register, in which thyristors are connected in series using crotch-coupled transistors, is held in the "on" state for one period of the two-phase shift clock of the shift register, so that the adjacent thyristor and the adjacent thyristor are simultaneously "on" for half a cycle. state. For this reason, if the output transistor that accesses each phototransistor or photodiode is configured with a PNP resistor whose base and emitter are connected in parallel with the PNP transistor forming the thyristor, the adjacent output transistors will be connected at the same time. When in the "on" state, optical signals for two pixels are output.

According to Japanese Unexamined Patent Publication No. 198256/1982, in order to avoid the above situation, (IL) phototransistors or photodiodes, and output transistors are configured for every other thyristor in each stage, and (b) phototransistors or Connect the photodiode output signal line to odd-numbered pixels,
A method has been proposed in which the image is divided into two, one for even-numbered pixels.

Problems to be Solved by the Invention However, method (a) requires at least twice as many thyristors as phototransistors or photodiodes, so when an image sensor is constructed on a Si crystal, the Si chip area becomes large. It has the following drawback. In method (b), since there are two output signal lines, it is necessary to convert it to a serial output signal on the device side.
This has the disadvantage that the circuit becomes complicated.

SUMMARY OF THE INVENTION An object of the present invention is to provide an image sensor with high sensitivity, high resolution, and low cost that is optimal as a self-scanning contact type image sensor. A pair of phototransistors or photodiodes for each stage of thyristor,
The key point is that a serial optical signal can be obtained from one signal output line by configuring an output transistor.

Means for Solving the Problems In order to solve the above problems, the image sensor of the present invention has the following features:
To simplify the scanning circuit section, reduce power consumption, and increase speed, a shift register using thyristors using bipolar ICs, a 7-phototransistor array or photodiode array for light detection, a phototransistor array or a photodiode array by selecting the state of the thyristor, It consists of a control transistor that communicates to an output transistor that accesses the photodiode array.

Operation As mentioned above, a shift register is configured by a thyristor consisting of an NPN transistor and a PNP transistor, and a coupling transistor that transmits the state of the previous stage to the next stage, and each thyristor is in the "on" state for one period of the two-phase shift clock of the shift register. While the thyristor is held in the "on" state by the control NPN transistor whose base and emitter are connected in parallel with the interstage coupling NPN transistor, the thyristor is kept in the "on" state and is connected to the emitter of the control NPN transistor. Shift clock is “L”
”, the output transistor can be turned on, and one pair of phototransistor or photodiode and output transistor can be configured for each stage of thyristor, reducing the Si chip area and reducing the complexity of the circuit on the device side. can be prevented.

A parallel signal from each output transistor is connected to each element in a seven-phototransistor array or a photodiode, and the electrodes of the phototransistor or photodiode are connected in common to form a video output line.

EXAMPLES Hereinafter, examples of the present invention will be described with reference to the drawings.

FIG. 1 is a circuit diagram of an image sensor according to an embodiment of the present invention. In FIG. 1, NPN transistors 2-1 to 2
-4. The PNP transistors 3-1 to 3-4 have their respective bases and collectors connected to each other and operate as thyristors.

) The iPN transistors 1-2 to 1-6 are interstage junction transistors, and function to detect the conduction state of the main stage and transmit it to the next stage thyristor. 1-1 is an input coupling transistor that transmits a start signal to the first-stage thyristor.

4-1 to 4-4 are NPN transistors for control, which detect the "on" state of the thyristor in each stage and the "L" level of the shift clock of the shift register, and output parallel signals from the shift register to the low 1 to 6-4. Numerals 6-1 to 6-4 are phototransistors for light detection, and a desired number of transistors are provided at regular intervals. The collectors of the phototransistors 6-1 to 6-4 for light detection are connected to the collectors of the output transistor rows 1 to 6-4, respectively, when the thyristors are in the "on" state and the shift clock is at the 'L' level. The photodetecting phototransistors 6-1 to 6-4 are in a reading state, and a video signal is output as a photocurrent from the video signal output line 9. Reference numeral 7 is an input terminal for a start signal.

11-1 and 11-2 are two-phase shift clocks φ1. It is an input terminal of φ2, φ1 is connected to the cando of the odd-numbered thyristor, and φ2 is connected to the cathode of the even-numbered thyristor.

The operation of the image sensor of this embodiment configured as described above will be described below. A timing chart of this image sensor is shown in FIG.

The thyristor is of N-gate type and is triggered by applying a negative voltage to the gate compared to the positive anode. First, when the ST terminal 7K "H" level pulse is input, the gate of the first stage thyristor becomes "L" and the thyristor becomes conductive. After that, even if the gate becomes "■", the conductive state is maintained because the cathode of the thyristor is "L" and φ1 is "L". This state is shown at 91. When the first stage thyristor is conductive, the gate of the second stage thyristor is “
If the thyristor in the second stage becomes conductive as shown at 92 in FIG. 2, φ2 becomes "L" even if the gate of the second stage thyristor becomes "L". Therefore, this conductive state is maintained.Furthermore, even if the gate is "L", if the shift clock is "H", the cross-coupled transistor is "off", and signal transmission to the next stage does not occur. First, a normal shift register function is obtained.In this case, the conduction state of the thyristor in each stage is maintained for one period of the shift clock, as shown by Q1 to Q4 in FIG.

Next, the control NPN transistors 4-1 to 4-4 have their bases and emitters connected to the interstage coupling NPN transistor 1.
-2 to 1-6 are connected in parallel, so when the thyristor is conductive, the base is "H", but since the emitter is connected to φ1 or φ2, the shift clock is "L". 1 ON” state only when the control N
When the PN transistors 4-1 to 4-4 are in the "O/" state, the bases of the output transistors low 1 to 5-4 connected to the collectors of the control NPN transistors 4-1 to 4-4 are "L". "become. This state is shown at P1 to P4 in FIG. Therefore, the collectors of the output transistor rows 1 to 6-4 are connected to the collectors of the light detection phototransistors 6-1 to 6-4, and the collectors of the output transistor rows 1 to 6-4 are connected to the collectors of the light detection phototransistors 6-1 to 6-4.
By connecting the emitters of 4 in common, a video signal is obtained in the charge accumulation mode of the photodetecting phototransistors 6-1 to 6-4 as shown in the video signal output lines 9 and υ and Sig in FIG. be able to.

In the embodiments described above, a phototransistor was used for light detection, but it is also possible to use a photodiode that receives light and generates a current.

Effects of the Invention As is clear from the above explanation, according to the present invention, it is possible to form an image sensor with high sensitivity, high resolution, and low cost that incorporates most of the driving circuits on a small-area 81 chip. However, it is extremely effective as an input device image for information processing equipment, and its industrial effects are significant.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram of an image of an embodiment of the present invention.
FIG. 2 is a timing chart of this image sensor. 1-1...Input coupling transistor, 1-2~1
-5... Interstage coupling transistor, 2-1 to 2-
4... NPN transistors forming the thyristor 3-1 to 3-4... P forming the thyristor
NP transistor, 4-1 to 4-4...Control transistor, 6-1 to 5-4...Output transistor 6-1 to 6-4...For light detection Phototransistor 8...Bias circuit, 9...Video signal output line. Name of agent: Patent attorney Toshio Nakao and 1 other person1-
1-1-1 power combination transistor game/-1~/-5-11-stage combination transistor 2-/~
Z-4-length Iwasug [Constituting NPN transistors 3-1 to 3-4---PNP transistors 4-/-4-4-- Control transistors 75-f to 5-4
- Ekatransisug 6-1-6-4 =-light detection m
) Pak transistor a---bias circuit 9゛-゛image a second number! Lesson t-z 2nd figure ip

Claims (2)

[Claims] (1) A phototransistor array or photodiode array for light detection, a shift register formed by connecting thyristors in series with interstage coupling transistors, and an output transistor that detects the state of the thyristor and accesses the phototransistor array or photodiode array. An image sensor with a control transistor that communicates to the array. (2) Claim 1 in which the base and emitter of the control transistor are connected in parallel to the NPN transistor for interstage coupling.
The image sensor described.