JPH01276122A - Analog arithmetic circuit - Google Patents

Abstract

PURPOSE:To convert an input signal which has temperature characteristics into a signal which is stable to temperature variation by compressing an input voltage logarithmically and shifting the voltage in level to two upper and lower stages, and then performing reverse logarithmic conversion. CONSTITUTION:The input voltage E1 which has temperature characteristics of the light measuring circuit of a camera, etc., is compressed and converted into a voltage proportional to a logarithm by a logarithmic compressing circuit 7 consisting of an operational amplifier 2 and a transistor (TR) Q1. This voltage is shifted in level two stages by level shifting circuits 8 and 9 composed of TRs Q3 and Q6 and then reconverted logarithmically by a reverse logarithmic converting circuit 10 formed of a TR Q8, so that signals which are stable to temperature variation are outputted from output terminals 11 and 12. The level shifting circuits 8 and 9 are energized individually by 1st and 2nd constant current sources 3 and 4, and the current ratio of their output currents is set corresponding to absolute temperature.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to an analog arithmetic circuit, and more particularly to an analog arithmetic circuit suitably implemented to process an input signal having temperature characteristics.

Conventional technology For example, in order to obtain appropriate exposure conditions, various cameras have built-in photometry circuits that use a negative photoelectric converter. Because the signal ranges over a wide range of up to 7 digits, a logarithmic compression circuit is usually used as an arithmetic circuit for processing such a signal.

A logarithmic compression circuit is a circuit for obtaining a voltage value proportional to the logarithm of the input, and the base-emitter voltage Vbe of a transistor is usually calculated using the following formula % formula % () where K: Boltzmann's constant T: Absolute temperature q: Electron charge Io: As shown by the reverse collector saturation current, it is configured using the fact that it is proportional to the logarithm of the collector current Ic. Actually, the input current is I
c, the corresponding base-emitter voltage Vbe
A circuit is used to find the following.

However, since the first equation above includes a term for the reverse collector saturation current IO, which has temperature characteristics, in order to eliminate this term, it is necessary to A method has been proposed that takes the difference from the voltage Vbe (r). If the base-emitter voltage obtained from the first equation is Vbe(i), then the difference between the two Δ
Vbe is ΔVbe=Vbe(i)-Vbe(r)-KT
/q [In (Ic/Io)-Irl(I
r/Io) ]=KT/qJr+ (Ic/I r
) -(2>, and the term of the reverse collector saturation T4 flow Io included in the first equation is eliminated and its temperature characteristics are canceled, but the difference in base-emitter voltage obtained here is ΔV b e is proportional to the absolute temperature T, so it still has temperature characteristics.

Problem to be Solved by the Invention The voltage obtained by the conventional method has an undesirable temperature characteristic. For example, when trying to set exposure conditions for a subject using the output of a photometric circuit, a problem arises in that even for the same subject and the same illuminance, different outputs are derived depending on the ambient temperature.

Therefore, in processing signals having such temperature characteristics, circuits for correcting the temperature characteristics have been proposed. For example, in the arithmetic circuit 51 shown in FIG.
A thermistor 53 is connected in parallel to the feedback resistor Rb of the operational amplifier 52, and the gain of the operational amplifier 52 is controlled using the negative temperature characteristics of the thermistor 53, thereby improving the temperature characteristics of the operational circuit 51. Another example is when performing analog-to-digital conversion (hereinafter referred to as A/D conversion),
The voltage on the reference side of A/D conversion is given a temperature characteristic proportional to the absolute temperature T, and the t! There are methods such as adjusting the tone.

However, the former method of using a thermistor is not suitable for converting the tA product into 4I8, and requires an external thermistor, and furthermore, thermistors have large variations in characteristics.
There is a problem in that the post-HL characteristics are not perfect, leading to an increase in production costs.

In the case of the latter A/D conversion, the input is switched, and when performing A/D conversion of other information such as power supply voltage, the reference voltage of the A/D converter is changed accordingly. This required complicated steps and complicated circuits, such as having to switch between the two.

The present invention has been made in view of the above-mentioned technical problem, and its purpose is to convert an analog signal voltage having temperature characteristics proportional to absolute temperature T into a voltage having stable characteristics with respect to absolute temperature T. An object of the present invention is to provide an analog arithmetic circuit for converting into a stable analog signal voltage that is not affected by changes in absolute temperature T.

Means for Solving the Problems The present invention provides a logarithmic compression circuit that compresses and converts an input voltage into a voltage proportional to its logarithm, and a logarithm compression circuit that compresses and converts an input voltage into a voltage proportional to its logarithm, and a logarithm compression circuit that converts the level of the logarithmically compressed input voltage in upper and lower directions in opposite directions. It includes a plurality of level shift circuits for shifting, and an anti-log conversion circuit for converting the logarithmically compressed voltage of the level shift t& into an anti-logarithm and outputting it, and the plurality of level shift circuits are individually controlled by corresponding constant current sources. The analog arithmetic circuit is energized, and the current ratio of the output current of the constant current source is set to correspond to absolute temperature.

Operation The arithmetic circuit according to the present invention converts an input voltage having temperature characteristics into a voltage proportional to the logarithm of the input voltage using a logarithmic compression circuit, and converts the input voltage into a voltage proportional to the logarithm of the input voltage using a logarithmic compression circuit. shift.

After the level shift, the inverse logarithmic conversion circuit reconverts the voltage into a voltage corresponding to the original input voltage and outputs it.

The plurality of level shift circuits are individually energized by two constant current sources whose output currents are set such that the ratio of the output currents corresponds to the absolute temperature.

This converts an input voltage with temperature characteristics proportional to absolute temperature into a voltage with stable characteristics against changes in absolute temperature and outputs it.

Embodiment FIG. 1 is an electrical circuit diagram showing the configuration of an analog calculation concave path according to an embodiment of the present invention.

The analog arithmetic circuit 1 consists of an operational amplifier 2, transistors Q1 and Q3 to Q8, a diode Q2, and a first constant transistor having temperature characteristics proportional to absolute temperature. ? : Consists of a current source 3, a second constant current source 4 with stable characteristics against absolute temperature, and a reference voltage between the collectors of transistors Ql and Q8.
Between 94713 to which 0 is applied, there is a load resistance R
1, R2 is connected. Transistors Ql, Q3~
Q8 are all NPN transistors, among which transistors Ql, Q3 . QG, Q8 are collector saturation current Iθ
It is a transistor with uniform uniformity of 1-ki.

Transistor Q1. Q3. Q6. Base-emitter voltage V be (n) of Q8 (n = 1, 3
,6.

8) and the IWj coefficient of the collector current Ic(n), as shown in the first equation, Vbe(n)=(KT/Q)・fn(Ic(n)/Io
)...12).

In FIG. 1, a logarithmic pressure circuit n7 is formed by the operational amplifier 2 and the transistor Q1, and the input voltage E is applied between the terminals 5 and 6.
1, the operational amplifier 2 applies feedback so that the collector current 1c1 of the transistor Q1 becomes Ic1=IEl/R1-(3), so that the base-emitter I? ? I voltage Vbe1 is Vbcl=(K
T/(1)In((El/R1)/Io) −<4>
and the input voltage E1. A base-emitter voltage Vbe1 proportional to the logarithm of Vbe1 is generated with reference to the line 14 to which the emitter is connected.

Transistor Q3. Q6 forms two level shift circuits n8.9 that shift the level of the logarithmically compressed input voltage in two steps in opposite directions, and the transistor Q
8 forms an anti-logarithm conversion circuit 10 which converts the logarithmically compressed voltage after the level shift l- into an anti-logarithm and outputs it.

Now, assuming that the current 11 supplied from the first constant current source 3 is proportional to the absolute temperature T and equal to the current I2 supplied from the second constant current source 4 at the temperature To, the constant current source 3
．． The output current 11 of 4 and the current ratio of 12 are proportional to the absolute temperature T, and 11=! 2・T/To −(5)
It can be expressed as. On the other hand, the input voltage E1 is at the absolute temperature T
Since it has a temperature characteristic proportional to , if the value of input voltage E1 at temperature To is Eo, 1E1 = Eo - T/
To = 16) At this time, the current Ic3 flowing through the collector of the transistor Q3 is made equal to the first constant current 11 supplied from the first constant current source 3. Since 393H is applied and biased by Q6, the base-emitter voltage Vbe3 of transistor Q3 is Vbe3=(KT/q)-In(11/Io)=(K
T/q) ・en ((T/To) -12)/I o
)...(7) Similarly, the transistor Q6 is supplied with the collector tl from the second constant current source 4, and its base-emitter voltage Vbe
6 is Vbe6=, (KT/Q) ・#rt (I2/Io)
. . = (8) The emitters of transistors Ql, Q8 are commonly connected to a line 14 biased to the required level for operation by diode Q2, and transistors Q3 . Each emitter of Q6 is commonly connected to line 15. Furthermore, the base of transistor Q3 is commonly connected to the base of transistor Q1, and the base of transistor Q8 is commonly connected to the base of transistor Q6, so the potential of line 15, where the emitters of transistors Q3 and Q6 are commonly connected, is Q1. The emitters of Q8 are level-shifted higher than the commonly connected line 14 by the base-emitter voltage Vbe6 of transistor Q6. Due to this connection relationship, the base-eminter voltage Vbe8 of the transistor Q8 is Vbe8 = Vbel - Vbe3 + Vbe6 = 1
9). By substituting the above-mentioned equations 4 and 6 to 8 into this, we get Vbe8= (KT/q) -In (Eo-T/
To/R1/Io)-t'n(12, T/(Io-T
o))+1'n(I 2/ 1oll= (KT/q
) ・In (no -T/(To -n
l −1o)>(TO−Io/(12−T))(I2
/Io) = (KT/q) ・/rt ((Eo, /
R1/I o)I +++ (10), and the collector current 1c8 of transistor Q8 is E o / R1
becomes.

At this time, an output voltage E2 expressed as E2=Ic8・R2=Eo・R1/R2 (11) is derived between the output terminals 11 and 12 which are parallel to the load resistor R2 connected to the collector of the transistor Q8. output voltage E
It can be seen that 2 is anti-logarithmically converted by the transistor Q8, and its value is stable with respect to the absolute temperature T.

As described above, according to the present invention, an arithmetic circuit having no temperature characteristics can be easily created without using a temperature compensation means such as a thermistor, so it is easy to integrate the circuit, and moreover, when using a thermistor etc. A stable circuit with less variation can be realized.

FIG. 2 is an electrical circuit diagram of the first constant current source 3 and the second constant current source 11 used in this embodiment. One first constant Z B 'a
3 Ji, NPN) U7 registers Q11 to Q13 and P
NPl transistors Q14 to Q16 and resistors R11 to
It consists of R17, ■・Lansistor Ql, Q
12, the first current mirror recess 3A, the transistor Q16. A second current mirror circuit B is formed by Q17. The output of the first constant current generator 1 is taken out from the transistor Q17. 1st current mirror circuit A
The transistor Qll is diode-connected and 1
In order to extract 0 times the emitter current fell, its emitter area is set to be 10 times that of other transistors. Therefore, it is proportional to the absolute temperature T, (KT/q) ・
The sum of the base-emitter voltage Vbe1l of the transistor Qll represented by Inio and the voltage drop across the emitter resistor R11 due to the emitter current fell is given as the base-emitter voltage Vbe12 of the next stage transistor Q12, and the corresponding collector Current 1c12 flows from transistor Q15. The transistor Q15, which is the supply source of the collector current 1c12, has a collector current Ic1
Since a base-emitter voltage Vbe15 corresponding to 1.2 is applied, feedback is applied through the transistor Q13. This base-emitter voltage Vbe15 is applied to the transistor Q16 of the second current mirror circuit B through the line 13. Applied to Q17. Transistor Q15~
Each emitter resistor R15-R17 of Q17 is equal, for example 10Ω, thereby causing transistor Q17
A first constant current 1, which is equal to the collector current Ic12 and proportional to the absolute temperature T, is output from the collector of 0. In this embodiment, the first constant current 1 is set to, for example, 10 μ8, as shown in FIG. The transistor Q3 of the second rubel shift circuit 8 is turned off.

The other second constant i8 current source 4 is a PNP)-transistor Q21. Q25. Q26 and NPN transistor Q23
．． Q24, a diode Q22 with a negative temperature coefficient, and resistors R21 to R27, and a transistor Q2
3. Q24 has its emitters connected in common to form the differential amplifier circuit C. The bases of the six transistors Q21 are connected to the Moeki base-emitter voltage Vbe15 via line 13.
The collector current 1c21 flows through the series circuit of the diode Q22 and the resistor R22, causing a voltage drop, but its temperature characteristics are compensated for by the diode Q21, and the base of one transistor Q23 of the differential circuit C The voltage drop, which is stable against temperature changes, is applied as the reference voltage Vr. The base of the other transistor Q24 in the differential diagram 18C is connected to the connection point between the collector of the transistor Q25 and the resistor R2G, and the collector current 1
The voltage drop Vt due to c25 becomes the base of transistor Q24! j· is obtained and compared with the reference voltage Vr. When the collector current 1c25 increases due to a temperature change and the voltage drop Vt rises, the collector current Ic23 of the other transistor Q23 decreases and the potential of the line l/1, that is, the base-emitter voltage Vbe2 of the transistor Q26, decreases.
When the temperature changes (if the direction of H is opposite, the voltage Vbe26 between the base and emitter of the transistor Q26 is kept constant regardless of the temperature). Therefore, from the collector of transistor Q26, there is a second voltage which is stable against fluctuations in absolute temperature T.
Constant current I2 is output. The second constant current I2 powers the transistor Q6 of the second level shift circuit n shown in FIG.

FIG. 3 is an electric circuit diagram showing the structure of another embodiment of the present invention, and FIG. 4 [ ] is an electric circuit diagram showing the structure of a further musical embodiment of the present invention. 3 and 4 are similar to FIG. 1, and corresponding parts are given the same reference numerals.5 What should be noted in these embodiments is the transistor Q1 of the logarithmic compression circuit N7 and the antilogarithmic conversion circuit 10. The problem is that the connection of the level shift circuit 8.9 interposed between the transistors 268 has been changed. In the case of FIG. 3, it is the transistor Ql.

Q8 and 1 - transistor Q3. The bases of Q6 are all connected in common, and in the case of Fig. 4, the transistor Q
l, the emitter of Q8 and the transistor Q3. The bases of Q6 are all connected in common.

In FIG. 3, the voltage Vbe8 between the base and emitter of the transistor Q8 is Vbe8=Vbe1-Vbe3+Vbe6-(KT/
q) ・In ((Eo/R1/Io)) −
(12>, and in the 4th I2I, Vbe8=Vbel+Vbe3-Vbe6= (KT/
q) ・1n ((Eo/R1/I o)l −(13
), in both cases the collector current 1c8 of the transistor Q8 is E o /R1, and therefore the first
An output voltage E2 having the same characteristics as 0 is obtained.

FIG. 5 is an electric circuit diagram showing a part of still another embodiment of the present invention. Reference numbers correspond to FIG. What should be noted in this embodiment is the collectors of the transistor Q1 forming the logarithmic conversion circuit 7 and the transistor Q8 forming the antilogarithmic conversion circuit 10, and the respective load resistors R1 and R2.
Between them, transistors Q31.
This is because Q32 was involved. Even if a common base bias Eb is applied to the transistors Q31 and Q32, thereby giving the same base-emitter voltage Vbe, the collector current X current 1c increases as the collector-emitter voltage Vce increases. This is due to the so-called Early effect. Errors can be suppressed and accuracy can be further improved.

Effects of the Invention As described above, the analog arithmetic circuit according to the present invention logarithmically compresses an input voltage having temperature characteristics, performs level shift in multiple stages above and below, and performs antilogarithm conversion to obtain an output voltage corresponding to the input voltage. did. However, since the multi-stage level shift circuit is individually powered by the current from each constant current source with a current ratio corresponding to the absolute temperature T, the input signal having temperature characteristics is not affected by temperature changes. Converts it into a stable signal.

It can be output. Furthermore, by logarithmically compressing the input and then reconverting it, the analog arithmetic circuit according to the present invention can easily process analog signals with a wide variation range, such as in photometric circuits. Since it is possible to easily create a logarithmic compression circuit that does not have temperature characteristics, it is also advantageous for integrated circuits.
The effect is very large and useful, such as high accuracy can be obtained because the variation is small.

[Brief explanation of the drawing]

FIG. 1 is an electrical circuit diagram of an analog arithmetic circuit according to an embodiment of the present invention, FIG. 2 is an electrical circuit diagram of a constant current source used in this embodiment, and FIGS. FIG. 5 is an electric circuit diagram showing a part of still another embodiment, and No. 6 [2I] is a diagram showing a conventional technique. 1...Analog arithmetic circuit, 2...2 operational amplifiers, 3
...first constant current source, 4...second constant current source, 5.6.
... Input terminal, 7... Logarithmic compression circuit, 8.9... Level shift same n, 10... Anti-logarithm 2 conversion times n, 11.1
2... Output terminal, Ql, Q3 to Q8. Qll~Q21
．． Q23~Q2G, Q31. Q38...Transistor, Q2, Q22...Diode, R1', R2, RI
L~R17, R21~R27-・Resistance, Vbe1. Vb
e3. Vbe6. Vbe8- Transistor base-emitter resistance representative Patent attorney Keishi Saikyo Part 3 Figure 4

Claims (1)

[Claims] A logarithmic compression circuit that compresses and converts an input voltage into a voltage proportional to its logarithm, and a plurality of levels that shift the level of the logarithmically compressed input voltage in opposite directions up and down in multiple steps. a shift circuit, and an anti-log conversion circuit that converts the level-shifted logarithmically compressed voltage into an anti-logarithm and outputs the result, and each of the plurality of level shift circuits is individually energized by a corresponding constant current source. An analog calculation circuit characterized in that a current ratio of output currents of a constant current source is set to correspond to absolute temperature.