JPH01270672A - Storing and retrieval system of digital data - Google Patents

Abstract

PURPOSE:To enable the substantial increase of a storage capacity, by dividing one digital data into a plurality of data groups and by adding the data groups one by one to the respective effective parts of the remaining data for data compression. CONSTITUTION:Analog input data are converted into digital data by an A/D converter 10, and the respective effective parts of these digital data in a plurality are taken out respectively. Next, one data of these data in a plurality are divided into a plurality of data groups, and these are added to the respective effective parts of the remaining data for data compression. These data are stored in a memory 12. At the time of reproduction, one digital data are restored by removing the data of each added data group, and thus each of the data in a plurality can be retrieved.

Description

[Detailed Description of the Invention] [Field of Industrial Application] This invention converts analog input data from an oscilloscope recording device or the like into digital data and stores it in a storage device, and also reads and reproduces the stored digital data. ,
The present invention relates to a digital data storage/reproduction method that performs data compression when storing the digital data in the storage device.

[Conventional technology]

Conventionally, in digital data storage and playback devices such as oscilloscope recording devices, analog input data is converted into full-scale 12-bit digital data at a constant cycle, and then
It is stored in memory (storage device) as 16-bit data, and if there is a request from another,
The data is read from the memory, reproduced, and output to an external device.

For example, FIG. 1 shows a system block diagram of the digital data storage and playback device, and as shown in FIG.
Analog input data is converted into digital data by an analog/digital converter (hereinafter referred to as A/D) 10, and is stored in a memory 12 under the control of an arithmetic processing unit (hereinafter referred to as CPU).

At this time, as shown at 21M+, the digital data is stored in the memory 12 in the form of a 2-bit signed data section 20 and a 4-bit signed data section 21, which is, for example, a valid section of 16 bits. Also, during playback, the CPU
When inputting a request signal from the input/output processing unit (hereinafter referred to as ◯/◯) 13, II reads the stored digital data from the memory 1-2 and outputs it from ① 1013 to the external device.

[Problem to be solved by the invention]

Since the conventional digital data storage/reproduction device is configured as described above, in the above example, the digital data is
The data is stored in the memory 121 as 6-bit data without performing any data compression section delj. Therefore, if the amount of data stored is increased, the storage capacity of the memory 12 must be increased proportionately. There wasn't. Further, since the amount of data storage is determined from the storage capacity of the memory 12, there is a problem that depending on the performance of the memory, the amount of data storage may not be satisfied.

This invention was made in order to solve the above-mentioned problems, and it is a digital data storage device that can increase the actual storage capacity without increasing the storage capacity of the storage device hardware. The purpose is to obtain a storage/reproduction method.

[Means to solve the problem]

The digital data storage/reproduction method according to the present invention converts analog input data into digital data, and
Each of the valid parts of the plurality of digital data is extracted, one digital data among the plurality of digital data is divided into a plurality of data groups, and each of the divided data groups is divided into the plurality of digital data. is added to each valid part of the remaining digital data to compress the data,
Store in storage device. Further, when reproducing the digital data stored in this storage device, the divided data group added to each valid part of the remaining digital data is removed to restore the one digital data, and the plurality of digital data are reproduced. It is designed so that each can be played back.

[Effect]

The digital data storage/reproduction method according to the present invention converts analog input data into digital data, and extracts effective parts of each of the plurality of digital data. Next, data compression is performed by dividing one digital data among the plurality of digital data into a plurality of data groups and adding each data group to each effective part of the remaining digital data of the plurality of digital data. and stores these digital data in a storage device.

Next, during reproduction, the data of each added data group is removed to restore the eleven digital data, and each of the plurality of digital data is reproduced.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings. still,
The configuration of the digital data storage and reproducing apparatus in this embodiment is the same as that explained with reference to FIG. Repetition of these explanations will be omitted as the same ones will be used.

Moreover, FIG. 3 shows a data compression processing circuit diagram provided in the CPU I, and in the figure, 301, 302° 303.3
04 indicates each 1-6 bit digital data which is periodically converted into digital data at a constant period by the A/D 10. For example, ant 81j 821
a, , are each one digital data 3C) 1-
O~3, 4~7, 8~11. ．． 12 to]-5 each (divided data group) is shown.

305, 306, and 307 are the left shift means 351. to 4 pits 1, respectively. ．． Digital data output from 352 and 353 (hereinafter, general digital data is
The 4-bit left shift 1 to means 351, 352, and 353 shift the digital data 304 to the left by 4 pinpoints.

308, 309, and 310 are respectively digitals.

This is a logical product means for logical product of the file data 301, 302, 303 and the illustrated mask pattern 341. And 311, 312, 313 are respective logical product means 308, 30
This is the result data output from 9,310, and is input to the corresponding logical sum means 3], 7,318, and 319.

314, 315, 316 are the data 305°306.
307 and the mask pattern 342, and its output data is the logical sum means 317,
Enter in 318 and 319.

321, 322, and 323 are data (digital data) obtained by compressing the digital data 301 to 304, and are written into the memory 12. Note that 'Fl(J) in the mask patterns 341 and 342 indicates 4-bit all LL I I+ data.

FIG. 4 is a data reproduction processing circuit diagram provided within the CPU II. In the figure, 401, 402, 403 are the results of logical product of the compressed data 321, 322, 323 read from the memory 12 and the mask pattern 342 by logical product means 406, 405, 404, respectively. Data 441, 442, 443, respectively,
This is a 4-bit right shift means for shifting 4 bits to the right. Note that 415 and 416 are logical sum means. 407,408
．． 409 are the compressed data 321, respectively.
, 322, 323 and the mask pattern 341, 411, 412, 413, 414 are the result data output from the AND means 407 to 409.4 bit right shift means 403, respectively; Code section 4-bit reproduction processing means 421, 422, 423, and 424 that reproduce the code section 21 of the four digital data based on the data 321, 322, and 323 are reproduced digital data, respectively, and the digital data 301, 424, and 424 are reproduced digital data. 302, 303, and 304.

Next, the operation will be explained. First, the data compression process in FIG. 3 will be explained.

First, A/D converted digital data 301.30
In order to erase bits 15 to 12 of the code part 21 of the digital data 301, 302, and 303, the bits 15 to 12 of the code part 21 of the digital data 301, 302, and
The logical product is performed by the logical product means 308, 309, and 310. And the result data of this AND is 311, 312
, 313.

Next, in order to move bits 11 to 8 of the digital data 304 to bits 15 to 12 of the result data 311, the digital data 304 is shifted to the left by 4 bits by 4 bits by the left shift means 351, and the digital data 305
make. When this digital data 305 and the mask pattern 342 are logically ANDed, and the resultant data and the data 311 are logically summed, this is compressed data 321.

Similarly, in order to move bits 7 to 4 of digital data 304 to bits 15 to 12 of data 312, digital data 305 is shifted 4 bits to the left by 1 to 1.
, create digital data 306. Then, the digital data 306 and the mask pattern 342 are logically ANDed, and the resulting data and the data 312 are logically summed to create compressed data 322. Next, in order to move bits 3 to 0 of digital data 304 to bits 15 to 12 of data 313, data 306 is shifted to the left by 4 bits 1 to create data 307. This data 307 and the mask pattern 342 are logically ANDed, and then the resultant data and the data 313 are logically summed to create compressed data 323. By performing data compression processing on the four digital data 301, 302, 303, and 304 in this way, the three data 301, 302, 303, and 304 are
The data is compressed to 21,322,323 and written to the memory 12. In this case, a data group d is obtained by dividing one digital data 304 into 4-bit units among a plurality of (four) pieces of digital data 30], -304. l dl
l d2 is the remaining three digital data 11301,
302, 303 (7) Signed data part 20 which is the effective part
data compression.

Next, data 321, 322, 3 subjected to data compression processing will be explained about the data reproduction processing in FIG.
Data d 2 + d x + of a data group of digital data 304 divided into 23 pitches 1 to 15 to 12
Since cl and o are stored, these are taken out and reproduced, and also reproduced in the 4th bin 1 of the code section 21 of each data.

Data 321, 322, 323 and mask pattern 341
and the logical product means 407, 408, 409, and the result data 4], 1, 43-2.

4] Create -3. Next, data 321, 322゜32
3 and the mask pattern 342, and the resultant data 44.3, 442, 4.41 are created. Here, in order to create result data 4]4, data 441 is shifted right to 4 pino 1 by means 401-, 4 pino 1 is shifted to the right, and data 45]- is created. Next, this data 45]
and data 442 to create data 4 (31). Then, this data 461 is shifted 4 hits to the right to create data 471.

Further, this data 471 and data 443 are logically summed to create data 48]-. And this data 481-
, by shifting 4 bits to the right, the resultant data 4]-4
is created. Result data 41↑ created in this way,
4.1-2.41.3, 414, since the bits 15 to 12 to the 4 bits 1 of the code section 21 are ff O++, this is the code 4 bits 1 - reproduction processing means 420. Play with. Each result data 411. ,412.413,
In each data of 414, bits 1 to 1] go to code bit 1, so bit 11 is II O++, bit] -5 to
12 are all LL OI+ If bit 11 is 111 ++, all the pins 1 to 15 to 12 are also processed to 1'', and data 4.2], 422, 423.424 are reproduced.

In addition, in the above embodiment, the signed data section 20 compresses CogPi1 to Data, but it may also be data of Pi1 to Number of other capacities such as 8 bits I to data.
In that case, the same effects as in the above embodiment can be achieved.

〔Effect of the invention〕

As described in -1- below, according to the present invention, for example, 1-6 bit digital data is stored in the storage device as 12 bit data, and this stored data is stored in the 10 pin h
By restoring the data to digital data and making it playable, the actual storage capacity can be greatly increased without increasing the hardware capacity of the storage device. (1) It is possible to obtain a digital data storage/reproduction device which can be made small in size and manufactured at low cost.

[Brief explanation of the drawing]

Fig. 1 is a system block diagram of an embodiment of the present invention and a conventional digital data storage/reproduction device, Fig. 2 is a data configuration diagram of digital data, Fig. 3 is a data compression processing circuit diagram, and Fig. 4 is a data FIG. 3 is a reproduction processing circuit diagram. 10 is an analog/digital converter, 11- is a CPU,
12 is a memory (storage device); 13 is an input/output processing unit; 20
is the sign (=t data part (effective part), 30], 302, 3
03 and 304 are digital data. Patent applicant Mitsubishi Electric Corporation

Claims (1)

[Claims] In a digital data storage/reproduction method in which digital data obtained by periodically converting an analog output signal from analog to digital is stored in a storage device and the stored digital data is reproduced, effective parts of a plurality of pieces of digital data are respectively extracted, and dividing one digital data among the plurality of digital data into a plurality of data groups, and adding each divided data group to the effective part of each remaining digital data of the plurality of digital data; The data is compressed and stored in the storage device, and at the time of playback, the divided data group added to the valid part of the remaining digital data is removed to restore the one digital data, and the plurality of digital data are A digital data storage/reproduction method characterized by restoring and reproducing each data.