JPH01270258A - Digital system - Google Patents

Abstract

PURPOSE:To miniaturize a large-scale digital system, and to vary IC circuits flexibly by arranging a plurality of programmable-logic ICs mutually connected on a substrate, transferring the circuit definition information in accord with a wiring pattern and using the information. CONSTITUTION:A plurality of programmable-logic ICs 8-16 connected by a wiring pattern 17 fixed to a substrate 1 are disposed, and the internal logic circuits, input/output circuits and internal connection of the programmable-logic ICs 8-16 are conformed to the fixed wiring pattern in order to realize a desired function. Accordingly, a large-scale digital system can be miniaturized, the content circuit definition information of the programmable-logic ICs 8-16 can be altered to the extent that the information can be adapted to the fixed wirings on the substrate and flexibility is increased, and all functions can be realized by one kind of the substrate.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to an apparatus for efficiently realizing a large-scale digital system, and in particular, the internal logic circuits, input/output circuits, and internal connections can be changed by external information. When realizing a desired function using a large number of integrated circuits (hereinafter referred to as programmable logic ICs), programmable
The present invention relates to a digital device including a method of transferring circuit definition information of a logic IC and a method of supplying clock pulses to a programmable logic IC.

BACKGROUND OF THE INVENTION Recent digital systems are becoming larger and faster, and the method of implementing the desired system has become a major issue.

For example, ID is trying to improve the picture quality of television.
TV (Improved Definition)
Talavigion) systems and field memory application systems for realizing the special playback function of video tape recorders include so-called digital signal processing such as digital filters and modulation/demodulation, and the scale of these systems ranges from a few hundred gates to It extends to Kogata Gate.

When implementing such a system, conventional general-purpose SS
X (Small 5cale xintegrate
a C1rcuit), MSI (Middle
5cale Integrated Circuit
), the scale would be huge,
Since it cannot be stored in a TV or VTR case, gate arrays, standard cells, and custom LSI (L
arge 5cale Integrated Circ
It is possible to miniaturize the device by integrating it into a device such as a device.

However, at the stage of developing the LSI, a functional model that operates in real time is usually required.

Although it is not necessary to prototype a functional model when developing an LSI, it is useful in fields such as interfaces with mechanical parts such as servos, video signal processing, and other fields where it is necessary to judge image quality based on large amounts of input data (e.g., moving images). It can be said that it is essential.

In such cases, you can prototype one or two units using SSX or MSI and use them as a so-called breadboard circuit to determine LSI specifications and
Used for circuit confirmation.

It is desirable that the scale of these breadboard circuits be as small as possible, so recently PLD (
Programmable Logic Device
) are also used, but PLDs are also SSI and MSI
Only a few pieces can be accommodated, and extreme reduction in scale cannot be expected.

Problems to be Solved by the Invention When implementing a large-scale digital system as described above, using conventional SSI, MSI, and PLD, there are the following problems.

First, the scale will be extremely large.

For example, a digital system equivalent to 100,000 gates is SSX
If 11C is to have the function equivalent to 20 gates, 5,000 ICs will be required. If 60 ICs are to be mounted on one board, 1,100 printed boards will be required, which would require storage in a rack approximately 2 meters high. In this way, space is a direct problem, but as the size of the pond increases, the wiring distance becomes longer, and there are many troubles during prototyping such as noise intrusion and common resistance of the ground line, making prototyping difficult. There is also.

Second, there is a problem in that circuits constructed using SSI or MSI lack flexibility in response to system changes and circuit changes.

Since the wiring or patterns are designed so that each board has a different function, it is extremely difficult to change it once a prototype is produced.

Generally, when used as a functional model, specifications and circuit changes are usually required, so this flexibility is extremely important in terms of development efficiency.

Thirdly, there is the issue of the amount of effort required for circuit design and prototyping.

As mentioned above, there are so many types of circuit boards to be wired and pattern designed that the amount of work involved in designing and prototyping is enormous, and it takes a long time to complete a digital system such as a functional model. It turns out.

Fourthly, it is economical when used as a functional model.

After confirming operation with a functional model and designing an LSI, in most cases, once the development is complete, the functional model is discarded along with the board on which the RC is mounted, resulting in a large amount of costs for parts and board design. It is a temporary type that is not economical because it is wasted only once.

As described above, there are many problems when implementing a large-scale digital system or configuring a functional model of an LSI using conventional methods.

In view of these points, the present invention aims to provide a digital device that can make a large-scale digital system compact and that can flexibly cope with circuit changes.

Means for Solving the Problems In the present invention, when realizing a digital system, a plurality of programmable logic ICs connected by a wiring pattern fixed to a substrate are arranged, and the above programmable logic ICs are arranged to realize a desired function.・The internal logic circuit, input/output circuit, and internal connections of LogicE C are configured to match the above fixed wiring pattern.

Further, a plurality of such boards are used and mounted on a rack to realize a digital system, and the circuit definition information of the programmable logic RC is transferred from a commonly connected circuit definition information line.

In addition, the clock line that supplies clock lines to the programmable logic ICs is configured to be a fixed wiring line that takes impedance matching and clock skew between adjacent programmable logic ICs into consideration.

Effect of the Invention The present invention realizes a board on which many highly integrated programmable logic ICs are mounted with the above-described configuration, so that a large-scale digital system can be compacted, and the internal circuit of the programmable logic rC can be reduced. It is highly flexible as the definition information can be changed within the range that matches the fixed wiring on the board.

Furthermore, development efficiency is high because all functions can be realized with one type of board.

Furthermore, since both the programmable logic Xc and the board can be reused, it is also highly economical.

Embodiment Hereinafter, an embodiment of the digital device of the present invention will be described with reference to the drawings.

1, ' and 2 are block diagrams showing an embodiment of a substrate forming a basic part of a digital device according to the present invention.

1 is a board, 2 is an input line, and normally an n-bit digital signal is input to the board 1.

3 represents an output line, which normally outputs m-bit digital signals from the board 1.

Reference numeral 4 denotes a circuit definition information line, into which information for realizing the functions of the board 1 is input.

5 and 6 are input/output interface circuits, and in the case of FIG. 1, 6 is the input buffer 76' and 20 is the output vanofer 6'.

T is a coder circuit which serves to supply circuit information of the programmable logic ICs 8 to 16 to each programmable logic IC according to the information from the circuit definition information line 4.

Reference numeral 17 indicates mutual wiring between programmable logic devices C8 and C9.

18 and 19 shown in FIG. 2 are exactly the same as the board 1 shown in FIG. Among the address information and circuit information sent from the line 4, the address information is decoded by the decoder 7, and the programmable logic IC of the board at the specified address is decoded.
Transfer circuit definition information only to

2o is a motherboard fixed to the back of the rack on which boards 1, 18, and 19 are mounted. Pass lines connected in parallel to each board 1, 18, and 19 are wired on the motherboard 20.

In Fig. 2h, the configuration is made up of three substrates, but of course it can be configured with any number of substrates as long as unique addresses are attached.

Further, circuit definition information of the programmable logic IC is inputted from a terminal on dedicated software of the personal computer 21.

The circuit definition information is connected to the circuit definition information line 4 via the interface 22, and the circuit information is transferred as described above.

Here, the functions of the programmable logic IC will be explained.

A programmable logic IC is capable of arbitrarily realizing small-scale digital functions by itself.

That is, it has logic circuits and input/output circuits as basic blocks inside, and wiring between internal blocks can be set freely.

Therefore, a designer can realize a desired circuit operation by selecting and combining circuit specifications and interconnections.

Next, a digital device according to another embodiment of the present invention will be described with reference to the drawings.

FIG. 3 is an embodiment of a substrate of a digital device according to the present invention.

23 is a substrate, and 24 to 36 are programmable logic ICs arranged on the substrate.

36 and 37 are clock drivers, 38 are supply lines from outside the board for clock pulses that operate the programmable logic IC, and 39 are programmable logic ICs.
A clock line 40 supplies clocks to the programmable logics xc3o to xc36.

Here, when attempting to operate a programmable logic IC with high-speed clock pulses, the higher the clock frequency becomes, the more problems arise with impedance matching of clock lines and clock skew between programmable logic ICs.

First, regarding impedance matching, this problem can be solved by supplying a single clock line to the programmable logic IC without branching and adding terminating resistors 41 to 44.

Next, regarding clock skew, it is necessary to take into account the physical length of the clock line when wiring.

This will be explained using drawings.

In FIG. 3, the wiring delay per unit length of the clock line 39 is assumed to be 1 nsec. If the time reference is set at the five output points of the clock driver 36, at point B, 1 nsec,
At point B it is 2n860. Point l) has a delay of 3 nsec, and similarly, points 5 have a delay of 9 n5ac with respect to point M.

The same can be considered for the clock line 4o.

Here, taking an example of the programmable logic 1027, the adjacent programmable logic ICs are programmable logic IO24-26, 28-30.
There are 7 pieces of 32.34.

Of these, clock skew is programmable at best.
This is 3 nsec for the logic XC29.

For ponds, all are 1 n560 or 21 seconds.

Also, if multiple clock pulses are required, they can be selected using a multiplexer.

In FIG. 3, 45 is a multiplexer that selects one clock pulse (of course, multiple clock pulses are possible if the number of clock drivers and clock lines is increased) from a plurality of clock pulses supplied from the pass line through the clock pulse supply line 38. do.

46 is a control signal for the multiplexer 46, which is a signal indicating which clock pulse is selected.

Effects of the Invention As is clear from the above description, the present invention arranges a plurality of programmable logics 10 connected to each other on a substrate, and connects the internal logic circuits and inputs of the programmable logic IC to realize a desired function. Since the output circuit and internal connections are configured so that circuit definition information can be transferred and used to match the wiring pattern, a large-scale digital system can be made compact and can be changed flexibly.

In addition, this board also solves problems such as impedance matching and clock skew for clock lines, which are always problems when implementing digital signal processing circuits, so you can easily solve them when building or changing a system. You can do it without thinking about it.

Furthermore, not only large-scale digital logic circuits, but also audio-related and video-related digital signal processing systems, LS
Since all kinds of digital systems such as functional models for I development can be realized on the same board, not only is development and prototyping efficiency high, but when the board is no longer needed, it can be used as is in the Ike system, including the programmable LogicE C. Since it can be used for other purposes, it is economically superior and has extremely large industrial value.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of a substrate forming a basic part of a digital device according to the present invention, FIG. 2 is a block diagram showing an embodiment of a digital device according to the present invention, and FIG. 1 is a block diagram illustrating an embodiment of a circuit board of a digital device; FIG. 1.1B, 19.23... Board, 4...
・Circuit definition information line, 7...Decoder circuit, 8-1
6, 24-35...Programmable logic IC117...Interconnection, 39.40...
...Clock line, 41-44...Terminal resistor.

Claims (6)

[Claims] (1) Programmable logic ICs connected to each other
What is claimed is: 1. A digital device comprising: a board on which a plurality of boards are arranged; and a connection line that connects the boards to each other. (2) Circuit definition information in which circuit definition information representing the state of internal logic circuits, input/output circuits, and internal connections for realizing the desired functions of the programmable logic IC on the board is connected in parallel to each of the boards. 2. The digital device according to claim 1, wherein the digital device is configured to send data to each board via a line. (3) A digital device characterized in that a plurality of programmable logic ICs are arranged on a substrate, and clock pulses are supplied from a clock line connected in parallel to each of the programmable logic ICs. (4) Claim (3) characterized in that a plurality of programmable logic ICs arranged on a substrate are divided into blocks of a predetermined number, and clock pulses are supplied from divided clock lines for each block. The digital device described. (5) Programmable logic ICs adjacent on the board
4. The digital device according to claim 3, wherein the clock line is designed in consideration of the wiring route on the substrate in order to minimize mutual clock skew. (6) The configuration includes a plurality of clock pulse supply lines that supply clock pulses from outside the board and a multiplexer connected to the clock pulse supply lines, and is configured to select a desired clock pulse from among the clock pulses. The digital device according to claim 3, characterized in that: