JPH0126595B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a carrier color signal processing circuit suitable for recording and reproducing apparatuses such as SECAM type color television signals.

In recent years, so-called home video tape recorders (hereinafter referred to as VTRs), which have become widespread in general households, use a frequency modulated wave for the luminance signal and a low frequency modulated carrier color signal when recording and reproducing color television signals. A recording and reproducing method using signals is adopted. The recording and reproducing method described above is adopted when recording and reproducing color television signals of any standard method, but in the NTSC, PAL and SECAM methods, the carrier color signal during recording is converted to a low frequency signal. The difference between the method of converting into a signal and the method of converting a low frequency signal during reproduction into a carrier color signal of the original frequency is that the former two methods use frequency conversion, whereas the latter method uses frequency multiplication and down-down.

By the way, as is well known, the carrier color signal of the color television signal of the SECAM system is a frequency modulated signal, and during recording and reproduction, processing is performed to make the amplitude constant by a limiter circuit.
In this process, due to the action of the limiter circuit, the carrier color signal is extended within the horizontal and vertical retrace periods in which no signal originally exists, and undesired signals are mixed into the horizontal and vertical retrace periods. During playback, the carrier color signal, which has returned to its original frequency, is mixed with the frequency demodulated luminance signal and sent to the receiver as a SECAM color television signal. If the above-mentioned undesired signal is mixed in the period, the synchronization signal of the horizontal and vertical retrace periods of the SECAM color television signal will be buried in the undesired signal as a result of mixing the carrier color signal and the luminance signal. As a result, synchronization separation in the receiver cannot be performed properly, resulting in image distortion.

Therefore, in order to remove such undesired signals, VTRs that record and reproduce SECM color television signals are provided with a carrier color signal processing circuit that includes a gate circuit that is closed during the horizontal and vertical retrace periods.

FIG. 1 is a block diagram showing an example of a conventional carrier color signal processing circuit, in which 1 is an input terminal, 2 is a gate circuit, 3 is an output terminal, 4 is an input terminal, 5 and 6 are gate pulse generation circuits, 7 is a mixing circuit.

FIGS. 2A, B, C, D, E, and F are signal waveform diagrams showing signals in each portion of FIG. 1, and signals corresponding to those in FIG. 1 are given the same symbols.

Next, the operation of this prior art will be explained.

In FIGS. 1 and 2 A to F, a carrier color signal e from an input terminal 1 is supplied to a gate circuit 2, and a composite synchronization signal a from an input terminal 4 is supplied to gate pulse generation circuits 5 and 6. .

The gate pulse generating circuit 5 separates the horizontal synchronizing signal g from the composite synchronizing signal a, and generates a horizontal gate pulse b having a pulse width equal to the width of the horizontal retrace period. The gate pulse generation circuit 6 generates a composite synchronization signal a
A vertical synchronizing signal h is separated from the vertical synchronizing signal h, and a vertical gate pulse c having a pulse width equal to the width of this vertical synchronizing signal h is generated. These horizontal gate pulses b and vertical gate pulses c are mixed in a mixing circuit 7 and supplied to the gate circuit 2 as a gate pulse d.

A limiter circuit (not shown) is connected to the carrier color signal e.
An undesired signal i is present during the horizontal and vertical retrace periods, while the gate circuit 2 closes the horizontal retrace period and the vertical synchronization signal period of the carrier color signal e by the gate pulse d, and closes the horizontal retrace period and the vertical synchronization signal period of the carrier color signal e, and also closes the period As a result, the output terminal 3 is opened from the gate circuit 2.
Then, a carrier color signal f from which undesired signals are removed during the horizontal retrace period and the vertical synchronizing signal period is obtained.

As described above, the conventional carrier color signal processing circuit removes undesirable signals mixed into the carrier color signal. However, in this prior art, in order to generate the gate pulse,
This requires a circuit that generates horizontal and vertical gate pulses from the horizontal and vertical synchronizing signals, respectively, and a circuit that mixes these horizontal and vertical gate pulses, which has the drawback of making the carrier color signal processing circuit complicated and large. . Furthermore, in the above-mentioned conventional technology, it is difficult to completely remove undesired signals over the entire vertical retrace period, and undesired signals inevitably remain during the equalization pulse period of the carrier color signal. For this reason, the horizontal synchronizing signal cannot be properly separated during the equalization pulse period, resulting in distortion in the upper part of the reproduced screen.

The purpose of the present invention is to eliminate the drawbacks of the above-mentioned prior art,
With a simple circuit configuration, undesired signals can be removed throughout the horizontal and vertical retrace periods of the carrier color signal, making it possible to obtain a reproduced image with good quality and no distortion. It is provided to the signal processing circuit.

To achieve this objective, the present invention directly forms a gate pulse consisting of pulses with pulse widths equal to the horizontal and vertical retrace periods, respectively, from the composite synchronization signal, without separating the horizontal and vertical synchronization signals. ,
The present invention is characterized in that, by using the gate pulse, it is possible to remove undesired signals present in the horizontal and vertical retrace periods of the carrier color signal.

In the composite synchronization signal, the period of 9H (however, H is the horizontal scanning period) consisting of the vertical synchronization signal and the equalization pulses before and after it and the other periods are T _H /2 (however, T _H is the horizontal scanning period). One difference is that the latter contains pulses with a period equal to the period of the synchronizing signal, whereas the latter does not contain such pulses.

Note that, hereinafter, the former will be referred to as the 9H period, and the latter will consist of only the horizontal synchronization signal and will be referred to as a period other than the 9H period. The present invention has been made by focusing on the difference between the two, and utilizes the difference in the period of the pulse signals included in the two.

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 3 is a block diagram showing an embodiment of the carrier color signal processing circuit according to the present invention, in which 8 is a retrigger mono multivibrator, 9 is a mono multivibrator, and the parts corresponding to FIG. 1 are the same. Some explanations will be omitted by adding symbols.

4A, B, C, D, and E are signal waveform diagrams showing signals in each portion of FIG. 3, and corresponding signals in FIG. 3 are given the same symbols.

Next, the operation of this embodiment will be explained.

In FIGS. 3 and 4 A to E, a positive composite synchronization signal a is supplied from the input terminal 4 to the retrigger mono multivibrator 8 (hereinafter, "mono multivibrator" will be abbreviated as "mono multi"). be done. Retrigger monomulti 8 time constant T _t1
is set to be sufficiently longer than T _H /2 and slightly shorter than T _H , and when triggered, the output level becomes a high level, and if the time constant period T _t1 is not triggered, the output level remains at a low level. It becomes stable.

The retrigger monomulti 8 is triggered at each falling edge of the composite synchronization signal a. However, in the period _T1 other than the 9H period, the retrigger monomulti 8 is triggered at each falling edge of the horizontal synchronizing signal g, and returns to a stable state just before the falling edge of the next horizontal synchronizing signal.
In the 9H period T ₂ , if triggered at the falling edge of the last horizontal synchronizing signal g ₁ in the period T ₁ other than the 9H period, it will be triggered sequentially at the falling edge of the pulse g' of T _H /2 before returning to a stable state. triggered and the triggered state continues,
The stable state is restored immediately before the second horizontal synchronization signal _g2 in a period _T1 other than the next 9H period. Then, in a period _T1 other than the next 9H period, the triggering and the return to the stable state just before are repeated again every time the horizontal synchronizing signal falls.

Therefore, from re-trigger mono multi 8, 9H
In a period T ₁ other than the period T 1 , a high-level pulse with a period T _H and a width T _t1 is obtained, and in a 9H period T ₂ , an output signal j that continues at a high level is obtained. This output signal j
is supplied to the monomulti 9, and triggers the monomulti 9 every time it falls.

When the monomulti 9 is in a stable state, the output level is high, and when triggered, the output level is low, and the time constant T _t2 is longer than the horizontal retrace period width than the period T _H of the horizontal synchronization signal. It is set shorter by T _b . However, from the monomulti 9, in a period T ₁ other than the 9H period, there is a high level pulse with a period T _H and a width equal to the width T _b which is equal to the horizontal retrace period, and in a 9H period T ₂ , a high level pulse is generated. A gate pulse k is obtained.

Therefore, the gate pulse k is supplied to the gate circuit 2, and during the high level period of the gate pulse k, the gate circuit 2
is closed to remove the undesired signal i present during the horizontal and vertical retrace periods of the carrier color signal e. As mentioned above, the gate pulse k is at a high level during the horizontal retrace period in period _T1 other than the 9H period, and during the 9H period
Since the level is high at _T2 , a carrier color signal f from which the undesired signal i is removed is obtained not only during the horizontal retrace period but also throughout the vertical retrace period including the 9H period _T2 .

Incidentally, near the start of the vertical retrace period of the carrier color signal f, the undesired signal i remains for a period corresponding to the time constant T _t2 of the monomulti 9. This is because the monomulti 9 is triggered by the last fall of the period _T1 other than the 9H period of the output signal j, and the gate pulse k
This is the result of an unnecessary low-level period T _o (T _o = T _t2 ) occurring in It is not enough to cause any particular synchronization disturbance on the machine. Further, the falling point of the gate pulse k can be set by the time constant of the re-trigger monomulti 8, and the rising point can be set by the time constant of the monomulti 9.

As described above, in this embodiment, gate pulses can be created directly from a plurality of synchronization signals by simply providing a retrigger mono-multi and a mono-multi, and the circuit configuration can be greatly simplified. Further, it is possible to remove undesired signals throughout the horizontal and vertical retrace periods, and distortion of reproduced images can be prevented.

FIG. 5 is a block diagram showing another embodiment of the carrier color signal processing circuit according to the present invention, in which 10 is a retrigger mono-multi, 11 and 12 are mono-multi, and the parts corresponding to FIG. They are given the same code.

6A, B, C, D, E, and F are signal waveform diagrams showing signals in each portion of FIG. 5, and signals corresponding to those in FIG. 5 are given the same reference numerals.

Next, the operation of this embodiment will be explained.

In FIGS. 5 and 6A to 6F, a positive composite synchronization signal a is supplied from the input terminal 4 to the retrigger monomulti 10. The time constant T _t3 of the retrigger monomulti 10 is set to T _H /2<T _t3 < _TH , and the output level is low in a stable state, but becomes high when triggered.

The retrigger monomulti 10 is triggered on each rising edge of the composite synchronization signal a. However, from retrigger monomulti 10, periods other than the 9H period
At T ₁ , it is a high level pulse with period T _H and width T _t3 , and the last horizontal synchronization signal of period T ₁ other than the 9H period
An output signal ₁ is generated that is at a high level from the rising edge of g ₁ to before the second horizontal synchronizing signal g 2 in a period T ₁ other than the next 9H period, including the 9H period T ₂ .

Next, this output signal l is supplied to the monomulti 11. The monomulti 11 has a time constant T _t4 , and the output level is low in a stable state, but is triggered every time the output signal l rises, and the output level becomes high. Therefore, from the monomulti 11, an output signal m is obtained which is a high level pulse with a pulse width T _t4 during periods T ₁ other than the 9H period, and is a low level pulse during the 9H period T ₂ .

Further, the output signal m is supplied to the monomulti 12. Mono multi 12 is the period T _H of the horizontal synchronization signal
It has a time constant T _t5 that is shorter by the horizontal retrace period T _b , and the output level is high in a stable state, but is triggered each time the output signal m falls, and the output level becomes low. However, from MonoMulti 12, in period T ₁ other than the 9H period, the period T _H
In the 9H period _T2 , a gate pulse n is obtained which is a high level pulse with a pulse width _Tb and which is a high level.

The gate pulse n is supplied to the gate circuit 2 to obtain a carrier color signal f from which an undesired signal i is removed from the carrier color signal e, as in the embodiment shown in FIG. Although the undesired signal i remains in the carrier color signal f, this does not pose a particular problem for the same reason as described in the embodiment of FIG.

In this example, the retrigger monomulti 10,
With a simple circuit configuration consisting of monomulti 11 and 12, gate pulse n can be directly formed from the composite synchronization signal, and the falling point of gate pulse n is determined by the time constant of monomulti 11, and the rising time is determined by the mono It can be set using the multi-twelve time constants.

FIG. 7 is a block diagram showing still another embodiment of the carrier color signal processing circuit according to the present invention.
is a re-trigger mono multi, 14 is an integration circuit, 15
1 is a diode, 16 is a monomulti, parts corresponding to those in FIG. 1 are given the same reference numerals, and some explanations are omitted.

8A, B, C, D, E, and F are signal waveform diagrams showing signals of each portion in FIG. 7, and are given the same symbols as the corresponding signals in FIG. 7.

Next, the operation of this embodiment will be explained.

7 and 8A to 8F, the processing operation of the retrigger monomulti 13 receiving the composite synchronization signal a is the same as that of the retrigger monomulti 10 in the embodiment of FIG. The signal p is also the same as the output signal l.

The output signal p is supplied to the integrating circuit 14, and its rise slopes with the time constant of the integrating circuit 14. The integrator circuit 14 is saturated after a period of time determined by a time constant, and when the output signal p falls, the diode 15 is made conductive and the output level is suddenly reduced to a low level.
However, an output signal g whose rise is sloped and whose fall is steep is obtained from the integrating circuit 14.

The output signal g is supplied to the monomulti 16. The monomulti 16 has a threshold E _s and is triggered at the level of the threshold E _s at the rising edge of the output signal g. The mono multi 16 has a high output level in a stable state, and a time constant when triggered.
The output level becomes low at T _t6 . The time constant T _t6 is longer than the horizontal blanking period T _b than the period T _H of the horizontal synchronizing signal.
is set shorter.

However, from the monomulti 16, a gate pulse r is obtained which is a high level pulse with a period T _H and a pulse width T _b in a period T ₁ other than the 9H period, and is a high level pulse in a 9H period T ₂ .

The operation of the gate circuit 2 by the gate pulse r is as follows:
This embodiment is similar to each of the embodiments described above, and the obtained carrier color signal f is also the same.

In this embodiment, the retrigger monomulti 13,
The gate pulse r can be directly formed from the composite synchronization signal with a simple circuit configuration consisting of the integrating circuit 14 and the monomulti 16, and the rising time of the gate pulse r is determined by the time constant of the integrating circuit 14 and the threshold value of the monomulti 16. The rise time can be set by E _s and by the time constant of the monomulti 16. Since the falling time constant of the integrating circuit 14 is set to be sufficiently short due to the action of the diode 15, the residual part of the integration result is removed from the integrating circuit 14 at the rising edge of the output signal p. output signal p
Even if there are variations in pulse width, the integration circuit 14
The time point at which the output signal g starts falling, and therefore the trigger time point of the monomulti 16, has no temporal variation with respect to the time point at which the output signal p of the re-trigger mono multiplier 13 rises. However, there is no variation in the rising and falling points of the gate pulse r.

The embodiments of the present invention have been described above, but in these embodiments, the phase of the gate pulse and the pulse width with respect to the horizontal retrace period can be arbitrarily adjusted, and furthermore, the pulse width with respect to the 9H period is necessarily adjusted. That's what you get. However, it is possible to easily and precisely match the gate pulse with the horizontal and vertical retrace periods of the carrier color signal without requiring any special delay means, and the gate pulse can be easily and accurately matched with the horizontal and vertical retrace periods of the carrier color signal. It is possible to completely eliminate undesired signals. In addition, in the above example,
Although the description has been made with reference to the carrier color signal of the SECAM method, the present invention is not limited to this and can be applied to carrier color signals of other methods. Furthermore, it is obvious that the recording/reproducing device may be not only a VTR but also other recording/reproducing devices such as a video disc.

As explained above, according to the present invention, it is possible to directly obtain a gate pulse with a pulse width matching the horizontal and vertical retrace periods from the composite synchronization signal without separating the horizontal and vertical synchronization signals. With a simple circuit configuration, it is possible to completely remove undesired signals throughout the horizontal and vertical retrace periods of the carrier color signal, and it is possible to obtain a reproduced image with no distortion and good image quality. It is possible to provide a carrier color signal with excellent functions not found in the prior art at a low cost.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an example of a conventional carrier color signal processing circuit, FIGS. 2A to F are signal waveform diagrams showing signals of each part in FIG. 1, and FIG. 3 is a carrier color signal processing according to the present invention. A block diagram showing one embodiment of the circuit, FIGS. 4A to 4E are signal waveform diagrams showing signals of each part of FIG. 3, and FIG. 5 is a block diagram showing another embodiment of the carrier color signal of the present invention. , Figure 6 A to F
are signal waveform diagrams showing the signals of each part in Fig. 5, Fig. 7
This figure is a block diagram showing still another embodiment of the carrier color signal according to the present invention, and FIGS. 8A to 8F are signal waveform diagrams showing signals of each part in FIG. 7. 1... Input terminal, 2... Gate circuit, 3... Output terminal, 4... Input terminal, 8, 10, 13... Re-trigger mono multivibrator, 9, 11, 1
2, 16... Mono multivibrator, 14...
Integrating circuit, 15...diode.

Claims (1)

[Claims] 1. In a carrier color signal processing circuit that removes undesired signals mixed in during the retrace period of the carrier color signal by supplying the carrier color signal to a gate circuit, a complex synchronization a first means consisting of a retriggerable mono-multivibrator triggered by a signal and having a time constant αH (where 0.5<α<1, H is one horizontal scanning period); a second pulse signal provided with a first pulse signal and generating a second pulse signal within each retrace period of the carrier color signal;
By providing means for supplying the second pulse signal generated by the second means to the gate circuit as a gate pulse signal, the gate circuit can be turned off during the period of the gate pulse signal. A carrier color signal processing circuit characterized in that it is configured as follows. 2. In claim 1, the second means comprises a mono-multivibrator that is triggered at the trailing edge of the first pulse signal, has a trailing edge at the trigger point, and has a time constant. A carrier color signal processing circuit, characterized in that it is configured to be able to generate the second pulse signal having a leading edge set by. 3. In claim 1, the second means includes a first mono-multivibrator triggered by the leading edge of the first pulse signal, and an output pulse from the first mono-multivibrator. a second mono-multivibrator triggered by a trailing edge of the signal, the second mono-multivibrator having a trailing edge at the time of triggering of the second mono-multivibrator and having a leading edge set by a time constant; A carrier color signal processing circuit characterized in that it is configured to be able to generate two pulse signals. 4. In claim 1, the second means includes an integrating circuit that integrates the first pulse signal and generates a pulse signal having a leading edge that slopes at a predetermined time constant; a mono-multivibrator that is triggered at a predetermined level of the leading edge of the second mono-multivibrator, and has a trailing edge at the trigger point of the mono-multivibrator, and the leading edge is set by a time constant. A carrier color signal processing circuit characterized in that it is configured to be able to generate a pulse signal.