JPH01258514A - Light receiving circuit - Google Patents

Light receiving circuit

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Publication number
JPH01258514A
JPH01258514A JP63086865A JP8686588A JPH01258514A JP H01258514 A JPH01258514 A JP H01258514A JP 63086865 A JP63086865 A JP 63086865A JP 8686588 A JP8686588 A JP 8686588A JP H01258514 A JPH01258514 A JP H01258514A
Authority
JP
Japan
Prior art keywords
circuit
current
signal
input
voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63086865A
Other languages
Japanese (ja)
Inventor
Toshibumi Kono
河野 俊文
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP63086865A priority Critical patent/JPH01258514A/en
Publication of JPH01258514A publication Critical patent/JPH01258514A/en
Pending legal-status Critical Current

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  • Optical Communication System (AREA)

Abstract

PURPOSE:To easily detect an input disconnection by detecting a current to flow at a light receiving element, and when the detected value becomes the reference value or above specified beforehand, deciding that the input shut-off of a light signal is obtained. CONSTITUTION:A light signal 11 is received by an avalanche photo diode 1, converted to an electric signal, inputted through a current detecting circuit 9 to a pre-amplifying circuit 2, a prescribed amplifying is executed and thereafter, the signal is outputted from a terminal 12 through a gain variable amplifying circuit 3 and an equalizing circuit 4. On the other hand, the output of the equalizing circuit 4 is inputted through a peak detecting circuit 5 and direct current amplifying circuits 6 and 7 to a direct current voltage converting circuit 8. In this case, since the gain of the amplifying circuits 6 and 7 is set to the sufficiently large value, when a light input is absent, the amplifying circuit 3 becomes a maximum gain, the converting circuit 8 becomes the maximum voltage and the current to flow at the diode 1 also becomes maximum. Consequently, the current is detected by the current detecting circuit 9 and an alarm signal is outputted.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は光通信分野に利用される。[Detailed description of the invention] [Industrial application field] The present invention is utilized in the field of optical communications.

本発明は、光受信回路に関し、特に光入力断検出手段を
備えた光受信回路に関する。
The present invention relates to an optical receiving circuit, and more particularly to an optical receiving circuit equipped with optical input disconnection detection means.

〔概要〕 。〔overview〕 .

本発明は、光信号を受光する受光素子のバイアス電圧を
前記光信号の受光レベルに従って制御する手段備えた光
受信回路において、 前記受光素子に流れる電流を検出し、その検出された値
があらかじめ定められた基準値以上の場合、前記光信号
が入力断になったことを表す入力断アラーム信号を出力
することにより、簡単に入力断アラーム信号を出力でき
るようにしたものである。
The present invention provides an optical receiving circuit including a means for controlling a bias voltage of a light receiving element that receives an optical signal according to a reception level of the optical signal, in which a current flowing through the light receiving element is detected, and the detected value is determined in advance. When the optical signal exceeds the set reference value, an input disconnection alarm signal indicating that the input of the optical signal has been disconnected is outputted, so that the input disconnection alarm signal can be easily outputted.

〔従来の技術〕[Conventional technology]

一般に光デイジタル通信に右いて、光受信回路は、信号
再生のための識別回路への入力振幅を一定にするために
、等化回路の出力のピーク値を検出して利得制御増幅器
の利得を制御する方法(電気−AGC)と、受光素子で
あるアバランシェホトダイオードのバイアス電圧を制御
して、アバランシェホトダイオードの増倍率を制御する
方法(FULL−AGC)が併用されている。
In general, in optical digital communications, an optical receiver circuit detects the peak value of the output of an equalization circuit and controls the gain of a gain control amplifier in order to keep the input amplitude to the identification circuit for signal reproduction constant. (electrical AGC) and a method (FULL-AGC) in which the bias voltage of an avalanche photodiode, which is a light receiving element, is controlled to control the multiplication factor of the avalanche photodiode (FULL-AGC) are used together.

また、識別回路では、識別時点を決めるクロックを必要
とするが、これは等化回路の出力を帯域通過フィルタを
用いてタイミング成分(正弦波)を抽出し、IJ ミッ
タ回路によりクロックに変換して使用している。帯域通
過フィルタの出力であるタイミング成分は、光入力信号
の減少とともにタイミング成分のピーク値が減少してく
る。
In addition, the identification circuit requires a clock that determines the identification point, which is achieved by extracting the timing component (sine wave) from the output of the equalization circuit using a band-pass filter and converting it into a clock using an IJ mitter circuit. I am using it. The peak value of the timing component that is the output of the bandpass filter decreases as the optical input signal decreases.

従来、前記の性質を利用し、゛7′イミング成分のピー
ク値を検出し、そのレベルが基準値より下ると光入力断
アラーム信号を出力していた。
Conventionally, the peak value of the '7' timing component was detected using the above property, and when the level fell below a reference value, an optical input cutoff alarm signal was output.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

前述した従来の光入力断検出手段は、光入力が一定でも
、信号のマーク率により変動し、さらに光入力レベルが
小さいところでピーク値を検出するため、アラーム発出
のための識別点の設定が非常に微妙となり困難である欠
点があった。
In the conventional optical input disconnection detection means described above, even if the optical input is constant, it fluctuates depending on the mark rate of the signal, and the peak value is detected when the optical input level is small, so it is very difficult to set the identification point for issuing an alarm. However, there were drawbacks that made it difficult to understand.

本発明の目的は、前記の欠点を除去することにより、簡
単に入力断アラーム信号を出力できる光受信回路を提供
することにある。
SUMMARY OF THE INVENTION An object of the present invention is to provide an optical receiver circuit that can easily output an input disconnection alarm signal by eliminating the above-mentioned drawbacks.

〔問題点を解決するための手段〕[Means for solving problems]

本発明は、光信号を受光する受光素子と、この受光素子
のバイアス電圧を前記光信号の受光レベルに従って制御
するバイアス制御手段とを備えた光受信回路において、
前記受光素子に流れる電流を検出する電流検出手段と、
この電流検出手段の出力電圧があらかじめ与えられた基
準電圧以上の場合前記光信号の入力断を表す入力断アラ
ーム信号を出力する入力断アラーム出力手段とを含むこ
とを特徴とする。
The present invention provides an optical receiving circuit comprising a light receiving element that receives an optical signal and a bias control means that controls a bias voltage of the light receiving element according to a light reception level of the optical signal.
current detection means for detecting the current flowing through the light receiving element;
The present invention is characterized in that it includes input disconnection alarm output means for outputting an input disconnection alarm signal indicating input disconnection of the optical signal when the output voltage of the current detection means is equal to or higher than a predetermined reference voltage.

〔作用〕[Effect]

受光素子例えばアバランシェホトダイオードのバイアス
電圧は、光信号の受光レベルが小さくなるに従って大き
くなるようにバイアス制御手段によって制御され、アバ
ランシェホトダイオードの増倍率が大となり、その電気
的な光検出電流のレベルは一定となるようになる。すな
わち、光信号が入力断のときには、光信号の受光レベル
は零となり、これに対応してバイアス電圧はますます大
となり、アバランシェホトダイオードのブレークダウン
電圧V、に達し、アバランシェホトダイオードを流れる
電流は最大値に達する。
The bias voltage of a light-receiving element, such as an avalanche photodiode, is controlled by a bias control means so that it increases as the light reception level of the optical signal decreases, and the multiplication factor of the avalanche photodiode increases, and the level of its electrical photodetection current remains constant. It will become as follows. That is, when the input of the optical signal is cut off, the light reception level of the optical signal becomes zero, and the bias voltage increases accordingly, reaching the breakdown voltage of the avalanche photodiode, V, and the current flowing through the avalanche photodiode reaches its maximum. reach the value.

従って、電流検出手段で、アバランシェホトダイオード
の電流を挿入抵抗の両端に現れる電圧として検出し、ア
ラーム出力手段で、この検出された電圧値を、ブレーク
ダウン電圧Vaよりやや低目に設定した基準電圧V。と
比較しそれ以上の場合に、入力断アラーム信号を出力す
ることにより、簡単に入力断アラーム信号を設定出力す
ることが可能となる。
Therefore, the current detection means detects the current of the avalanche photodiode as a voltage appearing across the insertion resistor, and the alarm output means converts this detected voltage value to a reference voltage V set slightly lower than the breakdown voltage Va. . By outputting an input disconnection alarm signal when the input disconnection alarm signal is greater than , it becomes possible to easily set and output the input disconnection alarm signal.

〔実施例〕〔Example〕

以下、本発明の実施例について図面を参照して説明する
Embodiments of the present invention will be described below with reference to the drawings.

第1図は本発明の一実施例を示すブロック構成図および
第2図はその電流検出回路および比較回路の詳細を示す
回路図である。
FIG. 1 is a block diagram showing an embodiment of the present invention, and FIG. 2 is a circuit diagram showing details of a current detection circuit and a comparison circuit thereof.

第1図によると、本実施例は、光信号11を受光する受
光素子としてのアバランシェホトダイオード1と、この
アバランシェホトダイオード1のバイアス電圧を光信号
11の受光レベルに従って制御するバイアス制御手段と
しての、ピーク値検出回路5、直流増幅回路6、直流増
幅回路7および直流電圧変換回路8を備えた光受信回路
において、アバランシェホトダイオード1に流れる電流
を検出する電流検出手段としての電流検出回路9と、こ
の電流検出回路9の出力電圧が、基準電圧端子14から
あらかじめ与えられた′基準電圧V0以下の場合、光信
号11の入力断を表す入力断アラーム信号13aをアラ
ーム出力端子13から出力する、入力断アラーム出力手
段としての比較回路10とを含んでいる。なお、2は前
置増幅回路、3は利得可変増幅回路、4は等化回路およ
び12は等化信号12aが出力される等化出力端子であ
る。そして、直流増幅器6の出力は利得可変増幅回路3
にも接続される。
According to FIG. 1, this embodiment includes an avalanche photodiode 1 as a light-receiving element that receives an optical signal 11, and a bias voltage control means that controls the bias voltage of the avalanche photodiode 1 according to the reception level of the optical signal 11. In an optical receiving circuit including a value detection circuit 5, a DC amplification circuit 6, a DC amplification circuit 7, and a DC voltage conversion circuit 8, a current detection circuit 9 as a current detection means for detecting the current flowing in the avalanche photodiode 1, and this current When the output voltage of the detection circuit 9 is lower than the reference voltage V0 given in advance from the reference voltage terminal 14, an input disconnection alarm signal 13a representing input disconnection of the optical signal 11 is output from the alarm output terminal 13. It includes a comparison circuit 10 as an output means. Note that 2 is a preamplifier circuit, 3 is a variable gain amplifier circuit, 4 is an equalization circuit, and 12 is an equalization output terminal to which an equalized signal 12a is output. The output of the DC amplifier 6 is the variable gain amplifier circuit 3.
is also connected to.

第2図によると、直流検出回路9は、一端がアバランシ
ェホトダイオード1の出力に接続され他端が前置増幅回
路20人力に接続された抵抗R1と、抵抗R1の一端と
接地間に直列接続された抵抗R2およびR3と、抵抗R
1の他端と接地間に直列接続された抵抗R4およびR5
と、抵抗R4とR5の接続点と接地間に接続されたコン
デンサC2と、正相入力端子がコンデンサC1を介して
接地され、逆相入力端子が抵抗R7を介して抵抗R4と
R5との接続点に接続され、出力端子が抵抗R6を介し
て逆相入力端子に接続されるとともに比較回路10の一
方の人力に接続された演算増幅器15とを含んでいる。
According to FIG. 2, the DC detection circuit 9 includes a resistor R1, which has one end connected to the output of the avalanche photodiode 1 and the other end connected to the preamplifier circuit 20, and a resistor R1 connected in series between one end of the resistor R1 and ground. resistors R2 and R3 and resistor R
Resistors R4 and R5 connected in series between the other end of 1 and ground
and a capacitor C2 connected between the connection point of resistors R4 and R5 and ground, the positive phase input terminal is grounded via capacitor C1, and the negative phase input terminal is connected to resistors R4 and R5 via resistor R7. 1 and an operational amplifier 15 whose output terminal is connected to the negative phase input terminal via a resistor R6 and connected to one of the input terminals of the comparator circuit 10.

また、比較回路10は、正相入力端子が電流検出回路9
の出力に接続され、逆相入力端子が基準電圧端子14に
接続され、出力がアラーム出力端子13に接続された演
算増幅器16を含んでいる。
Further, the comparison circuit 10 has a positive phase input terminal connected to the current detection circuit 9.
, an operational amplifier 16 having a negative phase input terminal connected to the reference voltage terminal 14 and an output connected to the alarm output terminal 13 .

本発明の特徴は、第1図において、第2図にその一例を
示した、電流検出回路9および比較回路10を設けたこ
とにある。
A feature of the present invention is that, in FIG. 1, a current detection circuit 9 and a comparison circuit 10, an example of which is shown in FIG. 2, are provided.

次に、本実施例の動作について説明する。Next, the operation of this embodiment will be explained.

初めに回路全体の動作を説明する。光信号11はアバラ
ンシェホトダイオード1により受光され電気信号に変換
されて、電流検出回路9を介して前置増幅回路2に入力
され、所定の増幅がなされたあとで、利得可変増幅回路
3に入力される。利得可変増幅回路では人力された電気
信号を直流増幅回路6の出力に従って増幅を行い等化回
路4へ出力する。等化回路4では所定の等化を行ったあ
とで等化信号12aとして等化出力端子12から出力す
る。
First, the operation of the entire circuit will be explained. The optical signal 11 is received by the avalanche photodiode 1, converted into an electrical signal, inputted to the preamplifier circuit 2 via the current detection circuit 9, and after a predetermined amplification, inputted to the variable gain amplifier circuit 3. Ru. The variable gain amplifier circuit amplifies the manually input electric signal according to the output of the DC amplifier circuit 6 and outputs it to the equalization circuit 4. The equalization circuit 4 performs predetermined equalization and then outputs it from the equalization output terminal 12 as an equalized signal 12a.

一方、等化回路4の出力は、ピーク値検出回路5により
、振幅のピーク値が検出されその変動は、第一の直流増
幅回路6により増幅され利得可変増幅回路3の利得を制
御し、さらに第二の直流増幅回路7により増幅され直流
電圧変換回路8の出力電圧を制御し、アバランシェホト
ダイオード1の増倍率を制御する。直流増幅回路6およ
び直流増幅回路7の利得は充分大きい値に設定されてい
るので、光、入力の変動に対し等化回路4の出力は、一
定値に保たれる。このため、光入力が無い場合、利得可
変増幅回路3は最大利得となり、また直流電圧変換回路
8の出力も最大電圧となる。
On the other hand, the peak value of the amplitude of the output of the equalization circuit 4 is detected by the peak value detection circuit 5, and its fluctuation is amplified by the first DC amplifier circuit 6 to control the gain of the variable gain amplifier circuit 3. The second DC amplifier circuit 7 amplifies and controls the output voltage of the DC voltage conversion circuit 8, thereby controlling the multiplication factor of the avalanche photodiode 1. Since the gains of the DC amplification circuit 6 and the DC amplification circuit 7 are set to sufficiently large values, the output of the equalization circuit 4 is maintained at a constant value even when the optical input varies. Therefore, when there is no optical input, the variable gain amplifier circuit 3 has the maximum gain, and the output of the DC voltage conversion circuit 8 also has the maximum voltage.

従ってアバランシェホトダイオード1にかかるバイアス
電圧は、アバランシェホトダイオードのブレークダウン
電圧に達し、アバランシェホトダイオード1に流れる電
流は急激に増大(約100μA)する。これは最小受光
レベルにおける電流(500μ八〜1μA)に比べ充分
大きな値である。
Therefore, the bias voltage applied to the avalanche photodiode 1 reaches the breakdown voltage of the avalanche photodiode, and the current flowing through the avalanche photodiode 1 rapidly increases (about 100 μA). This is a sufficiently large value compared to the current at the minimum light reception level (500 μ8 to 1 μA).

電流検出回路9は、このアバランシェホトタイオード1
に流れる電流を検出し、比較回路10によりブレークダ
ウン電圧に達したときの電流値で入力断アラーム信号を
出力する。
The current detection circuit 9 is connected to this avalanche photodiode 1.
The comparator circuit 10 outputs an input disconnection alarm signal at the current value when the breakdown voltage is reached.

次に、電流検出回路9および比較回路10の動作につい
てより詳しく説明する。
Next, the operations of current detection circuit 9 and comparison circuit 10 will be explained in more detail.

抵抗R1の両端には、アバランシェホトダイオード1に
流れる電流に比例した電圧が現れ、各々抵抗R2および
R3と抵抗R1よびR5とでレベルシフトしたうえで、
演算増幅器15と抵抗R6およびR7で構成される反転
増幅回路により、アバランシェホトダイオード1に流れ
る電流に比例した電圧に変換される。
A voltage proportional to the current flowing through the avalanche photodiode 1 appears across the resistor R1, and after being level-shifted by the resistors R2 and R3 and the resistors R1 and R5,
An inverting amplifier circuit composed of an operational amplifier 15 and resistors R6 and R7 converts the voltage into a voltage proportional to the current flowing through the avalanche photodiode 1.

電流検出回路9の出力は、アバランシェホトダイオード
lの電流が増加すると電圧が上るようになっているため
、比較回路10の基準電圧V。を、アバランシェホトダ
イオード1のブレークダウン電圧のとき、アバランシェ
ホトダイオード1に流れる電流に相当する電流検出回路
9の出力電圧よりやや低目に設定すれば、光入力断のと
き、比較回路10の出力を反転させることができ、光入
力断を検出し、入力断アラーム信号13a としてアラ
ーム出力端子13から出力される。
The output of the current detection circuit 9 is the reference voltage V of the comparison circuit 10 because the voltage increases as the current of the avalanche photodiode I increases. If is set to be slightly lower than the output voltage of the current detection circuit 9 corresponding to the current flowing through the avalanche photodiode 1 when the breakdown voltage of the avalanche photodiode 1 is reached, the output of the comparison circuit 10 is inverted when the optical input is cut off. The optical input disconnection is detected and outputted from the alarm output terminal 13 as an input disconnection alarm signal 13a.

〔発明の効果〕〔Effect of the invention〕

以上説明したように、本発明は、光入力断による発光素
子(アバランシェホトダイオード)の電流の急激な増大
を検出して入力断アラーム信号を出力するため、調整が
簡単である効果がある。また、受信光信号のマーク率の
変動にも依存しない効果がある。
As described above, the present invention detects a sudden increase in the current of a light emitting element (avalanche photodiode) due to a cutoff of optical input and outputs an input cutoff alarm signal, so that adjustment is easy. Further, there is an effect that it does not depend on fluctuations in the mark rate of the received optical signal.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例を示すブロック構成図。 第2図はその電流検出回路および比較回路の詳細を示す
回路図。 ■・・・アバランシェホトダイオード、2・・・前置増
幅回路、3・・・利得可変増幅回路、4・・・等化回路
、5・・・ピーク値検出回路、6.7・・・直流増幅回
路、訃・・直流電圧変換回路、9・・・電流検出回路、
10・・・比較回路、11・・・光信号、12・・・等
化出力端子、12a・・・等化信号、13・・・アラー
ム出力端子、13a・・・入力断アラーム信号、14・
・・基準電圧端子、15.16・・・演算増幅器、C1
、C2・・・コンデンサ、R1−R7・・・抵抗、V。 ・・・基準電圧。 ′・、4.6゜ 実施例(電流検出回路比較回路の構成)第2図
FIG. 1 is a block diagram showing an embodiment of the present invention. FIG. 2 is a circuit diagram showing details of the current detection circuit and comparison circuit. ■... Avalanche photodiode, 2... Preamplifier circuit, 3... Variable gain amplifier circuit, 4... Equalization circuit, 5... Peak value detection circuit, 6.7... DC amplification Circuit, ... DC voltage conversion circuit, 9... Current detection circuit,
DESCRIPTION OF SYMBOLS 10... Comparison circuit, 11... Optical signal, 12... Equalization output terminal, 12a... Equalization signal, 13... Alarm output terminal, 13a... Input disconnection alarm signal, 14.
...Reference voltage terminal, 15.16...Operation amplifier, C1
, C2... Capacitor, R1-R7... Resistor, V. ...Reference voltage. '・, 4.6゜Example (configuration of current detection circuit comparison circuit) Fig. 2

Claims (1)

【特許請求の範囲】 1、光信号(11)を受光する受光素子(1)と、この
受光素子のバイアス電圧を前記光信号の受光レベルに従
って制御するバイアス制御手段(5〜8)と を備えた光受信回路において、 前記受光素子に流れる電流を検出する電流検出手段(9
)と、 この電流検出手段の出力電圧があらかじめ与えられた基
準電圧以上の場合前記光信号の入力断を表す入力断アラ
ーム信号を出力する入力断アラーム出力手段(10)と を含むことを特徴とする光受信回路。
[Claims] 1. A light receiving element (1) that receives an optical signal (11), and bias control means (5 to 8) that controls a bias voltage of the light receiving element in accordance with a light receiving level of the optical signal. In the light receiving circuit, current detection means (9) detects a current flowing through the light receiving element.
), and input disconnection alarm output means (10) for outputting an input disconnection alarm signal indicating input disconnection of the optical signal when the output voltage of the current detection means is higher than a predetermined reference voltage. optical receiving circuit.
JP63086865A 1988-04-07 1988-04-07 Light receiving circuit Pending JPH01258514A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63086865A JPH01258514A (en) 1988-04-07 1988-04-07 Light receiving circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63086865A JPH01258514A (en) 1988-04-07 1988-04-07 Light receiving circuit

Publications (1)

Publication Number Publication Date
JPH01258514A true JPH01258514A (en) 1989-10-16

Family

ID=13898712

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63086865A Pending JPH01258514A (en) 1988-04-07 1988-04-07 Light receiving circuit

Country Status (1)

Country Link
JP (1) JPH01258514A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100479851B1 (en) * 2002-01-31 2005-03-30 주식회사 아이텍 테크널러지 Method Of Active Alignment For An Optical Module And Apparatus Thereof

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS594346A (en) * 1982-06-30 1984-01-11 Fujitsu Ltd Detecting circuit of interruption of optical input

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS594346A (en) * 1982-06-30 1984-01-11 Fujitsu Ltd Detecting circuit of interruption of optical input

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100479851B1 (en) * 2002-01-31 2005-03-30 주식회사 아이텍 테크널러지 Method Of Active Alignment For An Optical Module And Apparatus Thereof

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