JPH01253917A - Designing method for circuit pattern of integrated circuit - Google Patents

Abstract

PURPOSE:To reduce chip area of the same pattern by designing a pattern required only for forming an integrated circuit at a scribe area. CONSTITUTION:A wafer 2 consists of a scribe area 4 where a pattern (IC circuit pattern) 3 needed for operating an integrated circuit and a pattern (IC producing pattern) 5 needed only for creating an integrated circuit are formed it two directions at the outer periphery and it is cut at a vertical and horizontal cutting part 1 to form each chip. In this case, a row of pattern group 5 needed only when forming an integrated circuit is arranged on a scribe area 4 of a wafer 2 and the function this pattern is over when cutting is made. It allows an integrated circuit to be designed easily, made compact, and area to be utilized efficiently.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a method of designing circuit patterns for integrated circuits, and in particular, an integrated circuit that focuses on patterns that are necessary only for the production of the integrated circuit and are not necessary for the operation of the integrated circuit. This invention relates to a circuit pattern design method.

[Conventional technology]

Conventionally, circuit patterns for integrated circuits can be roughly divided into patterns for elements and wiring necessary for integrated circuit operation, and patterns for alignment and dimensional accuracy measurement required only for integrated circuit production, and these are independent of each other. are doing.

FIG. 3 is a plan view of a wafer for explaining a conventional example.

As shown in FIG. 3, the pattern portion 13 of each integrated circuit cut by the vertical and horizontal cutting portions 11 passing through the scribe area 14 of the wafer 12 is a pattern 13 necessary for the operation of the integrated circuit and a pattern 15 necessary for production. FIG. 4 is a circuit pattern diagram for one chip shown in FIG. 3.

As shown in FIG. 4, integrated circuits are produced by simultaneously forming several ICs on a substrate called a wafer 12 and cutting them into chips. A pattern 15 only for manufacturing an integrated circuit and a circuit pattern typified by an element 16 and a wiring 417 are formed together. In order to achieve the precision of cutting on a chip-by-chip basis, there are 3 sections between each chip on the wafer 12! ! +7
? There is a blank area called a scribe area 14.

[Problem that the invention seeks to solve]

The conventional circuit pattern design method for integrated circuits described above mixes patterns necessary only for integrated circuit fabrication and patterns necessary for circuit operation, so patterns necessary only for fabrication are mixed. This method has the drawback that it is necessary to design a pattern necessary for operation after securing an area for designing the pattern, which complicates the circuit pattern design. Further, the pattern required only for manufacturing is unnecessary because it has no relation to the operation of the chip VC, and this area has the drawback of being wasted as an IC.

An object of the present invention is to provide an integrated circuit pattern design method that facilitates the design of such an integrated circuit, reduces the size of the integrated circuit, and realizes effective use of area.

[Means to solve the problem]

The method for designing a circuit pattern of an integrated circuit according to the present invention includes forming patterns of elements, etc. necessary for the operation of an integrated circuit in all circuit pattern portions,
In addition, after a pattern necessary only for manufacturing an integrated circuit is formed in a scribe area on the outer periphery of the circuit pattern, each chip is cut in this scribe area.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a plan view of a wafer for explaining one embodiment of the present invention.

As shown in FIG. 1, the wafer 2 has a pattern (IC circuit pattern) 3 necessary for integrated circuit operation. Patterns necessary only for Ik integrated circuit production (ICC production meta) Each chip is manufactured. In this case, on the scribe area 4 of the wafer 2, a group of 5 patterns necessary only for integrated circuit production are lined up in a row and when cut. The functionality of such a pattern has ended.

FIG. 2 is a circuit pattern diagram for one chip shown in FIG. 1.

As shown in FIG. 2, - such a chip is
It consists of a C circuit pattern 3 and a scribe area 4, and the circuit pattern 3 is formed with various elements 6 and a wiring 7 for connecting these elements 6, while the scribe area 4 is formed with an IC.
A manufacturing pattern 5 has been formed. In this way, by separating the circuit pattern 3 and the manufacturing pattern 5 and forming the manufacturing pattern 5 in the scribe area 4, the design of the circuit pattern 3 is not only facilitated and miniaturized, but also the ICC circuit 7 no.
30 [Effects of the Invention] As explained above, the present invention has the effect that by designing a pattern necessary only for integrated circuit fabrication in the scribe region, the chip area for the same pattern can be reduced. In addition, since you can design a circuit pattern without worrying about the cost of the same pattern, you can shorten the design period and eliminate wiring detours.
This has the effect that the chip area can be used effectively.

[Brief explanation of the drawing]

FIG. 1 is a plan view of a wafer for explaining an embodiment of the present invention, FIG. 2 is a circuit pattern diagram for one inch shown in FIG. 1, and FIG. 3 is a diagram for explaining a conventional example. The plan view of the wafer, FIG. 4, is a circuit pattern diagram for one chip shown in FIG. 3. l... Cutting section, 2... Wafer, 3.
...IC circuit pattern section, 4...Scribe area, 5...IC fabrication pattern, 6...
...Element, 7...Wiring. Agent Patent Attorney Susumu Uchihara

Claims (1)

[Claims] A feature of this method is that the pattern of elements necessary for the operation of the integrated circuit is formed in the circuit pattern part, and the pattern necessary only for manufacturing the integrated circuit is formed in the scribe area, and then each chip is cut in this scribe area. A circuit pattern design method for integrated circuits.