JPH0124705Y2 - - Google Patents

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Publication number
JPH0124705Y2
JPH0124705Y2 JP4232881U JP4232881U JPH0124705Y2 JP H0124705 Y2 JPH0124705 Y2 JP H0124705Y2 JP 4232881 U JP4232881 U JP 4232881U JP 4232881 U JP4232881 U JP 4232881U JP H0124705 Y2 JPH0124705 Y2 JP H0124705Y2
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JP
Japan
Prior art keywords
resistor
operational amplifier
power supply
transistor
wire transmitter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP4232881U
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Japanese (ja)
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JPS57156998U (en
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Priority to JP4232881U priority Critical patent/JPH0124705Y2/ja
Publication of JPS57156998U publication Critical patent/JPS57156998U/ja
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Expired legal-status Critical Current

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Description

【考案の詳細な説明】 本考案は、特に脈動の大きいプロセス制御系に
好適な信号変換装置に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a signal conversion device particularly suitable for process control systems with large pulsations.

工業計測機器において、プロセス物理量を電気
信号に変換するものとして、電源の供給と電気信
号の送出とを2本の配線で共用した2線式伝送器
がある。
2. Description of the Related Art In industrial measuring equipment, there is a two-wire transmitter that converts a process physical quantity into an electrical signal, and uses two wires for both power supply and electrical signal transmission.

この2線式伝送器を用いてプロセス制御系を構
成するものにおいて、特にコンプレツサ、ポン
プ、ブロアーを含む系統の圧力、流量を測定する
ときに脈動が非常に大きいため、このままでは制
御系を不安定にし計測機器に疲労を与えるばかり
でなく、制御そのものが不可能な場合を生ずる。
When using this two-wire transmitter to configure a process control system, the pulsation is extremely large when measuring the pressure and flow rate of systems that include compressors, pumps, and blowers, making the control system unstable if left as is. This not only causes fatigue to the measuring equipment, but also makes control itself impossible.

これを抑制する方法として、絞り機構などによ
る機械的な方法と時定数回路による電気的な方法
が考えられる。しかしながら、前者は技術的な問
題で、また後者は本質安全、防爆上の問題から、
いずれの方法も満足すべき抑制機能を2線式伝送
器に内蔵することは困難な現状である。
Possible methods for suppressing this are a mechanical method using an aperture mechanism, etc., and an electrical method using a time constant circuit. However, the former is a technical problem, and the latter is an intrinsically safe and explosion-proof problem.
In either method, it is currently difficult to incorporate a satisfactory suppression function into a two-wire transmitter.

このために従来、電気的方法による一次遅れ演
算器を制御系に別途付加し対策していた。この方
法によつた場合、次のような不都合があつた。
Conventionally, a countermeasure against this problem has been to add a first-order delay calculator using an electrical method to the control system. This method had the following disadvantages.

すなわち、脈動のプロセスは上述の系統以外
に、プラントの設置条件や配管条件などによつて
も発生し不特定な場合が多く、試運転で確認しな
ければ判明しない点である。しかしながら試運転
時には、制御系を構成する計装盤の設計、機器取
付け、配線などすべてが完成した後であり、現地
で新に一次遅れ演算器を付加することは、スペー
ス、改造配線など支障をきたし、簡単に付加でき
ない場合が多い。また、予想される制御系のすべ
てに、あらかじめ一次遅れ演算器を追加すれば高
価となり、特策ではない。
That is, the pulsation process occurs not only in the above-mentioned system but also due to plant installation conditions, piping conditions, etc., and is often unspecified, and cannot be determined unless confirmed by a test run. However, during trial operation, the design of the instrumentation panel that makes up the control system, equipment installation, wiring, etc., have all been completed, and adding a new primary delay calculator on-site will cause problems such as space and modification wiring. , it is often not possible to add them easily. Furthermore, adding first-order delay calculators to all anticipated control systems in advance would be expensive, and is not a special solution.

一方、2線式伝送器を用いてプロセス制御系を
構成する場合、2線式伝送器を駆動するための電
源が必要である。また、制御系を構成する受信機
器の回路構成が簡単で安価に実現でき、かつ計算
機との信号授受も容易なことから、制御信号とし
てたとえば1〜5VDCの電圧信号が用いられる。
このため、2線式伝送器からの電流信号、たとえ
ば4〜20mADCを電圧信号に変換する信号変換
機能を必要とする。
On the other hand, when configuring a process control system using a two-wire transmitter, a power source is required to drive the two-wire transmitter. Further, since the circuit configuration of the receiving device constituting the control system is simple and can be realized at low cost, and it is easy to exchange signals with a computer, a voltage signal of, for example, 1 to 5 VDC is used as the control signal.
Therefore, a signal conversion function is required to convert a current signal from a two-wire transmitter, for example, 4 to 20 mADC, into a voltage signal.

本考案の目的は、上記した従来技術の欠点をな
くし、脈動抑制機能および電源供給機能を有する
信号変換装置を提供するにある。
An object of the present invention is to eliminate the drawbacks of the prior art described above and to provide a signal conversion device having a pulsation suppressing function and a power supply function.

このため本考案は、2線式伝送器からの信号を
一担電圧信号に変換し、一次遅れの時定数回路を
介した後、演算増幅器とトランジスタから成る電
圧電流変換回路で、再び電流信号に戻して電位の
レベルシフトを行なうように成し、これらの回路
を1電源で動作するように構成したものである。
Therefore, the present invention converts the signal from a two-wire transmitter into a single voltage signal, passes it through a first-order delay time constant circuit, and then converts it back into a current signal using a voltage-current conversion circuit consisting of an operational amplifier and a transistor. These circuits are configured to operate with a single power source.

以下、本考案の一実施例を図面に基づいて詳細
に説明する。
Hereinafter, one embodiment of the present invention will be described in detail based on the drawings.

第1図において、1,2は入力端子であり、こ
こに2線式伝送器TRが接続される。そして、ゼ
ナーダイオードZD、抵抗Ri、伝送器TRの順で
直列接続され、ゼナーダイオードZDの一端が配
線l1を介して直流電源3の正極側に、伝送器
TRの一端が入力端子2、配線l2を介して直流
電源3の負極側に各々接続される。これによつ
て、直流電源3から直流電圧Esとしてたとえば
24VDCが前記直列回路に印加され、物理量に対
応した伝送器TRからの出力電流Iiが図示矢印の
如く直列回路に流れて、ゼナーダイオードZDの
両端にゼナー電圧Vzが、抵抗Riの両端にRi・Ii
なる電圧がそれぞれ発生する。抵抗Ri両端の発
生電圧は、可変抵抗器Rv、コンデンサCから成
る脈動抑制用の一次遅れの時定数回路を介して、
ゼナーダイオードZDと抵抗Riの交点を基準電位
CMとして動作する演算増幅器OPの正相入力端
に入力される。ここに、可変抵抗器Rvの抵抗変
化によつて信号が減衰されて誤差が発生しないよ
うに、演算増幅器OPとしては高入力抵抗の電界
効果トランジスタを初段に用いたICが望ましい。
また、演算増幅器OPの出力はPNPトランジスタ
Q1のベース電極に接続され、エミツタ電極から
は演算増幅器OPの逆相入力端と抵抗Reを介して
基準電位CMにそれぞれ分岐して接続される。ま
た、コレクタ電極は抵抗Roを介して配線l2に
接続され、抵抗Roの両端は出力端子4,5に
各々接続される。ここに、入力端子2と出力端子
5は配線l2によつて共通に接続され、前記〔用
件4〕を達成している。また、演算増幅器OPの
正負の電源端は配線l1,l2を介して直流電源
3に直接接続されているが、演算増幅器OPは基
準電位CMを基準として動作するから、正電圧Vz
と負電圧−(Es−Vz)の正負2電源で駆動した場
合と等価である。
In FIG. 1, 1 and 2 are input terminals, to which a two-wire transmitter TR is connected. Then, the Zener diode ZD, the resistor Ri, and the transmitter TR are connected in series in this order, and one end of the Zener diode ZD is connected to the positive side of the DC power supply 3 via the wiring l1, and the transmitter
One end of the TR is connected to the negative electrode side of the DC power supply 3 via the input terminal 2 and the wiring 12. With this, for example, the DC voltage Es from the DC power supply 3 is
24VDC is applied to the series circuit, and the output current Ii from the transmitter TR corresponding to the physical quantity flows through the series circuit as shown by the arrow in the figure, so that a zener voltage Vz is applied across the zener diode ZD, and Ri is applied across the resistor Ri.・Ii
Each voltage is generated. The voltage generated across the resistor Ri is transmitted through a first-order delay time constant circuit for suppressing pulsation, which consists of a variable resistor Rv and a capacitor C.
Reference potential is the intersection of Zener diode ZD and resistor Ri
Input to the positive phase input terminal of operational amplifier OP, which operates as CM. Here, in order to prevent errors from occurring due to signal attenuation due to changes in the resistance of the variable resistor Rv, it is desirable that the operational amplifier OP be an IC that uses a field effect transistor with a high input resistance in the first stage.
Further, the output of the operational amplifier OP is connected to the base electrode of the PNP transistor Q1, and the emitter electrode is branched and connected to the reference potential CM via the negative phase input terminal of the operational amplifier OP and the resistor Re. Further, the collector electrode is connected to the wiring 12 via a resistor Ro, and both ends of the resistor Ro are connected to output terminals 4 and 5, respectively. Here, the input terminal 2 and the output terminal 5 are commonly connected by the wiring 12, and the above-mentioned [Requirement 4] is achieved. In addition, the positive and negative power supply terminals of the operational amplifier OP are directly connected to the DC power supply 3 via the wiring l1 and l2, but since the operational amplifier OP operates based on the reference potential CM, the positive voltage Vz
This is equivalent to driving with two positive and negative power supplies with negative voltage - (Es - Vz).

このように構成された第1図の実施例におい
て、トランジスタQ1のコレクタ電流Ioは、(1)式
で与えられる。
In the embodiment of FIG. 1 constructed in this manner, the collector current Io of the transistor Q1 is given by equation (1).

Io=〔1/1+TSRi・Ii〕/Re …(1) ここに、Tは時定数でT=Rv・C,Sはラプラ
ス変換の演算子である。また、出力端子4,5の
出力電圧Eoは(2)式で与えられる。
Io=[1/1+TSRi・Ii]/Re...(1) Here, T is a time constant, T=Rv・C, and S is a Laplace transform operator. Further, the output voltage Eo of the output terminals 4 and 5 is given by equation (2).

Eo=Ro・Io …(2) (1)式において、抵抗Riと抵抗Reの値を等しくRi
=Reに選定すれば、(3)式を得る。
Eo=Ro・Io...(2) In equation (1), the values of resistance Ri and resistance Re are set equal to Ri
If =Re is selected, equation (3) is obtained.

Io=〔1/(1+TS)〕Ii …(3) したがつて、(2)式、(3)式から(4)式を得る。 Io=[1/(1+TS)]Ii…(3) Therefore, we obtain equation (4) from equations (2) and (3).

Eo=〔1/(1+TS)〕Ro・Ii …(4) (3),(4)式において、たとえば2線式伝送器TRの
出力電流Iiを4〜20mADC、抵抗Ri,Re,Roの
値をすべて等しくRi=Re=Ro=250Ω、可変抵
抗器Rvの値を200kΩコンデンサCの値を100μF
に選定すれば、出力端子4,5から時定数0〜20
秒まで連続可変可能な一次遅れの演算を施した1
〜5VDCの出力電圧Eoを得ることができる。この
時定数の値は、プロセスの脈動を十分抑制し得る
値である。なお、時定数の値は可変抵抗器Rvま
たはコンデンサCの定数を変更することによつて
自由に選定することができる。また、抵抗Roを
回路から取り除けば、伝送器の出力電流Iiと等し
い4〜20mADCの出力電流Ioを同電位で得るこ
ともできる。
Eo = [1/(1+TS)] Ro・Ii...(4) In equations (3) and (4), for example, the output current Ii of the two-wire transmitter TR is 4 to 20 mADC, and the values of the resistors Ri, Re, and Ro are Ri = Re = Ro = 250Ω, the value of variable resistor Rv is 200kΩ, and the value of capacitor C is 100μF.
If selected, the time constant 0 to 20 from output terminals 4 and 5
1 with first-order delay calculation that can be continuously variable up to seconds
You can get an output voltage Eo of ~5VDC. The value of this time constant is a value that can sufficiently suppress pulsations in the process. Note that the value of the time constant can be freely selected by changing the constant of the variable resistor Rv or the capacitor C. Furthermore, if the resistor Ro is removed from the circuit, an output current Io of 4 to 20 mADC, which is equal to the output current Ii of the transmitter, can be obtained at the same potential.

なお、第1図の実施例において、電圧Vzを得
るためにゼナーダイオードZDを用いたが、これ
に限るものではなく、演算増幅器OPが安定に動
作し得る電源電圧レベルを確保できればよいか
ら、ダイオードや抵抗など電流を流すことによつ
て電圧の発生する電圧発生素子を適用できる。
In the embodiment shown in FIG. 1, a zener diode ZD is used to obtain the voltage Vz, but the invention is not limited to this, as long as the power supply voltage level that allows the operational amplifier OP to operate stably can be secured. A voltage generating element such as a diode or a resistor that generates a voltage by flowing current can be used.

また、時定数の設定用として可変抵抗器Rvを
用いたが、固定抵抗器や線輪(チヨークコイル)
など、一次遅れの時定数を設定できるものであれ
ばよい。
In addition, a variable resistor Rv was used to set the time constant, but a fixed resistor or a wire (chiyoke coil)
Any device that can set the time constant of the first-order lag may be used.

また、第1図の実施例では入出力の基準電位は
配線l2、すなわち直流電源3の負極側になるよ
うに構成したが、第2図の実施例に示すように配
線l1、すなわち直流電源3の正極側が入出力の
基準電位になるように構成することもできる。な
お、第2図において、第1図と同一部分は同一符
号で示してある。同図においては、電流に変換す
るためのトランジスタとしてNPNトランジスタ
Q2に変える必要があるのみで、その他の動作は
第1図と同様であり、当業者には容易に理解され
るので説明を省略する。
In addition, in the embodiment shown in FIG. 1, the input/output reference potential is configured to be on the wiring l2, that is, on the negative electrode side of the DC power supply 3, but as shown in the embodiment shown in FIG. It is also possible to configure the positive electrode side of the input/output reference potential to be the input/output reference potential. Note that in FIG. 2, the same parts as in FIG. 1 are indicated by the same symbols. In the figure, it is only necessary to change the transistor to NPN transistor Q2 as the transistor for converting into current, and the other operations are the same as in Figure 1, and will be easily understood by those skilled in the art, so the explanation will be omitted. .

以上本考案によれば、脈動抑制機能および電源
供給機能を有する信号変換装置を得ることができ
る。また、入力端子と出力端子の一方が共通接続
されているため、プロセス制御系の検出端(2線
式伝送器)と受信端または操作端が同時に2点接
地された場合でも支障が生じない。
As described above, according to the present invention, it is possible to obtain a signal conversion device having a pulsation suppressing function and a power supply function. Further, since one of the input terminal and the output terminal is commonly connected, no problem occurs even if the detection end (two-wire transmitter) and the reception end or operation end of the process control system are grounded at two points at the same time.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案に係る信号変換装置の実施例を
示す図、第2図は本考案に係る信号変換装置の他
の実施例を示す図である。 1,2……入力端子、3……直流電源、4,5
……出力端子、TR……2線式伝送器、Ri,Re,
Ro……抵抗器、Rv……可変抵抗器、C……コン
デンサ、ZD……ゼナーダイオード、OP……演算
増幅器、Q1,Q2……トランジスタ、l1……
正側電源配線、l2……負側電源配線、CM……
OPの基準電位。
FIG. 1 is a diagram showing an embodiment of a signal converting device according to the present invention, and FIG. 2 is a diagram showing another embodiment of the signal converting device according to the present invention. 1, 2... Input terminal, 3... DC power supply, 4, 5
...Output terminal, TR ...2-wire transmitter, Ri, Re,
Ro...Resistor, Rv...Variable resistor, C...Capacitor, ZD...Zener diode, OP...Operation amplifier, Q1, Q2...Transistor, l1...
Positive side power wiring, l2... Negative side power wiring, CM...
Reference potential of OP.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 2線式伝送器を用いてプロセス制御系を構成す
るものにおいて、入力端子間に前記2線式伝送器
を接続し、この2線式伝送器に第1の抵抗および
電圧発生素子の直列回路を接続し、この直列回路
に並列に直流電源を接続し、前記第1の抵抗に時
定数回路を接続し、この時定数回路に正負の電源
端が前記直流電源の両端に接続された演算増幅器
の正相入力端を接続し、この演算増幅器の逆相入
力端に第2の抵抗を介して前記第1の抵抗と前記
電圧発生素子との交点を接続し、前記演算増幅器
の出力端にトランジスタのベース電極を接続し、
このトランジスタのエミツタに前記演算増幅器の
逆相入力端および前記第2の抵抗を接続し、前記
トランジスタのコレクタに前記直流電源を接続し
たことを特徴とする信号変換装置。
In a process control system configured using a two-wire transmitter, the two-wire transmitter is connected between input terminals, and a series circuit of a first resistor and a voltage generating element is connected to the two-wire transmitter. a DC power supply is connected in parallel to this series circuit, a time constant circuit is connected to the first resistor, and an operational amplifier is connected to the time constant circuit, the positive and negative power supply terminals of which are connected to both ends of the DC power supply. A positive phase input terminal is connected to the operational amplifier, an intersection point between the first resistor and the voltage generating element is connected via a second resistor to the negative phase input terminal of the operational amplifier, and a transistor is connected to the output terminal of the operational amplifier. Connect the base electrode,
A signal converting device characterized in that the emitter of the transistor is connected to the negative phase input terminal of the operational amplifier and the second resistor, and the collector of the transistor is connected to the DC power supply.
JP4232881U 1981-03-27 1981-03-27 Expired JPH0124705Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4232881U JPH0124705Y2 (en) 1981-03-27 1981-03-27

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4232881U JPH0124705Y2 (en) 1981-03-27 1981-03-27

Publications (2)

Publication Number Publication Date
JPS57156998U JPS57156998U (en) 1982-10-02
JPH0124705Y2 true JPH0124705Y2 (en) 1989-07-26

Family

ID=29839356

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4232881U Expired JPH0124705Y2 (en) 1981-03-27 1981-03-27

Country Status (1)

Country Link
JP (1) JPH0124705Y2 (en)

Also Published As

Publication number Publication date
JPS57156998U (en) 1982-10-02

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