JPH01246949A - Call circuit for interphone - Google Patents

Call circuit for interphone

Info

Publication number
JPH01246949A
JPH01246949A JP7523088A JP7523088A JPH01246949A JP H01246949 A JPH01246949 A JP H01246949A JP 7523088 A JP7523088 A JP 7523088A JP 7523088 A JP7523088 A JP 7523088A JP H01246949 A JPH01246949 A JP H01246949A
Authority
JP
Japan
Prior art keywords
chime
sound
chime sound
sounds
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP7523088A
Other languages
Japanese (ja)
Other versions
JPH0570350B2 (en
Inventor
Hiroyuki Tsunekawa
博之 常川
Shigeo Azuma
東 滋生
Kuniyuki Tomono
晋之 伴野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Aiphone Co Ltd
Original Assignee
Aiphone Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Aiphone Co Ltd filed Critical Aiphone Co Ltd
Priority to JP7523088A priority Critical patent/JPH01246949A/en
Publication of JPH01246949A publication Critical patent/JPH01246949A/en
Publication of JPH0570350B2 publication Critical patent/JPH0570350B2/ja
Granted legal-status Critical Current

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  • Interconnected Communication Systems, Intercoms, And Interphones (AREA)

Abstract

PURPOSE:To enable sending chime sounds having an excellent acoustic feeling by attenuating the chime sounds composed of 1st and 2nd sounds by means of a digital variable resistor. CONSTITUTION:When a call button switch(SW) is depressed, a signal is sent to the input port 03 of a microcomputer 10. By receiving the signal, the control port 04 of the computer 10 becomes active and supplies power to an amplifier 15. Simultaneously, a chime sound producing program is executed and chime sounds of 650Hz and 512Hz are successively sent to a digital variable resistor 11 where both chime sounds are attenuated in accordance with a preset order. The attenuated chime sounds are outputted from a loudspeaker 16. The resistance values of the resistances 11a-11d of the resistor 11 successively increases from the resistance 11a having the lowest value to the 11d having the highest value.

Description

【発明の詳細な説明】 [産業上の利用分野コ 本発明はインターホンの呼出回路に係わり、特に電子音
で編成されたチャイム音を出力するインターホンの呼出
回路に関する6 [従来の技術] 従来、インターホンの呼出回路は第4図に示すチャイム
音発生回路(特公昭56−49359号)で編成された
チャイム音を呼出音として用いることが知られている。
[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to an intercom calling circuit, and more particularly to an intercom calling circuit that outputs a chime sound composed of electronic sounds. [Prior Art] Conventionally, an intercom has been used. It is known that the ringing circuit uses a chime sound generated by a chime sound generating circuit shown in FIG. 4 (Japanese Patent Publication No. 49359/1983) as a ringing sound.

第4図に示すチャイム音発生回路は擬似チャイム音をつ
くる基本発振回路1゜単安定マルチバイブレータ回路2
JJ衰回路3、電源限時回路4で構成する。
The chime sound generation circuit shown in Figure 4 consists of a basic oscillation circuit 1, a monostable multivibrator circuit 2, and a monostable multivibrator circuit 2, which generates a pseudo chime sound.
It consists of a JJ decay circuit 3 and a power supply time limit circuit 4.

呼出用起動スイッチSを操作すると電源限時回路4が起
動しチャイム音送出時間を定める。電源限時回路4が起
動すると擬似チャイム音をつくる基本発振回路1、単安
定マルチバイブレータ回路2、増幅器Aへ電源を供給す
る。このため、単安定マルチバイブレータ回路2のコン
デンサC6を含む時定数でトランジスタQ2とQ、のオ
ン、オフの動作が定まり、ダイオードD6、D6のバイ
アス回路が形成または遮断されて、発振定数を構成して
いた抵抗R工を短絡または開放し、発振周波数を第1音
から第2音に切換える。2周波の発振周波数は減衰回路
3で所定の減衰を受け、スピーカSPからチャイム音を
送出する。
When the calling start switch S is operated, the power supply time limit circuit 4 is started and the chime sound transmission time is determined. When the power supply time limit circuit 4 is activated, power is supplied to the basic oscillation circuit 1, the monostable multivibrator circuit 2, and the amplifier A, which generate a pseudo chime sound. Therefore, the on/off operation of transistors Q2 and Q is determined by the time constant including capacitor C6 of monostable multivibrator circuit 2, and a bias circuit of diodes D6 and D6 is formed or cut off to form an oscillation constant. Short-circuit or open the resistor R, and switch the oscillation frequency from the first sound to the second sound. The two oscillation frequencies undergo a predetermined attenuation in the attenuation circuit 3, and a chime sound is transmitted from the speaker SP.

なお、図中符号R八(nは1〜23)は抵抗、CPt(
nは1〜6)はコンデンサ、Q、l(nは1〜6)はト
ランジスタ、D、+(nは1〜9)はダイオードである
In addition, the symbol R8 (n is 1 to 23) in the figure is a resistor, CPt (
n is 1 to 6) is a capacitor, Q and l (n is 1 to 6) are transistors, and D and + (n is 1 to 9) are diodes.

[発明が解決しようとする課題] 上記実施例におけるチャイム音発生回路は第1、第2音
の発振および編成を布線論理でアナログ的に行っている
ので、回路素子の特徴のばらつきの影響を受けやすく部
品点数が多く、かつ安定したチャイム音が得られない等
の解決しなければならない課題がある。
[Problems to be Solved by the Invention] Since the chime sound generating circuit in the above embodiment performs the oscillation and organization of the first and second sounds in an analog manner using wiring logic, it is possible to eliminate the influence of variations in the characteristics of circuit elements. There are problems that need to be solved, such as being easily damaged, requiring a large number of parts, and not being able to produce a stable chime sound.

[発明の目的コ 本発明は上述した点に鑑みなされたもので、第1、第2
音からなるチャイム音をデジタル可変抵抗器で減衰する
ことにより優れた音感のチャイム音を送出できるインタ
ーホンの呼出回路を提供することを目的とする。
[Object of the Invention] The present invention has been made in view of the above-mentioned points.
To provide a calling circuit for an intercom capable of transmitting a chime sound with excellent pitch by attenuating the chime sound consisting of a sound with a digital variable resistor.

[課題を解決するための手段] 本発明によるインターホンの呼出回路は、呼出ボタンと
、呼出ボタンの操作に応じて予め設定された順序に従っ
てチャイム音を送するチャイム音送出手段と、予め設定
された順序に従って抵抗値を変更し前記チャイム音送出
手段から送出された前記チャイム音を減衰するデジタル
可変抵抗器と。
[Means for Solving the Problems] A calling circuit for an intercom according to the present invention includes a calling button, a chime sound sending means for sending a chime sound according to a preset order in response to the operation of the call button, and a digital variable resistor that attenuates the chime sound sent from the chime sound sending means by changing the resistance value according to the order;

前記デジタル可変抵抗器の減衰を受けたチャイム音を出
力するスピーカとで構成する。
and a speaker that outputs a chime sound that is attenuated by the digital variable resistor.

[発明の実施例] 以下、本発明によるインターホンの呼出回路の一実施例
を図面に従って詳述する。
[Embodiments of the Invention] Hereinafter, an embodiment of a calling circuit for an intercom according to the present invention will be described in detail with reference to the drawings.

第1図において10はマイクロコンピュータである。マ
イクロコンピュータ10は呼出ボタンSWを操作すると
入力ポート03に信号が入力され制御を開始する。マイ
クロコンピュータ1oはチャイム音送出手段としての第
2図に示すチャイム音送出プログラム25を内蔵してい
る。呼出ボタンSWを操作するとチャイム、音送出プロ
グラム25が実行され処理26で第1音に相当する65
0Hzのチャイム音を制御端子L7(nは1,2.4.
8)へ送出する。650Hzのチャイム音は0〜750
m5までの間は予め設定された順序にしたがってデジタ
ル可変抵抗器11を第1減衰制御サブルーチン28で制
御する。750m5経過したか否かを判断ボックス27
で判断し、750m5経過すると処理29で第2音に相
当する512Hzのチャイム音を制御端子L71(nは
1.2.4.8)へ送出する。同時に第2減衰制御サブ
ルーチン31により予め設定された順序にしたがってデ
ジタル可変抵抗器11を制御する。デジタル可変抵抗器
11には抵抗11a、llb、llc、lidがマイク
ロコンピュータ10の制御端子L1、L2、L4、L8
に接続され、抵抗12が電源側、抵抗13が基準電位側
に接続しである。抵抗11a、llb、llc、lid
、12.13の接続点はコンデンサ19を介してアンプ
15の入側に接続しである。アンプ15の電源はトラン
ジスタ14のオン、オフによりエミッタ、コレクタを介
して供給される。また、トランジスタ14はマイクロコ
ンピュータ10の制御ポート04から制御される。図中
符号01.02は電源端子、Xl、x2はクロック端子
、20.21はコンデンサ、22は発振器、23はツェ
ナダイオードである。
In FIG. 1, 10 is a microcomputer. When the microcomputer 10 operates the call button SW, a signal is input to the input port 03 and the control starts. The microcomputer 1o incorporates a chime sound sending program 25 shown in FIG. 2 as a chime sound sending means. When the call button SW is operated, the chime/sound sending program 25 is executed, and in process 26, the chime/sound sending program 25 is executed, and the sound 65 corresponding to the first sound is executed.
The chime sound of 0Hz is controlled by the control terminal L7 (n is 1, 2, 4...
8). 650Hz chime sound is 0-750
Until m5, the digital variable resistor 11 is controlled by the first attenuation control subroutine 28 according to a preset order. Judgment box 27 whether 750m5 has passed or not
When 750 m5 has elapsed, a chime sound of 512 Hz corresponding to the second sound is sent to the control terminal L71 (n is 1.2.4.8) in step 29. At the same time, the second attenuation control subroutine 31 controls the digital variable resistor 11 according to a preset order. In the digital variable resistor 11, resistors 11a, llb, llc, and lid are connected to control terminals L1, L2, L4, and L8 of the microcomputer 10.
The resistor 12 is connected to the power supply side, and the resistor 13 is connected to the reference potential side. Resistor 11a, llb, llc, lid
, 12 and 13 are connected to the input side of the amplifier 15 via a capacitor 19. Power is supplied to the amplifier 15 via the emitter and collector by turning the transistor 14 on and off. Further, the transistor 14 is controlled from the control port 04 of the microcomputer 10. In the figure, reference numeral 01.02 is a power supply terminal, Xl and x2 are clock terminals, 20.21 is a capacitor, 22 is an oscillator, and 23 is a Zener diode.

[発明の作用] 上記構成のインターホンの呼出回路で呼出ボタンSWを
押下するとマイクロコンピュータ10の入力ポート03
へ信号が送出される。これにより制御ポート04が能動
となり、アンプ15に電源を供給する。同時にチャイム
音送出プログラム25が実行され、650Hzのチャイ
ム音がデジタル可変抵抗器11に送出され、引続き51
2Hzのチャイム音がデジタル可変抵抗器11に送出さ
れる。なお抵抗11a〜lidは抵抗11aが最低で抵
抗11b、抵抗Lieと順に大きくなり抵抗lidが最
高である。送出時間は第3図に示すように、第1音の送
出時間τ□が750m5、第2音の送出時間τ2が18
60m5である。マイクロコンピュータ10をスイッチ
に置換えて第1減衰制御サブルーチン28、第2減衰制
御サブルーチン31の実行を説明すると、減衰値C5W
0は全部の制御端子L□、L2、L4、L、が開放の状
態であり減衰量は最小である。減衰値CSW工は制御端
子L工が開成、他の制御端子L2、L4、L、が開放の
状態である。以下、減衰量が順に増加するよう制御端子
L1、L2.L4、Lsの開成、開成が組合され、減衰
値C8W工、は制御端子L2、L4、L、が閉成され制
御端子L1のみが開放された状態である。また、減衰値
CS WL、は制御端子L1、L2、L4、L、が閉成
された状態で減衰量が最大である。第3図に示すように
例えばチャイム音送出プログラム25の第2減衰制御サ
ブルーチン31が実行されると減衰値C5WoとC5W
1.が交互に繰返され、第2音の第1回目の減衰制御が
行なわれる。つぎに減衰値C5W1とCS Wl、が交
互に繰返され第2回目の減衰制御が実行される。
[Operation of the invention] When the call button SW is pressed in the intercom call circuit having the above configuration, the input port 03 of the microcomputer 10 is pressed.
A signal is sent to. This makes the control port 04 active and supplies power to the amplifier 15. At the same time, the chime sound sending program 25 is executed, and a chime sound of 650 Hz is sent to the digital variable resistor 11.
A 2 Hz chime sound is sent to the digital variable resistor 11. Note that among the resistors 11a to lid, the resistor 11a is the lowest, the resistor 11b and the resistor Lie increase in order, and the resistor lid is the highest. As shown in Figure 3, the transmission time of the first sound τ□ is 750m5, and the transmission time τ2 of the second sound is 18m5.
It is 60m5. To explain the execution of the first attenuation control subroutine 28 and the second attenuation control subroutine 31 by replacing the microcomputer 10 with a switch, the attenuation value C5W
At 0, all control terminals L□, L2, L4, and L are open, and the amount of attenuation is minimum. In the damping value CSW, the control terminal L is open, and the other control terminals L2, L4, and L are open. Thereafter, control terminals L1, L2 . The opening and opening of L4 and Ls are combined, and the damping value C8W is a state in which the control terminals L2, L4, and L are closed and only the control terminal L1 is open. Further, the attenuation value CS WL has the maximum attenuation amount when the control terminals L1, L2, L4, and L are closed. As shown in FIG. 3, for example, when the second attenuation control subroutine 31 of the chime sound sending program 25 is executed, the attenuation values C5Wo and C5W are
1. are repeated alternately, and the first attenuation control of the second sound is performed. Next, the attenuation values C5W1 and CS W1 are alternately repeated to execute the second attenuation control.

このようにして、順次プログラムが実行され、ik後の
回には減衰値C3W14とC3W1sが交互に繰返して
実行されるので減衰量は最大となる。
In this way, the program is executed sequentially, and the attenuation values C3W14 and C3W1s are alternately and repeatedly executed in the time after ik, so that the attenuation amount becomes maximum.

上記実施例における音源はプログラム制御で生成しても
よい。また1発振器22で発振した周波数をマイクロコ
ンピュータ10に内蔵した分周期で分周して生成しても
よい。
The sound source in the above embodiment may be generated under program control. Alternatively, the frequency oscillated by one oscillator 22 may be divided by a frequency division built into the microcomputer 10 to generate the frequency.

[発明の効果] 本発明によるインターホンの呼出回路は、呼出ボタンと
、呼出ボタンの操作に応じて予め設定された順序に従っ
てチャイム音を送出するチャイム音送出手段と、予め設
定された順序に従って抵抗値を変更し前記チャイム音送
出手段から送出された前記チャイム音を減衰するデジタ
ル可変抵抗器と、前記デジタル可変抵抗器の減衰を受け
たチャイム音を出力するスピーカとを具備した構成とし
であるため、デジタル可変抵抗器を予め設定された順序
に従って第1、第2音を減衰するところに特徴を有して
いる。このため、コンデンサ、抵抗等の時定数部品を削
減でき、かつ、コンデンサ、抵抗等の温度及び製造上の
特性変化に対応した調整部材を設ける必要がない等の効
果がある。
[Effects of the Invention] The intercom calling circuit according to the present invention includes a call button, a chime sound sending means that sends out a chime sound in a preset order according to the operation of the call button, and a resistance value that sends out a chime sound in a preset order according to the operation of the call button. and a speaker that outputs the chime sound attenuated by the digital variable resistor. The feature is that the digital variable resistor attenuates the first and second sounds according to a preset order. Therefore, the number of time constant components such as capacitors and resistors can be reduced, and there is no need to provide adjustment members corresponding to changes in temperature and manufacturing characteristics of capacitors, resistors, etc.

また、安定したチャイム音を生成できる効果がある。It also has the effect of generating a stable chime sound.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明によるインターホンの呼出回路の一実施
例を示すブロック図、第2図は第1図に係わるチャイム
音送出プログラムのフローチャート、第3図は第1図の
チャイム音波形図、第4図は従来のインターホンの呼出
装置の回路図である。 11・・・・・・・デジタル可変抵抗器25・・・・・
・・チャイム音送出プログラム(チャイム音送出手段) SW・・・・・・・呼出ボタン SP・・・・・・・スピーカ 代理人 弁理士  守 谷 −雄 第1図 1り 第2図 第3図
FIG. 1 is a block diagram showing an embodiment of an intercom calling circuit according to the present invention, FIG. 2 is a flowchart of a chime sound transmission program related to FIG. 1, and FIG. 3 is a chime sound waveform diagram of FIG. FIG. 4 is a circuit diagram of a conventional intercom calling device. 11...Digital variable resistor 25...
...Chime sound sending program (chime sound sending means) SW...Call button SP...Speaker agent Patent attorney Mr. Moritani Figure 1 Figure 1 R Figure 2 Figure 3

Claims (1)

【特許請求の範囲】[Claims] 呼出ボタンと、呼出ボタンの操作に応じて予め設定され
た順序に従ってチャイム音を送出するチャイム音送出手
段と、予め設定された順序に従って抵抗値を変更し前記
チャイム音送出手段から送出された前記チャイム音を減
衰するデジタル可変抵抗器と、前記デジタル可変抵抗器
の減衰を受けたチャイム音を出力するスピーカとを備え
たことを特徴とするインターホンの呼出回路。
a call button, a chime sound sending means for sending out a chime sound according to a preset order in response to an operation of the call button, and the chime sound sent from the chime sound sending means with a resistance value changed according to a preset order. 1. A calling circuit for an intercom, comprising: a digital variable resistor that attenuates sound; and a speaker that outputs a chime sound attenuated by the digital variable resistor.
JP7523088A 1988-03-29 1988-03-29 Call circuit for interphone Granted JPH01246949A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7523088A JPH01246949A (en) 1988-03-29 1988-03-29 Call circuit for interphone

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7523088A JPH01246949A (en) 1988-03-29 1988-03-29 Call circuit for interphone

Publications (2)

Publication Number Publication Date
JPH01246949A true JPH01246949A (en) 1989-10-02
JPH0570350B2 JPH0570350B2 (en) 1993-10-04

Family

ID=13570215

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7523088A Granted JPH01246949A (en) 1988-03-29 1988-03-29 Call circuit for interphone

Country Status (1)

Country Link
JP (1) JPH01246949A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5255109U (en) * 1975-10-16 1977-04-21

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5255109U (en) * 1975-10-16 1977-04-21

Also Published As

Publication number Publication date
JPH0570350B2 (en) 1993-10-04

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