JPH01245567A - Semiconductor light-receiving device and manufacture thereof - Google Patents

Semiconductor light-receiving device and manufacture thereof

Info

Publication number
JPH01245567A
JPH01245567A JP63071896A JP7189688A JPH01245567A JP H01245567 A JPH01245567 A JP H01245567A JP 63071896 A JP63071896 A JP 63071896A JP 7189688 A JP7189688 A JP 7189688A JP H01245567 A JPH01245567 A JP H01245567A
Authority
JP
Japan
Prior art keywords
layer
receiving device
conductivity type
semiconductor
semiconductor layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP63071896A
Other languages
Japanese (ja)
Other versions
JP2798927B2 (en
Inventor
Keitaro Shigenaka
圭太郎 重中
Yujiro Naruse
雄二郎 成瀬
Norio Nakayama
仲山 則夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP63071896A priority Critical patent/JP2798927B2/en
Publication of JPH01245567A publication Critical patent/JPH01245567A/en
Application granted granted Critical
Publication of JP2798927B2 publication Critical patent/JP2798927B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Landscapes

  • Light Receiving Elements (AREA)

Abstract

PURPOSE:To lessen a leakage current and to improve a quantum efficiency by a method wherein the thickness of an inverse conductivity type semiconductor layer is constituted thickly at its central part and thinly on its periphery and a CdTe layer is formed including the surface of this thinly constituted semiconductor layer. CONSTITUTION:A CdTe layer 2 is formed by an epitaxial growth on a p-type CdHgTe(CMT) substrate 1 in a thin thickness using an MOCVD (organometallic chemical vapor growth) method. Then, a resist is put and part of the layer 2 is etched away to a place, to where a CMT region is formed in a diameter of about 700mum, using a lithography. After the part is removed by etching, boron ions are implanted in an about 900-mum radius region, which makes a circle concentric with the removed region, using an SiO2 mask to form an n-type region 11. As this result, the thickness of the inverse conductivity type region 11 is constituted thickly at its central part and thinly on its periphery and the layer 2 is formed including the surface of this thinly constituted semiconductor layer. Accordingly, a breakdown of a crystal at the time of ion-implantation in the inverse conductivity type semiconductor layer coming into contact to the CdTe layer is reduced and a leakage current is decreased.

Description

【発明の詳細な説明】 [発明の目的] (産業上の利用分野) この発明は、改良された半導体受光装置の製造方法に関
する。
DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Application Field) The present invention relates to an improved method of manufacturing a semiconductor light receiving device.

(従来の技術) 従来の製造方法による半導体受光装置に第5図に示す構
成のものがおる。即ち、P形CdHgTe (以下、カ
ドミウム・マーキュリ(Hg)・テルル略してC)IT
と称する)基板(1)上に)fBE法により厚さ約0.
2μmのCdTe層(2)が形成される。次に、このC
dTe1幣(2)上にInを蒸着し信号電極(3)とす
るとともに、熱処理を加えることによって前記CHT 
l板(1)内にN影領域(11)が形成されている。基
板(1)の他方の下面には、Au層が蒸着形成されアー
スミ極(4)を構成する。
(Prior Art) A semiconductor light receiving device manufactured by a conventional manufacturing method has a structure shown in FIG. That is, P-type CdHgTe (hereinafter, cadmium mercury (Hg) tellurium abbreviated as C)IT
A substrate (1) with a thickness of about 0.0 mm is formed by the fBE method.
A 2 μm CdTe layer (2) is formed. Next, this C
In is vapor-deposited on the dTe1 plate (2) to form a signal electrode (3), and heat treatment is applied to the CHT.
N shadow regions (11) are formed within the L plate (1). On the other lower surface of the substrate (1), an Au layer is formed by vapor deposition to constitute an earth mine pole (4).

以上の構成のもとで、CdTe1W (2)側から赤外
線を入射すると、C)iT l板(1)内で電子・正孔
対が形成され、これが信号電荷となってPN接合面の空
乏層領域を通過し、信号電極(3)から信号が取出され
る。しかしながら、このような構成の半導体受光装置は
Inが拡散したCdTe層(2)もN影領域化されるた
め、受光装置としての良好な特性が得られなかった。
With the above configuration, when infrared rays are incident from the CdTe1W (2) side, electron-hole pairs are formed in the C)iT l plate (1), which become signal charges and form a depletion layer on the PN junction surface. A signal is extracted from the signal electrode (3). However, in a semiconductor light receiving device having such a configuration, the CdTe layer (2) in which In is diffused also becomes an N shadow region, so that good characteristics as a light receiving device cannot be obtained.

(発明が解決しようとする課題) 以上のように、従来の半導体受光装置はCcfTe層表
面にPN接合面が現れ、変換効率が損なわれるという問
題かめった。
(Problems to be Solved by the Invention) As described above, the conventional semiconductor light-receiving device suffers from the problem that a PN junction surface appears on the surface of the CcfTe layer, impairing conversion efficiency.

この発明は、CdTe層に表面保護機能を維持させつつ
、受光装置特性としても良好な機能を持つ半導体受光装
置及びその製造方法を提供することを目的とする。
An object of the present invention is to provide a semiconductor light receiving device and a method for manufacturing the same, which have a CdTe layer that maintains a surface protection function and has good light receiving device characteristics.

F発明の構成1 (課題を解決するための手段) この発明は、第1に、−導電形化合物半導体Cd1HJ
Te基板と、この基板の表面側の一部に設けられた逆導
電形半導体層と、この半導体層の周囲の前記基板上に設
けられたCdTe層とを備えた半導体受光装置において
、前記逆導電形半導体の厚さを、中央部で厚く、その周
囲で薄く構成し、この薄く構成した半導体層の表面を含
んで前記CdTe1層を形成したことを特徴とする。
Structure 1 of the F Invention (Means for Solving the Problems) This invention firstly provides a - conductivity type compound semiconductor Cd1HJ.
In a semiconductor light receiving device comprising a Te substrate, a reverse conductivity type semiconductor layer provided on a part of the surface side of this substrate, and a CdTe layer provided on the substrate around this semiconductor layer, the reverse conductivity type semiconductor layer is provided on the substrate. The CdTe1 layer is characterized in that the thickness of the shaped semiconductor is thick at the center and thin at the periphery, and the CdTe1 layer is formed including the surface of this thin semiconductor layer.

また、前記半導体層の厚い部分の表面不純物濃度を、薄
い部分の表面不純物濃度より高くしたこと。または、前
記半導体層の厚い部分の表面の高さを、薄い部分の高さ
より低くしたことを特徴とする。
Further, the surface impurity concentration of the thick portion of the semiconductor layer is higher than the surface impurity concentration of the thin portion. Alternatively, the height of the surface of the thick portion of the semiconductor layer is lower than the height of the thin portion.

第2に、この発明の半導体受光装置の製造方法は、−導
電形化合物半導体Cd11gTe塁板の上にCdTe層
を形成する工程と、この工程の後に前記CdTe層の一
部を前記塁仮内に達する深さまでエツチング除去する工
程と、この工程の後に前記エツチング除去された領域及
びそのエツチング除去された領域の周囲の前記CdTe
1iに不純物をイオン注入する工程とからなることを特
徴とする。
Second, the method for manufacturing a semiconductor light receiving device of the present invention includes a step of forming a CdTe layer on a conductivity type compound semiconductor Cd11gTe base plate, and after this step, a part of the CdTe layer is placed in the base plate. a step of etching the CdTe to a depth of about 100 nm, and after this step etching the CdTe to a depth of
1i.

(作 用) この発明による半導体受光装置及びその製造方法により
、逆導電形半導体層の厚さを、中央部で厚く、その周囲
で薄く構成された。従って、CdTe層の存在により、
PN接合部が直接用ることが少なく、また、CdTe層
に接した逆導電形半導体層の面がイオン注入時のダメー
ジが小さく結晶性が損なわれないので、リーク電流が少
ない。更にまた、逆導電形半導体層の厚い部分が中央部
に止まり、周辺部まで広がらないことは、それだけ量子
効率が良くなる作用がある。
(Function) According to the semiconductor light receiving device and the manufacturing method thereof according to the present invention, the thickness of the opposite conductivity type semiconductor layer is made thicker at the center and thinner at the periphery. Therefore, due to the presence of the CdTe layer,
Since the PN junction is rarely used directly, and the surface of the opposite conductivity type semiconductor layer in contact with the CdTe layer is less damaged during ion implantation and crystallinity is not impaired, leakage current is small. Furthermore, the fact that the thick portion of the opposite conductivity type semiconductor layer remains in the center and does not extend to the periphery has the effect of improving the quantum efficiency accordingly.

(実施例) 以下、この発明による半導体受光装置の製造方法の一実
施例を図面を参照して詳細に説明する。
(Example) Hereinafter, an example of a method for manufacturing a semiconductor light receiving device according to the present invention will be described in detail with reference to the drawings.

第1図はこの発明による製造方法の一実施例による半導
体受光装置を示す構成断面図である。第1図は赤外線セ
ンサーとしての半導体受光装置を示すものである。即ち
、製造手順を説明すれば、Cdの組成成分の割合いをX
として表したとぎ、X=約0.2のP形Cd、H(]1
.丁e単結晶基板、即ちCHT l板■上に)IOcV
D (有機金属化学気相成長)法により、CdTe層(
2)を約0.2μmの薄い厚さにエピタキシャル成長に
より形成する。Cd Te層(2)の形成に当たっては
、Cdを原料としてジメチルカドミウムを、Teを原料
としてジエチルテルル又はジイソプロピルテルルを夫々
使用し、キャリアガスとしては水素ガスを用いる。なお
、このときの基板成長温度は340〜390℃とした。
FIG. 1 is a sectional view showing a structure of a semiconductor light receiving device according to an embodiment of the manufacturing method according to the present invention. FIG. 1 shows a semiconductor light receiving device as an infrared sensor. That is, to explain the manufacturing procedure, the proportion of the Cd composition is
When expressed as, P-type Cd with X=about 0.2, H(]1
.. IOcV on a single crystal substrate, that is, a CHT plate
A CdTe layer (
2) is formed by epitaxial growth to a thin thickness of about 0.2 μm. In forming the Cd Te layer (2), dimethyl cadmium is used as a raw material for Cd, diethyl tellurium or diisopropyl tellurium is used as a raw material for Te, and hydrogen gas is used as a carrier gas. Note that the substrate growth temperature at this time was 340 to 390°C.

次に、レジストをおき、CdTe層(2)の一部をリソ
グラフィ技術を用いて直径的700μm、深さ約0.5
μmで前記C)IT領領域達する所までエツチング除去
する。
Next, a resist is placed and a part of the CdTe layer (2) is 700 μm in diameter and approximately 0.5 in depth using lithography technology.
Etching is performed to reach the C) IT region in micrometers.

そこで一般に、不純物のイオン注入によりPN接合領域
を形成するとき、第2図に示すように、その加速電圧の
増加とともにキャリア数の最大値は深い位置に移動する
ので、加速電圧の制御によってCdTe層(2)のキャ
リア数をそれ程増加さぜることなく、即ち高抵抗を維持
した状態でCト汀層〔1)だけを逆導電形に変換可能で
ある。
Generally, when a PN junction region is formed by ion implantation of impurities, the maximum number of carriers moves to a deeper position as the accelerating voltage increases, as shown in Figure 2. Therefore, by controlling the accelerating voltage, the CdTe layer It is possible to convert only the C top layer [1] to the opposite conductivity type without significantly increasing the number of carriers in (2), that is, while maintaining high resistance.

従って、エツチングで除去後、810マスクによリ、そ
の除去領域とは同心円をなした半径的900μmの大き
さの領域にホウ素イオンを注入し、N影領域(11)を
形成する。このとぎのイオン注入条件は、力l速電圧1
50KeV、イオン)開度I X 1014cm−2と
した。
Therefore, after removal by etching, boron ions are implanted into a region having a radius of 900 μm and concentric with the removed region using an 810 mask to form an N shadow region (11). The next ion implantation conditions are force l speed voltage 1
50 KeV, ion) opening degree I x 1014 cm-2.

この結果、第1図に示したように、逆導電形のN形半導
体領域(11)の中央部を厚く、その周囲で薄く溝成し
、この薄く構成した半導体層の表面を含んで前記CdT
e層(2)が形成される。
As a result, as shown in FIG. 1, the central part of the N-type semiconductor region (11) of the opposite conductivity type is thick, and a thin groove is formed around it, and the CdT
An e-layer (2) is formed.

従って、CdTe層に接する逆導電形半導体層のイオン
注入時の結晶破壊少なくリーク電流が少なく4rる効果
がある。また、逆導電形半導体層の厚い部分が中央部に
止まり、周辺部まで広からないことは、それだけ量子効
率が良くなる効果が得られる。
Therefore, there is an effect of less crystal breakdown during ion implantation of the opposite conductivity type semiconductor layer in contact with the CdTe layer, and less leakage current. Furthermore, the fact that the thick portion of the opposite conductivity type semiconductor layer remains in the center and does not extend to the periphery has the effect of improving the quantum efficiency.

また、N形領域電極即ち信号電極(3)にはIn。In addition, the N-type region electrode, that is, the signal electrode (3) is made of In.

P形領域電極即ちアース電極(4)には酊を使用した。The P-type area electrode, ie, the ground electrode (4), was made of porcelain.

この結果、赤外線センサーとしての性能を表すピロバイ
アス時のダイオード抵抗面積積(1?o A)は絶対温
度771(のとのきに1000・ctrrに、また、分
光相対感度は第3図に示したようになり、そのカットオ
フ波長は約10.4μmであった。
As a result, the diode resistance area product (1?o A) at pyrobias, which indicates the performance as an infrared sensor, is 1000 ctrr at an absolute temperature of 771 (and the relative spectral sensitivity is shown in Figure 3). The cutoff wavelength was approximately 10.4 μm.

この発明方法による半導体受光装置は、上記の構成とな
るので、赤外線センサーのPN接合部分が直接的には大
気にさらされない等の結果、漏れ(リーク)電流が少な
く、量子効率も良く、また、ROA値が大きく良好なも
のが得られる。
Since the semiconductor light receiving device according to the method of this invention has the above configuration, the PN junction part of the infrared sensor is not directly exposed to the atmosphere, resulting in low leakage current and good quantum efficiency. A good product with a large ROA value can be obtained.

第4図はこの発明方法の他の実施例で得られた半導体受
光装置を示す構成断面図でおる。第3図において、まず
、CdTe単結晶基板(5)にHOCV D法により、
Xが約0.2のP形CdHg  Te層即ちCH8×1
0x 基板(1)を気相成長にて形成する。C)fT基板(1
)の成長形成には、Cdを原料としてジメチルカドミウ
ムを、l1gを原料としては金属水銀を、また、Teを
原料としてはジエチルテルル又はジイソプロピルテルル
を用いた。なお、このときの基板成長温度は360〜4
20℃で成長膜厚は約10μmであった。
FIG. 4 is a cross-sectional view showing the structure of a semiconductor light receiving device obtained by another embodiment of the method of this invention. In FIG. 3, first, a CdTe single crystal substrate (5) was coated by the HOCV D method.
P-type CdHg Te layer with X about 0.2, i.e. CH8×1
0x Substrate (1) is formed by vapor phase growth. C) fT substrate (1
), dimethyl cadmium was used as a raw material for Cd, metallic mercury was used as a raw material for l1g, and diethyl tellurium or diisopropyl tellurium was used as a raw material for Te. Note that the substrate growth temperature at this time was 360 to 4
The film thickness grown at 20° C. was approximately 10 μm.

CHT l板(1)の成長形成に続いて、CdTe層(
2)を積層する。CClTe層〔2)の積層には、同様
にCdを原料としてジメチルカドミウムを、1eを原料
としてはジエチルテルル又はジイソプロピルテルルを用
いた。なお、このときの基板成長温度は340〜390
°Cで成長膜厚は約0.2μmであった。
Following the growth formation of the CHT l plate (1), the CdTe layer (
2) is laminated. For laminating the CClTe layer [2), dimethyl cadmium was similarly used as the raw material for Cd, and diethyl tellurium or diisopropyl tellurium was used as the raw material for 1e. Note that the substrate growth temperature at this time was 340 to 390°C.
The film thickness grown at °C was about 0.2 μm.

そこで、cdre層(2)の一部を同様にリソグラノイ
技術を用いて直径約700μm、深さ約0.5μmでC
)IT層(1)に達する所までエツチング除去し、エツ
チング除去後、その除去領域とは同心円をなした半径的
900μmの大きさの領域にホウ素イオンを注入し、逆
導電形のN影領域(11)を形成する。
Therefore, a part of the cdre layer (2) was also coated with carbon dioxide using lithography technology to form a layer with a diameter of approximately 700 μm and a depth of approximately 0.5 μm.
) The etching is removed until it reaches the IT layer (1), and after the etching removal, boron ions are implanted into a 900 μm radius region concentric with the removed region to form an N shadow region of the opposite conductivity type ( 11).

このときのイオン注入条件は、加速電圧150にeV。The ion implantation conditions at this time were an acceleration voltage of 150 eV.

イオン濃度1 )<1014cm−2とした。また、信
号電極(3)にはIn、アース電極〔4)にはAuを使
用した。
Ion concentration 1)<1014 cm-2. Furthermore, In was used for the signal electrode (3), and Au was used for the ground electrode [4].

この結果、赤外線センサーとしての性能を表すゼロバイ
アス時のダイオード抵抗面積積(Ro A)は77にの
とのきに150Ω・ctrt、また、分光感度特性によ
るカットオフ波長は約9.5μmであり、前記実施例と
同様な効果が14られた。
As a result, the diode resistance area product (Ro A) at zero bias, which indicates the performance as an infrared sensor, is 150 Ω・ctrt at 77, and the cutoff wavelength according to the spectral sensitivity characteristics is approximately 9.5 μm. , 14 effects similar to those of the previous example were obtained.

なお、この発明の装置及び製造方法は上記各実施例に限
るものではなく、例えば、CdTe層(5)の成分の中
に微量の亜鉛を混入させ、CHT層(1)と格子定数の
一致を図り、不整合割合いを0.1%以下とするなど、
更に優れた半導体受光装置を(qることが可能である。
Note that the apparatus and manufacturing method of the present invention are not limited to the above embodiments; for example, a trace amount of zinc may be mixed into the components of the CdTe layer (5) to match the lattice constant with the CHT layer (1). We aim to reduce the inconsistency rate to 0.1% or less, etc.
It is possible to create an even better semiconductor photodetector.

[発明の効果] 以上説明のように、この発明による半導体受光装置は、
逆導電形半導体層の厚さを、中央部で厚く、その周囲で
薄く構成した結果、リーク電流が少なく、また量子効率
が良好なものが得られる等実用上の効果大である。
[Effects of the Invention] As explained above, the semiconductor light receiving device according to the present invention has the following effects:
As a result of configuring the opposite conductivity type semiconductor layer to be thick at the center and thin at the periphery, there are great practical effects such as less leakage current and good quantum efficiency.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの発明による半導体受光装置の一実施例を示
す構成図、第2図は第1図に示した装置のキャリア)開
度特性図、第3図は第1図に示した装置の分光特性図、
第4図はこの発明による半導体受光装置の他の実施例を
示す構成図、第5図は従来の半導体受光装置のを示す構
成図でおる。 (t) ・p形Cd1l(lTe基板 (11)・・・N影領域 (2)・・・CdTO層 (3)・・・信号電極 (4)・・・アース電極
FIG. 1 is a block diagram showing an embodiment of a semiconductor light receiving device according to the present invention, FIG. 2 is a carrier opening characteristic diagram of the device shown in FIG. 1, and FIG. 3 is a diagram of the opening degree characteristic of the device shown in FIG. Spectral characteristic diagram,
FIG. 4 is a block diagram showing another embodiment of the semiconductor light receiving device according to the present invention, and FIG. 5 is a block diagram showing a conventional semiconductor light receiving device. (t) ・P-type Cd1l (lTe substrate (11)...N shadow area (2)...CdTO layer (3)...signal electrode (4)...earth electrode

Claims (4)

【特許請求の範囲】[Claims] (1)一導電形化合物半導体CdHgTc基板と、この
基板の表面側の一部に設けられた逆導電形半導体層と、
この半導体層の周囲の前記基板上に設けられたCdTe
層とを備えた半導体受光装置において、前記逆導電形半
導体の厚さを、中央部で厚く、その周囲で薄く構成し、
この薄く構成した半導体層の表面を含んで前記CdTe
層を形成したことを特徴とする半導体受光装置。
(1) a one conductivity type compound semiconductor CdHgTc substrate, an opposite conductivity type semiconductor layer provided on a part of the surface side of this substrate,
CdTe provided on the substrate around this semiconductor layer
In the semiconductor light receiving device comprising a layer, the opposite conductivity type semiconductor is thick at the center and thin at the periphery,
The CdTe including the surface of this thinly structured semiconductor layer
A semiconductor light receiving device characterized by forming a layer.
(2)前記半導体層の厚い部分の表面不純物濃度を、薄
い部分の表面不純物濃度より高くしたことを特徴とする
請求項1記載の半導体受光装置。
(2) The semiconductor light receiving device according to claim 1, wherein the surface impurity concentration of the thick portion of the semiconductor layer is higher than the surface impurity concentration of the thin portion.
(3)前記半導体層の厚い部分の表面の高さを、薄い部
分の高さより低くしたことを特徴とする請求項1記載の
半導体受光装置。
(3) The semiconductor light receiving device according to claim 1, wherein the height of the surface of the thick portion of the semiconductor layer is lower than the height of the thin portion.
(4)一導電形化合物半導体CdHgTe基板の上にC
dTe層を形成する工程と、この工程の後に前記CdT
e層の一部を前記基板内に達する深さまでエッチング除
去する工程と、この工程の後に前記エッチング除去され
た領域及びそのエッチング除去された領域の周囲の前記
CdTe層に不純物をイオン注入する工程とからなる半
導体受光装置の製造方法。
(4) C on one conductivity type compound semiconductor CdHgTe substrate
A step of forming a dTe layer, and after this step, the CdT layer is formed.
a step of etching away a part of the e-layer to a depth that reaches into the substrate; and a step of ion-implanting impurities into the etched region and the CdTe layer surrounding the etched region after this step; A method of manufacturing a semiconductor light receiving device comprising:
JP63071896A 1988-03-28 1988-03-28 Semiconductor light receiving device and method of manufacturing the same Expired - Fee Related JP2798927B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63071896A JP2798927B2 (en) 1988-03-28 1988-03-28 Semiconductor light receiving device and method of manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63071896A JP2798927B2 (en) 1988-03-28 1988-03-28 Semiconductor light receiving device and method of manufacturing the same

Publications (2)

Publication Number Publication Date
JPH01245567A true JPH01245567A (en) 1989-09-29
JP2798927B2 JP2798927B2 (en) 1998-09-17

Family

ID=13473753

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63071896A Expired - Fee Related JP2798927B2 (en) 1988-03-28 1988-03-28 Semiconductor light receiving device and method of manufacturing the same

Country Status (1)

Country Link
JP (1) JP2798927B2 (en)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5279893A (en) * 1975-12-23 1977-07-05 Telecommunications Sa Semiconductor device and method of assembling same
JPS5753633A (en) * 1980-07-30 1982-03-30 Telecommunications Sa Photoelectromotive detector sensitive to near infrared region
JPS6332970A (en) * 1986-07-25 1988-02-12 Fujitsu Ltd Manufacture of semiconductor device
JPS6354778A (en) * 1986-08-25 1988-03-09 Fujitsu Ltd Infrared ray detector
JPS63237484A (en) * 1987-03-25 1988-10-03 Mitsubishi Electric Corp Semiconductor device

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5279893A (en) * 1975-12-23 1977-07-05 Telecommunications Sa Semiconductor device and method of assembling same
JPS5753633A (en) * 1980-07-30 1982-03-30 Telecommunications Sa Photoelectromotive detector sensitive to near infrared region
JPS6332970A (en) * 1986-07-25 1988-02-12 Fujitsu Ltd Manufacture of semiconductor device
JPS6354778A (en) * 1986-08-25 1988-03-09 Fujitsu Ltd Infrared ray detector
JPS63237484A (en) * 1987-03-25 1988-10-03 Mitsubishi Electric Corp Semiconductor device

Also Published As

Publication number Publication date
JP2798927B2 (en) 1998-09-17

Similar Documents

Publication Publication Date Title
US5157473A (en) Avalanche photodiode having guard ring
US4490573A (en) Solar cells
JPH10290023A (en) Semiconductor photodetector
US4207586A (en) Semiconductor device having a passivating layer
US4326211A (en) N+PP-PP-P+ Avalanche photodiode
JP2002057352A (en) Solar battery and manufacturing method
JPH10163515A (en) Photodetector and manufacture thereof
CA1199097A (en) Preparation of photodiodes
EP0374232B1 (en) Method of fabricating an infrared photodetector
JPS6222546B2 (en)
JPH01245567A (en) Semiconductor light-receiving device and manufacture thereof
EP0026629B1 (en) Methods of manufacturing semiconductor devices, for example photodiodes, and devices so manufactured
CN113299785A (en) Silicon-based detector and manufacturing method thereof
US4914495A (en) Photodetector with player covered by N layer
US5004698A (en) Method of making photodetector with P layer covered by N layer
JPH05102517A (en) Avalanche photodiode and its manufacturing method
JPH04151874A (en) Semiconductor device
JPH10163517A (en) Semiconductor device and its manufacture
JP2001274451A (en) Semiconductor image pickup element and method of manufacturing it
KR100525169B1 (en) FABRICATION OF HgCdTe PHOTO DIODE
KR100811365B1 (en) Planar avalanche photodiode
JPH05129580A (en) Manufacture of photodetector
JPH0936411A (en) Fabrication of infrared detector
JPH0249030B2 (en)
JPH0258277A (en) Manufacture of semiconductor photodetector

Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees