JPH0124377B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention basically consists of an I ² L transistor consisting of a multi-collector inverter transistor and a base current supply injector transistor.
The present invention relates to an interface circuit applied to an (Integrated-Injection Logic) circuit, and particularly relates to an interface circuit when an output side connection circuit such as a linear circuit is connected to the output side of an I ² L circuit.

The basic configuration of the I ² L circuit, as shown in Figure 1, includes a multi-collector vertical NPN transistor 1 as a multi-output inverter element,
This and a lateral PNP transistor 2 called an injector that supplies base current constitute a multi-output gate, and is known as a logic circuit capable of wire logic. For example, connecting the collector outputs of different inverter elements constitutes a wired NOR, and connecting the input and output of inverter elements constitutes a wired NOR.
AND is constructed.

The above-mentioned I ² L circuit is similar to a conventional bipolar circuit by forming an N ⁺ buried layer and an N epitaxial layer on a P substrate, and using the N epitaxial layer as the emitter of an NPN transistor. Because it can be manufactured using technology,
Not only is it suitable for LSI implementation, but it can coexist with other logic and linear circuits on a single chip. In addition, the I ² L circuit basically has an operating current of about several μA,
Operates with a power supply voltage of about 0.6V, logic amplitude is also 0.6V
It is possible to implement LSI with low power consumption.

By the way, the I ² L circuit basically uses a small current (several μA),
Operates at low voltage (0.6V), logic amplitude [0.6V]
It is also small, so when used in combination with other logic circuits or linear circuits that operate at large currents and high voltages,
It is necessary to provide an interface circuit between the I ² L gate and other circuits to match the current and voltage levels.

For example, by the logic output signal from the I ² L circuit
When operating TTL (Trangistor-Trangistor Logic), linear circuits, etc., the interface is performed by using a circuit configuration as shown in FIGS. 2 and 3.

That is, in the conventional example shown in FIG. 2, a PNP transistor 4 for external driving is connected to the output side of the I ² L circuit 3.
is provided in the same way as the PNP transistor 2 for other injectors, and the collector of this external drive PNP transistor 4 and the collector of the NPN transistor 1 as an inverter element in the final output stage are connected to an output side connection circuit (in this example, a TTL circuit). )5 input
The configuration is such that it is commonly connected to the bases of the NPN transistors 6. However, in the conventional example with such a configuration, each base-emitter voltage V between the external drive PNP transistor 4 provided in the I ² L circuit 3 and the input NPN transistor 6 of the output side connection circuit 5 is Due to differences in _BE , the above
It may not be possible to supply sufficient base current to the NPN transistor 6. In addition, in the conventional example shown in ^FIG .
8 is provided, and the base current is supplied to the NPN transistor 16 via the resistor 18. Therefore, in this example, the I ² L circuit 13
The I ² L circuit 13 and the external connection circuit 15 can be interfaced by simply connecting the collector of the NPN transistor 1 as an inverter element in the final output stage to the base of the input NPN transistor 16 of the output side connection circuit 15. The output side connection circuit 15 can be operated reliably. However, the third
In the conventional example shown in the figure, the output side connection circuit 1
Since the resistor 18 must be provided in the circuit 5, a large chip area is required when it is integrated into an integrated circuit.

Therefore, in view of the problems of the conventional examples as described above, the present invention facilitates and reliably interfaces an I ² L circuit with an output side connection circuit such as a TTL circuit or a linear circuit, and also integrates it into an integrated circuit. The present invention provides an interface circuit with a novel configuration in which the chip area does not become too large even when the chip area is increased.

Hereinafter, the present invention will be described in detail with reference to the drawings showing one embodiment.

In the embodiment shown in FIG. 4, the I ² L circuit 23 is
A unit component consisting of a multi-collector NPN transistor 1 as an inverter element and a PNP transistor 2 for an injector is connected to each block 23a, 23b, which operates at a different level.
..., 23n, and each of the above blocks 23a, 23n.
3b, . . . , 23n are connected in series to form a multilayer stacked circuit configuration to perform desired logical operations. The calculated output signal from the I ² L circuit 23 is output from the collector of the NPN transistor 1A, which serves as an inverter element at the final output stage, provided in the block 23a operating at the lowest level.

The block 23b that operates at a level one level higher than the lowest level of the I ² L circuit 23 as described above includes:
A PNP transistor 24 for external driving is provided. The base and emitter of the NPN transistor 24 are commonly connected to the injector PNP transistor 2 in the block 23b, and the collector is connected to the final output stage NPN transistor 24 provided in the block 23a which operates at the lowest level. It is connected to the collector of transistor 1A. And PNP for the above external drive
The collector of transistor 24 and the final output stage
The collector of the NPN transistor 1A is commonly connected to the base of the input NPN transistor 26 of the output side connection circuit 25, and the interface circuit 3
It constitutes 0.

In the embodiment with the above-described configuration, the I ² L circuit 23 having a multilayer stacked circuit configuration transfers the injector current flowing through each unit component of the block 23n operating at the highest level to the next level. Since it is distributed to each unit element of the operating block and sequentially flows to each block 23n, . . . , 23b, 23a, each block 23a, 23
If the power supply voltage for each block 23a, 23b, ..., 23n is _VF , and the number of blocks 23a, 23b, ..., 23n, that is, the number of stacked layers n, then the power supply voltage is n・_VF.
It can be operated together with the output side connection circuit 25 at V _CC , and the power utilization rate can be improved. Moreover, for the input of the output side connection circuit 25,
The base of the NPN transistor 26 has an I ² L circuit 2
An external drive circuit provided in block 23b that operates at a level higher than that of block 23a in which the NPN transistor 1A of the final output stage of 3 is provided.
A sufficiently large base current can be supplied from the PNP transistor 24. Note that the PNP transistor 24 for external drive has its collector
The emitter voltage V _CE is the base-emitter voltage
V _BE is approximately equal to VBE, and can supply a sufficient base current to the input NPN transistor 26 of the output side connection circuit 25, and the external drive ^PNP transistor 24 Like the PNP transistor 2 for the injector, it can be manufactured using normal bipolar technology, so I ² L
Even when the circuit 23 and the output side connection circuit 25 are integrated into an integrated circuit, the size of the chip is not increased too much.

Note that in the above embodiment, a TTL circuit was connected to the I ² L circuit 23 as the output side connection circuit 25;
The output side connection circuit 25 does not have to be a TTL circuit, but may have another circuit configuration such as a linear circuit.

As is clear from the description of the above embodiments, according to the present invention, a plurality of circuit blocks operating at different operating levels are connected in multiple stages between the power supply and the ground, and at least two of the circuit blocks are connected in multiple stages.
In a logic circuit in which a final output stage is provided in an integrated injection logic circuit block that operates at a lower level, the integrated injection logic circuit block is constructed from an integrated injection logic circuit and operates at a lower level than the integrated injection logic circuit block in which the final output stage is provided. The current injector transistor of the integrated injection logic circuit block operating at By configuring an interface circuit by common connection to the signal input terminals of the output side connection circuits, an extremely simple configuration is achieved by simply forming an external drive transistor similar to the injector transistor in the I ² L circuit. , it is possible to reliably transmit signals between the I ² L circuit and the output side connection circuit, and the above external drive transistor can be easily integrated into an integrated circuit together with each unit component of the I ² L circuit. Therefore, the intended purpose can be fully achieved.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing the basic configuration of an I ² L circuit to which the present invention is applied. Figures 2 and 3
Each figure is a circuit diagram showing the configuration of each conventional example of an interface circuit. FIG. 4 is a circuit diagram showing the configuration of an embodiment of the interface circuit according to the present invention. 1... Multi-connector NPN transistor for inverter, 1A... NPN transistor in final output stage, 2... PNP transistor for injector, 23... I ² L circuit, 23a, 23b,...,
23n...Circuit block, 24...For external drive
PNP transistor, 25... Output side external connection circuit, 26... NPN transistor for input.

Claims (1)

[Claims] 1. A plurality of circuit blocks operating at different operating levels are connected in multiple stages between a power supply and a ground,
At least two of the circuit blocks are configured with integrated injection logic circuits, and the integrated injection logic block operating at a lower level is provided with a final output stage, the integrated injection logic provided with the final output stage. The current injector transistor of the integrated injection logic circuit block operating at a higher level than the circuit block is used as an external drive transistor, and the collector of the signal output transistor of the integrated injection logic circuit block provided with the final output stage is connected to the collector of the signal output transistor of the integrated injection logic circuit block provided with the final output stage. An interface circuit characterized in that collectors of external drive transistors are commonly connected to signal input terminals of an output side connection circuit.