JPH01240965A - Synchronization control system - Google Patents

Abstract

PURPOSE:To make efficient an inter-process synchronization control by notifying another process of an access completion, waiting for the specific field value of a synchronization control table to satisfy synchronizing conditions consisting of two synchronization control message values '>=' and '<=', and then, executing the accessing synchronization control. CONSTITUTION:Due to the synchronizing conditions of the two types of WAITs, the duplicating use for the different synchronization control of the same field of the synchronization control table is possible, and a field for the portion of the number of processes executed in parallel is provided on the synchronization control table, and each inter-process synchronization control is executed in each field. Thus, the inter-process synchronization control can be executed for an inter-process communication area with a small memory quantity and without damaging a parallel condition. Further, by making a POST and the WAIT into a special hardware instruction, and securing the inter-process communication area on an accessible common memory, the control can be made faster.

Description

Detailed Description of the Invention [Field of Industrial Application] The present invention provides a processing method in which a DO loop is used as a unit of parallelization in a multiprocessor system and the loop repetitions are executed in parallel. When there is a data dependency between multiple processes executed in parallel, this relates to inter-process synchronization control necessary to ensure the order in which each process accesses its array elements.

[Conventional technology]

Conventionally, I
EEE Trans 5OFTWARE ENGINE
ERINGVOL 5R-13, Nα6. JUNE
Discussed in 1987 PP 726-739. In this case, the memory is structured in such a way that a tag field is added to each fixed area, and when each process executing in parallel accesses a variable (array element) that requires synchronization control, the value of the tag corresponding to that variable can be accessed. Synchronous control is achieved through a combination of tag conditional operations that access a variable only when certain conditions are met, and tag field operations that update the tag value and notify other processes that the variable has been accessed. It is argued that

[Problem to be solved by the invention]

The conventional method described above requires a special memory structure in which a tag area is added to each fixed area. Furthermore, if synchronization control is not performed between processes executed in parallel, tag conditional operations and tag field operations are unnecessary, and therefore tag areas are also unnecessary. In addition, when synchronization control is performed multiple times between the same processes, the synchronization control becomes sequential, so even if it is possible to use the communication area for synchronization control (tag area) overlappingly, it is necessary to avoid overlapping use of the tag. There was a problem with the area usage rate being poor.

It is an object of the present invention to include linear index array elements accessed by multiple processes running in parallel.

The object of the present invention is to efficiently realize inter-process synchronization control necessary for executing a loop in parallel in a plurality of processes while guaranteeing the access order, using a small synchronization control communication area.

[Means to solve the problem]

The above purpose is to create a table ID (TID) in a communication area that can be accessed in common by all processes executing in parallel.
is identified by A synchronization control table whose total number is the number of synchronization controls, and each table has a field ID (
POST and TID are used to write a synchronization control message (MSG) into the fields of the synchronization control table indicated by TID and FID.
, the value of the field in the synchronization control table indicated by FID is greater than or equal to MSG (GE) or less than or equal to MSG (LE
WAIT, which waits until the synchronization conditions are met, consisting of two types of synchronization methods (TYPE); and POST, which is determined in advance from the value of the subscript expression of the synchronization control target array.

Determine the MSG of WAIT and the field of the synchronous control table where POST and WAIT perform synchronous control, and determine TYPE as GE or LE based on the increase/decrease in the same subscript expression when executed sequentially. , is achieved by a synchronization control preparation process that initializes each field of the synchronization control table to the value of the array index that does not require synchronization control.

[Effect]

A pair of linear subscript array elements whose access order must be guaranteed between processes executed in parallel; the side that needs to be accessed first (called the POST side) and the side that needs to be accessed later CWAIT synchronous control is performed as follows.

(1) Initialize each field of the synchronous control preparation synchronous control table to the value of the array subscript expression that has been determined as not requiring synchronous control, and use the subscript expression of the synchronous control target array on the POST side and the synchronous control target array on the WAIT side. From the subscript expression, it is determined that the field in which POST writes MSG (indicated by FIDP) and the field in which WAIT reads the value (indicated by FI DW) match for the same array element, and POST and WAIT If MSG is determined to be the value of the array subscript expression on the p o s 'r side and WAIT side, respectively, and the increase/decrease in the array subscript expression when executed sequentially increases, GE will decrease. In this case, the WAIT TYPE is determined as LE. This prevents malfunctions of synchronization control, which will be explained below, and prevents synchronization control between processes.

This can be done in each field of the synchronization control table.

(2) Inter-process synchronization control In each process that is executed in parallel, when accessing an array element subject to synchronization control on the POST side, immediately after accessing it, POST changes the value of the array subscript expression to MSG.
By writing in the field indicated by F I I) P, the access completion is notified to other processes. On the other hand, when accessing an array element subject to synchronization control on the WAIT side, immediately before accessing, WAIT:
When waiting until the value of the field indicated by F I DW satisfies the synchronization condition of greater than or equal to MSG consisting of the value of the same array subscript expression (TYPE = GE) or less than ('14PE = LE), the synchronization condition to the same array element is Make access.

With the above synchronous control preparation, the MSG on the PO8T side
.

FIDP and MSG and FIDW on the WAIT side are determined to match for the same synchronously controlled array element, but the process that accesses the array element on the PO3T side and the array element on the WAIT side Since the processes performing access to are two different processes running in parallel, the WAI'r side
Before accepting the SG (here, acceptance means that the value of the field matches the MSG), the process on the PO8T side writes a different MSG to the same field, and the value of that field is updated. may be overridden.

However, if the field has been updated to a different value, the previous access to the synchronously controlled array element on the OS T side has already been completed by the same process. Therefore, on the WA and IT sides, TYPE is set to GE when the field value increases with execution, and LE when it decreases, allowing synchronization control by overriding I- by PO8T. (The increase/decrease in this field corresponds to the increase/decrease in the subscript expression of the synchronous control target array when executed sequentially.) This prevents the access of array elements on the PO8T side and the array element on the WAIT side. access order relationship can be ensured.

〔Example〕

An embodiment of the present invention will be described below with reference to FIGS. 1 to 4.

FIG. 2 shows an example to which the present invention is applied, and FIG. 3 shows the progress of execution of the example shown in FIG.

In this example, consider dividing the DO loop into four parts and executing them in parallel in terms of loop repetition. , P1~P
4 represents each process executed in parallel, and each process is identified by a process number (P=1 to 4). The same elements of the linear index array X are accessed between each process. For example, X(2) written (hereinafter referred to as definition) in D2 of process P1 is tJ 2 of process P2.
(hereinafter referred to as "use"). Therefore, it is necessary to ensure the order of access to the array variable X by inter-process synchronization control. That is, as shown by the start and end points of the arrows in Figure 4, the array element X (
1) use U is X (I+1
) is defined and then executed, correct execution results will not be obtained. However, the use of array element X(1) in Ul of process P1 does not require definition in other processes.

Next, the present invention will be explained in detail using the example of FIG. 2 using FIGS. 1, 4, and 5.

FIG. 4 shows an example of application of the present invention to the example shown in FIG. 2, and FIG.
The operation overview of the present invention in the application example shown in FIG. 4 is shown in FIG.
The correspondence of each field of the synchronization control table in the application example shown in the figure is shown.

Before executing the D○ loop, each process has P
The field where O8T writes the MSG (denoted as FIDP) and the field where WAIT reads the value (FIDP).
FIG. 5 shows the FIDP in each process.

Indicates the value of FIDW. Through this association, between the processes that require guaranteed access order to the linear index array X, process P1, process P2, etc. Process P2 and Process P3
．． Process P3 and Process P4. Each field of the synchronization control table, Fl, for process P4 and process P1, respectively.

F2. F3. F4 is associated. Here, F1 to F
4 are fields of the synchronization control table indicated by FID=1 to 4, respectively. Next, 1') When the 0 loop is executed sequentially, the value of the subscript expression of the synchronously controlled array X of D and U increases as the loop is repeated. 2) in the figure. Conversely, when the number decreases as the loop repeats, the TYPE is set to LE, but even in this case, the synchronization control performed is the same, so the explanation will be omitted. Next, each field of the synchronization control table is initialized to the value 1 of the subscript expression in the use U1 of the array element X(1) that does not need to be defined by another process (3 in FIG. 4).

During the execution of the D○ loop, immediately after the execution of array element X (Il1) of D, Il1 is set to MS by PO8T of
As G, write to the field indicated by FIDP in the synchronization control table (FIDP = 1. for P = 1°2.3.4, respectively).

2.3.4). This notifies other processes of the completion of definition of array element X (Il1) (Wl to W4). For example, in process P1, immediately after defining X(2) of U2,
5 Process P2 writes MSG value 2 to field F1 immediately after the definition of x(3) in U3.

Next, by WAIT 5 in FIG. 4, read the value of the field indicated by p"Il")W in the synchronization control table, wait until it becomes equal to or higher than the value of MSG, and after satisfying this synchronization condition, Use array element X (I) of U (L
l~L 4. ). For example, in process P2, after the value of field F1 becomes 2 or more, use x(2) of U2, and in process P3, after the value of field F2 becomes 3 or more, use x(3) of U3. make use of. However, the use of X(1) of Ul in process P1 is performed immediately because the value of field F4 is 1 due to the initialization of field 3 in FIG.

As described above, the order of definition and use of array variables X is guaranteed, and correct execution results can be obtained.

In the synchronization control of the present invention, the WAIT synchronization condition is set to a field value of MSG or more (TYPE=GE), or
By setting the following (TYPE=LE), before WAIT accepts the MSG written by PO3T, PO
5T can write the next MSG in the same field, and even in this case, the synchronization control will not malfunction. For example, in process P1, immediately after the definition of X(2) in U2, the value 2 of MSG is set, immediately after the definition of X(6) in U6,
Write the MSG value 6 to field F1. These definitions are used in U2゜U6 of process P2, respectively, but when process P2 makes use of X(2) of U2, process P1 has already completed the definition of X(6) of U6, The value of field F]- may be 6. Even in this case, WAI for the use of X(2) in U2
The synchronization condition of T (field value is 2 or more) is satisfied, and process P2 uses X(2) of U2. this is,
U2(7)X(2)+7) definition and U6's X(6)(
7) Since the definitions are executed sequentially in the same process P1,
This is because when the definition of U6's X(6) is completed, it can be guaranteed that the definition of U2's X(2) is completed.

Furthermore, the synchronization control table has fields for the number of processes to be executed in parallel, and inter-process synchronization control is performed in each field, so these synchronization controls are executed in parallel.

In this application example, synchronous control is performed using one synchronous control table indicated by TIDI for accessing a pair of linear subscript arrays that require synchronous control. If there are multiple pairs, prepare as many synchronization control tables as there are pairs (each table is identified by a different TID), and perform synchronization control for each pair in the same way as in this application example. conduct.

The present invention can be realized on a main memory shared multi-process without any extra hardware addition mechanism, but PO8T,
Converts WAIT into dedicated hardware instructions and secures inter-process communication area on shared memory that can be accessed at high speed.
Alternatively, further speeding up is possible by implementing a faster synchronous register and synchronous register operation.

[Effects of the Invention] The present invention enables the same field of the synchronization control table to be used redundantly for different synchronization controls by using two types of WAIT synchronization conditions, and also allows the use of fields for the number of processes executed in parallel. is provided in the synchronization control table, and synchronization control between each process is performed in each field, so the interprocess communication area can be used with a small amount of memory without compromising parallelism.
Inter-process synchronous control can be performed.

[Brief explanation of the drawing]

Fig. 1 shows an overview of the operation in an application example of the present invention, Fig. 2 shows an example to which the present invention can be applied, Fig. 3 shows the implementation progress of the example shown in Fig. 2, and Fig. 4 shows an example of the application of the present invention. FIG. 5, an example of application of the present invention to the example shown in the figure, shows the association of each field of the synchronization control table in the example of application of FIG. MS...Shared memory, T]...Synchronization control table,
F1 to F4... Each field of the synchronization control table, 2
1 to P4...Process, Wl, -W4...PO3T
Writing MSG by L1 to L4... Reading value by WAIT, D, 1) 2. D3. D6...Definition of array variable X, U, Ul, U2. U3. U6: Use of array variable X. Gi 7! -Country Di5 io l=I, A/0vii
) I=P, N-4 茅 ■ Ul υL
Illustration S

Claims (1)

[Claims] 1. In a processing method in which a DO loop is executed in parallel as a unit of parallelization for a multiprocessor system, multiple accesses for writing or reading values to the same element of a linear index array are executed in parallel. This is inter-process synchronization control that is necessary when the process is performed by a process, and writes the value of a synchronization control message to a specific field of a synchronization control table that has fields for the number of processes provided in a communication area common to all processes. By doing so, it notifies other processes of the access completion, and waits until the value of a specific field in the synchronization control table satisfies two types of synchronization conditions: "greater than" or "less than" the value of the synchronization control message. A synchronous control method characterized by executing synchronous control for access. 2. Determine the synchronization control message from the linear subscript of the synchronization control target array, associate each synchronization control between processes with each field of the synchronization control table, and determine the synchronization method from the increase/decrease of the array subscript when executed sequentially. 2. The synchronous control method according to claim 1, wherein a synchronous control preparation process is performed in which each field of the synchronous control table is initialized with the value of an array subscript that does not require synchronous control.