JPH01238021A - Etching of semiconductor substrate - Google Patents

Abstract

PURPOSE:To pattern a semiconductor substrate in ultrafine width by forming a ultrofine width resist by irradiating the semiconductor substrate with a charged particle beam in the atmosphere including raw gas. CONSTITUTION:A source electrode 3, a drain electrode 4, and a gate electrode 5, all comprising ohmic metal such for example as AuGe/Ni, are formed on an n type channel layer 2 for example which has been formed in a GaAs substrate 1. Alkyl naphthalene for example as the stock gas is introduced into a sample chamber, which is evacuated to a high vacuum, and the GaAs substrate 1 is irradiated in the raw gas atmosphere with an electron beam 6 which is focused to a diameter of about several hundreds Angstrom for example and scanned linearly from the source electrode 3 to the drain electrode 4. With the irradiation of the electron beam 6, amorphous hydrocarbon family matter is produced on the channel layer 2 from the stock gas in the form of an irradiation pattern. Hereby, a linear ultrafine width resist 7 of about several hundreds Angstrom composed of products is formed on the channel layer 2.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a method for etching a semiconductor substrate, and is suitable for application to the manufacture of semiconductor devices such as Schottky gate FETs, for example.

[Summary of the Invention] A method for etching a semiconductor substrate according to the present invention involves irradiating a semiconductor substrate with a charged particle beam in an atmosphere containing a predetermined source gas, thereby applying a resist made of a substance generated from the source gas to the semiconductor substrate. By etching the semiconductor substrate by reactive ion etching using the resist as a mask, the semiconductor substrate can be patterned to an extremely fine width.

[Conventional technology]

When patterning a semiconductor substrate such as GaAs by etching, it is necessary to mask the surface of the portion to be left with a resist. However, when forming an ultra-fine structure with a size of several hundreds, it becomes difficult to form a resist with an ultra-fine width necessary for this purpose.

Electron beam lithography is conventionally known as a method for forming a resist with a fine width.

In this method, for example, polymethyl methacrylate (PMM
Forming an electron beam resist like A) on a semiconductor substrate,
After exposing this to an electron beam, development is performed to form a resist pattern.

In addition, as a prior art document related to the present invention, a substrate is placed in a gas atmosphere containing constituent materials such as metals and semiconductors,
Japanese Patent Publication No. 62-42417 relates to a pattern forming method in which a desired pattern of metal, semiconductor, etc. is deposited on the substrate by irradiating a desired portion of the surface of the substrate with an electron beam.
Applications related to pattern formation methods in which a substrate is placed in a gaseous resist atmosphere and a resist of a desired pattern is deposited by irradiating the surface of the substrate with an electron beam.
Plied Physics Letters, Vo
l, 29. No. 9 (1976) pp. 596-5
98 are listed.

(Problem to be solved by the invention) P used in the above-mentioned electron beam lithography
MMA has low resistance to reactive ion etching (RIE), which allows etching with good directionality, and this RIE
It is actually difficult to use it as a mask during etching by IE. Therefore, with conventional methods, it has been difficult to pattern a semiconductor substrate into extremely fine widths of about several hundred holes.

Note that PMMA is formed on a metal film with high resistance to RIE, and the metal film is etched using a resist formed by patterning this PMMA by electron beam lithography as a mask, and then the metal film patterned by this is etched. A method is known in which the above-mentioned problem is solved by etching the semiconductor substrate using a mask as a mask, but this method is disadvantageous in that it requires a large number of steps because it requires the formation of a metal film.

Therefore, an object of the present invention is to provide a method for etching a semiconductor substrate, which can pattern a semiconductor substrate into extremely fine widths of about several hundred holes.

[Means to solve the problem]

In the present invention, a resist (7) made of a substance generated from a raw material gas is applied to a semiconductor substrate (1, 2) by irradiating the semiconductor substrate (1, 2) with a charged particle beam (6) in an atmosphere containing a predetermined raw material gas. , 2), and then the semiconductor substrates (1, 2) are etched by reactive ion etching (RIE) using the resist (7) as a mask.

[Function] According to the above-described means, it is possible to form a resist with an extremely fine width of about several hundred holes by irradiation with a charged particle beam, and this resist has high resistance to RIE. Therefore,
By etching the semiconductor substrate by RIE using this resist as a mask, the semiconductor substrate can be patterned to have an extremely fine width.

〔Example〕

Hereinafter, one embodiment of the present invention will be described with reference to an open view. This example demonstrates that the present invention can be applied to pseudo-dimensional GaAs.
This is an example applied to the manufacture of MESFET.

In this embodiment, as shown in FIG. 1, an n-type channel layer 2, for example, is first formed in a semi-insulating GaAs substrate 1, and an ohmic metal such as AuGe/Ni is formed on the channel layer 2. A source electrode 3, a drain electrode 4, and a gate electrode 5 are formed. Next, a raw material gas such as alkylnaphthalene is introduced into the sample chamber which is evacuated to a high vacuum of an electron beam irradiation device (not shown), and
In this source gas atmosphere, the semi-insulating GaAs substrate 1 is irradiated linearly from the source electrode 3 to the drain electrode 4 with an electron beam 6 focused to a diameter of, for example, several hundred holes. The energy of this electron beam 6 is, for example, 6 keV
The beam current is, for example, 20 μA. Further, the pressure of this raw material gas atmosphere is, for example, 10-' to 10-''T.
orr, typically 10-7 Torr.

By this irradiation with the electron beam 6, a hydrocarbon-based amorphous substance is generated from the raw material gas on the channel N2 in the shape of this irradiation pattern. As a result, Figure 2A
As shown in FIG. 2B, a resist 7 made of the above-mentioned material and having an ultra-fine width in the form of several hundred lines is formed on the channel layer 2. According to the analysis results by the inventor,
The above substance constituting the resist 7 has carbon atoms that are s
It is a polymer strongly bonded by p 3 hybrid orbitals and sp 2 hybrid orbitals, and is a highly stable substance.

Therefore, this resist 7 has high resistance to RIE.

Next, using the resist 7 formed as described above as a mask, the channel layer 2 and the semi-insulating GaAs substrate 1 are anisotropically etched by RIE, as shown in FIGS. 3A and 3B. Then, a linear channel layer 2 with an ultrafine width of about several hundred layers is formed. The reaction gas for this tE is, for example, CCI.

Mixed gas of F2 and He (flow rate is, for example, 20c each)
c/min, 50cc/min) and high frequency (13°56M
Hz) power is, for example, 70W. Thereafter, the resist 7 is removed by etching, for example, by RIE. This RIE
As the reaction gas, for example, CF4 (flow rate is, for example, 5 c
c/min), and the high frequency power is, for example, 50W.

Next, after forming a Schottky metal film such as W or Mo on the entire surface, the electron beam is irradiated perpendicularly to the channel layer 2 through the center of the channel layer 2 by the same method as described above. A resist (not shown) having an extremely fine width extending over the Schottky metal film is formed on the Schottky metal film. Next, using this resist as a mask, the Schottky metal film is R
After etching is performed using IE to form a gate electrode 8 having an extremely fine width of, for example, several hundred layers, as shown in FIGS. 4A and 4B, the resist is etched away using RIE. Note that one end of this gate electrode 8 is connected to the electrode 5 described above. In this way, the pseudo-dimensional GaAs M E S F with the channel layer 2 of ultra-fine width
ET is completed.

FIGS. 5 and 6 are graphs showing the etching characteristics of resist and GaAs, respectively, when GaAs is etched by RIE using a resist formed by electron beam irradiation as a mask. In addition, the reaction gas of RIE is CCI
□Mixed gas of F2 and He (flow rate is 20cc/each)
minute, 50cc/min), and the high frequency power is 70W. From FIG. 5, it can be seen that the etching rate of the resist is about 100 people/min. Note that a similar etching speed can be obtained when the high frequency power is 50W. On the other hand, from Figure 6, the etching speed of GaAs is about 5000 people/
It turns out that it is a minute. Therefore, the ratio (selectivity) of the GaAs etching speed to the resist etching speed
is large, about 50. In other words, the resist is hardly etched (GaAs can be etched).

Next, FIGS. 7 and 8 are graphs showing the etching characteristics of resist and GaAs, respectively, when the resist is etched away by RIE. The reaction gas for RIE is CF4 (flow rate is 5 cc/min), and the high frequency power is 5 cc/min.
It is 0W. From FIG. 7, it can be seen that the resist etching rate is about 400 people/min. On the other hand, from FIG. 8, it can be seen that the etching rate of GaAs is about 30 people/min.

Therefore, the ratio of the resist etching rate to the GaAs etching rate is about 10 times as large. That is, G
The resist can be etched without aAs being etched too much.

From the above, using the resist 7 as a mask, the channel layer 2
It can be seen that the semi-insulating GaAs substrate 1 can be etched with a high selectivity, and that the resist 7 can be easily removed by etching.

As described above, according to this embodiment, a resist 7 having an ultra-fine width with high RIE resistance is formed by irradiating the electron beam 6 in a source gas atmosphere, and the channel layer 2 and half are formed using this resist 7 as a mask. RI the insulating GaAs substrate 1
Since etching is performed using E, the channel layer 2 can be patterned to have a very fine width of about several hundred patterns, and therefore the channel layer 2 can be formed with a very fine width. In the above-mentioned quasi-dimensional GaAs MESFET having such a channel layer 2 with an ultra-fine width, electrons are confined within the channel layer 2 with a width comparable to the de Broglie wavelength. These electrons can travel between the drain electrode 4 and the source electrode 3 with almost no scattering, and therefore ultra-high speed operation can be achieved.

Further, according to this embodiment, there is no need to form a metal film with high RIE resistance as in the case of using the conventional electron beam lithography described above, so the manufacturing process is simple.

Although the embodiments of the present invention have been specifically described above, the present invention is not limited to the above-described embodiments, and various modifications can be made based on the technical idea of the present invention.

For example, instead of the electron beam 6, it is possible to use other types of charged particle beams, such as a positron beam or a muon beam. Further, in the above embodiment, the case of etching GaAs was explained, but the present invention can also be applied to the case of etching other types of semiconductors. -For example, RI Ge using resist as a mask
Etching characteristics when etched with E are shown in FIGS. 6 and 8.

Furthermore, in the embodiments described above, the present invention is applied to pseudo-dimensional G
Although the present invention has been described for the case where it is applied to the manufacture of aAs MESFET, it goes without saying that the present invention can be applied to the manufacture of Schottky gate FETs other than GaAs MESFETs.
EMT: High Electron M.

It is also possible to apply the present invention to the production of transistors, transistors, and even MOSFETs.

〔Effect of the invention〕

As explained above, according to the present invention, a resist with an extremely fine width can be formed by irradiating a semiconductor substrate with a charged particle beam in an atmosphere containing source gas. By etching the semiconductor substrate using reactive ion etching as a mask, it is possible to pattern the semiconductor substrate into extremely fine widths.

[Brief explanation of the drawing]

FIG. 1 shows a pseudo-dimensional GaAsME according to an embodiment of the present invention.
A perspective view for explaining the method of forming a resist with an extremely fine width by electron beam irradiation in the manufacturing method of SFET, FIG. 2A shows a state in which a resist with an extremely fine width is formed on the channel layer by the method shown in FIG. 1. 2B is a cross-sectional view taken along the line X-X of FIG. 2A, and FIG. 3A is a sectional view of the
A plan view showing a state in which a channel layer with an extremely fine width is formed by etching a channel layer and a semi-insulating GaAs substrate by RIE using the resist shown in FIGS. A and 2B as a mask, and FIG. 4A is a plan view showing the completed state of the pseudo-dimensional GaAs MESFET, and FIG. 4B is a sectional view taken along the Z-Z line in FIG. 4A. 5 is a graph showing the etching characteristics of the resist when GaAs is etched by RIE using a resist formed by electron beam irradiation as a mask. FIG. G when etched with RIE
A graph showing the etching characteristics of aAs. FIG. 7 is a graph showing the etching characteristics of a resist formed by electron beam irradiation and removed by RIE. FIG. 8 is a graph showing the etching characteristics of a resist formed by electron beam irradiation. 3 is a graph showing the etching characteristics of GaAs when removed by etching. Explanation of main symbols in the drawings 1: Semi-insulating GaAs substrate, 2: Channel layer, 6: Electron beam, 7: Resist, 8: Gate electrode. Agent Patent Attorney Tadashi Sugiura Tomo 6 Kamete σ-mu t + Beam 岨take]; Yo 3L cyst use Man 5 Tai Figure 1 Rest and carving L7: Status Figure 2 A Figure 2 B Figure 3A Figure 4A Figure 4B Eng/Tsuna〉＠Ivl(min) Ivl (min) Ivl(min) Ivl(min) Ivl(min) Nku'944A
S-^ In total ■ E + nf “time r81 (intermediate) Shizu 7. trie + pump special / +- to 7th figure / n 1000 k'@I”, i (now) GaAs&mu°'Ge. Etsu Imank °゛ Ushibeishizumi - No. 8
figure

Claims (1)

[Claims] A resist made of a substance generated from the raw material gas is formed on the semiconductor substrate by irradiating the semiconductor substrate with a charged particle beam in an atmosphere containing a predetermined raw material gas, and the semiconductor substrate is reacted using the resist as a mask. 1. A method for etching a semiconductor substrate, characterized in that the etching is performed using ion etching.