JPH01233134A - Wire breakage detecting device for vehicle - Google Patents

Abstract

PURPOSE:To detect the breakage of a wire for each lamp by setting only one among a number of driving means for controlling the lighting of a number of warning lamps into OFF-state and detecting the potential on the grounded side of each lamp through a common line. CONSTITUTION:Each one edge of a number of warning lamps L1-Ln is connected with an Ig line 1 and applied with a battery voltage, and the outer edge is connected with the collectors of a number of transistors T1-Tn as shift means. The other edges of the warning lamps L1-Ln are connected wit one common line 2 through a number of diodes D1-Dn in parallel to the transistors T1-Tn. A CPU 3 sets only one among the transistors T1-Tn into OFF state, and operates as detecting means for detecting the potential which is outputted from the warning lamps L1-Ln corresponding to the transistor in OFF-state into the common line 2.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a core breakage detection device for a vehicle that detects core breakage in a plurality of warning lamps.

(Conventional technology) In recent years, the use of electronics has progressed in automobiles.
A large number of electrical components are installed, and the wiring harness becomes bulky to connect them, resulting in problems such as increased weight and poor installation of wiring, etc.

Therefore, as described in, for example, Japanese Patent Laid-Open No. 62-4658, a multiplex communication system has been proposed that multiplexes and transmits and receives given information.

Specifically, for example, each multiplex node has a plurality of multiplex nodes connected in a network configuration to a common multiplex transmission path, data is transmitted from any one of the multiplex nodes for each frame having a destination address, and A distributed control multiplex transmission system using the C3MA/CD transmission system returns a reception confirmation signal from the specified multiplex node following this frame when the multiplex node specified by the address receives the frame normally. As shown in the schematic configuration in the figure, a plurality of multiplex nodes, for example, a front multiplex node FN, a combination switch multiplex node C8, a meter multiplex node MT, are connected via a multiplex transmission line (bus) MB consisting of twisted pairs, etc.
, rear multiplex node RN are connected. Note that a front turn light signal lamp 21, a front turn left signal lamp 22, a front small lamp 23, and a horn 24 are connected to the front multiple node FH, and a turn light switch 25, a turn light signal lamp 24 are connected to the combination switch multiple node C8. A left switch 26, a small lamp switch 27, a horn switch 28, and a headlamp high beam switch 29 are connected, and a turn light indicator 3 is connected to the meter multiplex node MT.
0, a turn left indicator 31, and a headlamp high beam indicator 32 are connected, and a rear turn light signal lamp 33,
Rear turn left signal lamp 34, tail lamp 3
5 (This tail lamp 35 is small lamp switch 2
7 is on and lights up) is connected.

In FIG. 5, which shows an example of a system configuration of multiple nodes and electrical components of an automobile, there are a front multiple node FN, a combination switch multiple node C8, a meter multiple node MT, a left cowl multiple node LC, and a rear multiple node RN for the vehicle. The turn light switch 25 and the turn left switch 26 are connected to the combination switch multiple node C8, and the wiper motor 36 and the air conditioner blower 37 are connected to the left cowl multiple node T.
, C.

In this multiplex transmission system for automobiles, automobile driving information is transmitted for each frame F having a configuration as shown in FIG. 6(a). Here, this frame F is S
D (Start Delimiter) code, priority code, frame ID code, data length,
The frame has a structure including data 1 to data N and a check code.

First, the SD code is a specific code representing the start of frame F, and the receiving multiplex node recognizes the start of frame F when it receives this SD code symbol. The priority code is a code indicating a priority order which indicates which signal should be processed with priority when a plurality of multiplex nodes transmit data at the same time and the signals collide. When a conflict occurs between multiple pieces of data, the data with higher priority is processed first. The frame ID code is a code that identifies what kind of data is allocated to each bit in the data area of the frame.

In other words, it is a code indicating the combination of data in the data area of frame F. The receiving multiplex node can know the data content of the data area of the frame F by this frame ID code.

The number of data that follows is written in the data length,
In this case, if there are N pieces of data, N is sent as the data length. The multi-node that receives this frame reads only the contents of the data length. The transmitted content that follows the data is a check code (error detection code), and by checking this, it is possible to know that the frame is at its end. In order to ensure data transmission, the receiving multiplex node uses a check code to check whether there are any errors in the contents of the received frame, and if there are no errors, the 72
A reception confirmation signal (ACK
Signal) Sends own station address as A to multiplex transmission path MB. Then, the multiplex node that transmitted frame F receives this acknowledgment signal, and the receiving side recognizes that the data has been received normally.

When data is not received correctly on the receiving side (when an error is detected by the check code) or when a framing error occurs (when the actually sent data is shorter or longer than the length specified by the data length) Figure 7 (
As shown in b), the receiving side does not return an ACK signal.

In this case, as shown in FIG. 7 (a), if the ACK signal is not returned within a certain period of time 72 after the end of frame transmission, the transmitting side determines that the transmission of frame F has failed and retransmits the same frame F. Start.

In this way, the receiving multiplex node judges the frame ID code, and if the data is necessary for its own multiplex node, it takes in this data and returns a reception confirmation signal, but if the data is unnecessary for its own multiplex node, If so, the reception confirmation signal will not be returned. The transmitting multiplex node has information as to which multiplex node requires the data of the frame ID code, and knows from which multiplex node the acknowledgment signal should be sent. If a reception confirmation signal is returned from a predetermined multiplex node, the transmission ends, but if no reception confirmation signal is returned, the transmitting multiplex node performs retransmission.

By the way, conventionally, the driver can visually detect a break in a warning lamp by turning on all warning lamps when the ignition switch is on and the alternator is not generating electricity before the engine starts. .

(Problems to be Solved by the Invention) When detecting a disconnection of a warning lamp in a vehicle employing the multiplex communication system as described above, there is a demand for electrical detection because the vehicle is equipped with a CPU.

The present invention has been made in view of the above, and an object of the present invention is to provide a core breakage detection device for a vehicle that can electrically detect whether or not each warning lamp is broken.

(Means for Solving the Problems) In order to achieve the above object, the present invention controls the lighting of a plurality of warning lamps by a driving means provided on the ground side of each warning lamp. The ground side of each of the warning lamps is connected to one common line through a diode in parallel with the driving means, and only one of the driving means is turned off, and a warning corresponding to the driving means in the OFF state is output. The device is characterized in that it includes a detection means for detecting the potential output from the lamp to the common line.

(Function) If only one of the warning lamp drive means is turned off, the turned off warning lamp has its ground side connected to the negative common line via the diode. If there is no core break in the warning lamp that is in the OFF state, the battery voltage will be applied to the common line, and the potential of the common line will become high. Therefore, by detecting the potential of the common line, it is possible to check whether the warning lamp that has been turned off is broken.

(Example) Embodiments of the present invention will be described in detail below with reference to the drawings.

In FIG. 1 showing the overall configuration of the vehicle core breakage detection device,
Lh), L(2)...L(n) are warning lamps, one end of which is connected to Ig line 1 to which battery voltage is applied, and the other end of which is a transistor Tr(1) + Tr( as a driving means). 2) ・,,Tlr(n
), and is connected in parallel to the collector of the common line 2 via diodes D(, ), D(2), . . . , D(n).

Each of the above transistors Tr(,), Tr(2)...Tr
The emitter of (n) is grounded, and the base has CPU3
signal boat P h) , P (2) ”'P (n)
, a drive signal is input in the event of a failure, and warning lamps L (□), L (2)...L (n) corresponding to the failure occur.
It is designed to light up.

Further, the common line 2 is grounded via a resistor 4, and a CP terminal is used to detect the potential of the common line 2.
It is also connected to U3's detection boat PO.

Therefore, the CPU 3 uses the transistor Tr h)+Tr
(2) Only one of =4r (n) is in the OFF state, and the transistors in the OFF state Tr h), Tr(
2) Warning lamp L corresponding to Tr (n)
(1) +L (2) . . . It functions as a detection means for detecting the potential output from (n) to the common line 2.

Further, the CPU 3 is connected to a multiplex transmission path line 6 via a multiplex interface 5.

The multiplex transmission path line 6 includes each warning lamp L.
A warning signal generation node 7 is connected to which failure detection switches SW (1), SW (2)-3W' (n) corresponding to (, ), L (2) . . . L (n) are connected. As a result, in the event of a failure, the failure detection switch SW (11, SW (2)...5W (
n) is closed, in response, the corresponding CPU3
A drive signal is output from the signal ports P (□) and P (2) P (n).

Further, 8 is an off-board checker, which is connected to the multiplex transmission path line 6 and is connected to the multiplex interface 5 from the CPU 3.
Warning lamps L(1), L(2)...L
(n) core breakage information is output.

In addition, Fig. 2 shows that while the warning lamps L (1) and L (2+ -L (n)) for checking for core breakage are on, there is a turn-off time of T + T2...Tn that is impossible for a human to discern. Warning lamps L h, l + L (
2) is a timing chart showing the operation of detecting core breakage of L (n). At the check timing of T□+T2...Tn, the voltage on the common line 2 becomes "Hi".
gh” level, it is determined whether the core is broken or not.

Next, the flow of the process for checking the breakage of the warning lamp 1 in the above apparatus will be explained with reference to FIG.

First, when the engine starts, it is determined whether the ignition switch (not shown) has been turned on (step S1), and if it has not been turned on, this determination is repeated again.

When the ignition switch is turned on, the port number i of the signal port is set to 1 (step S2), and then C
Signal port P (]-) of PU6, P (2)...
The signal port P(j), which is one of the port number P(n), that is, the signal port P(i) corresponding to the transistor Tr(i) of the warning lamp L(1) to be checked for disconnection. ) to output a ``Low'' level signal (Step S3), and output a ``High'' level signal from the other signal ports (P (signal ports other than l)) (Step S4). Tr(1) + Tr(2) ”'T
Among r (n), only one transistor Tr (j) is in the OFF state, and the other transistors are in the ON state.

Thereafter, the potential ■ applied to the common line 2 through the signal port Po of the CPU 3 is detected (step S5), and it is determined whether or not the potential ■ is at the "High" level (step S6). If so, the warning lamp L(i) is not broken, so the port number i is immediately set to i±1 in order to move to the next signal port (step 57). On the other hand, if it is Low''' level, the warning lamp L(i) is not broken. Since the lamp L(j) is broken, it is remembered that it was at the "Low" level at port number i (step S8), and the process moves to step S7.

After the process in step S7, it is determined whether the port number j is greater than the total number of ports n (step S9), and if so, all the signal ports P (□).

P(2)...P(n) has completed the core break check for all warning lamps L(□), L(2)...L(n), so exit as is, and if it is not large, proceed to step Proceeding to S3, the remaining warning lamps are checked for breakage.

In this way, the transistor Tr (z
), Tr (2) "" By changing r(n) sequentially, all the gluing ramps L(□l, L (2)
A break check can be performed for L (n).

From the driver's perspective, this is the same as turning on all warning lamps for a conventional core break check.

(Effects of the Invention) As described in "-", the present invention detects the potential on the ground side of the warning lamp through one common line by turning off only one of the driving means for controlling lighting of the warning lamp. Therefore, it is possible to electrically determine whether or not each warning lamp is broken by simply detecting the potential of the common line.

[BRIEF DESCRIPTION OF THE DRAWINGS] The drawings show an embodiment of the present invention, and FIG. 1 is an overall configuration diagram of a core breakage detection device for a vehicle, FIG. 2 is a time chart of the core breakage detection procedure, and FIG. Figure 4 is a flowchart showing the flow of processing. Figure 4 is a schematic configuration diagram showing a multiplex transmission system for automobiles using the CC3MA/CD transmission system. Figure 5 is a schematic top view showing an example of the system configuration of multiple nodes and electrical components in an automobile. 6 and 7 are diagrams each illustrating a frame in a conventional multiplex transmission system for automobiles. L(□), L(2)...L(n)...Warning lamp, Tr(1), Tr(2) -Tr(n)
−=transistor, D (1), D (2) ”'
D (n) """ diode, 2... Common line, 3... CPU. Procedural amendment (method)

Claims (1)

[Claims] (1) In a device in which the lighting of a plurality of warning lamps is controlled by a drive means provided for the ground side of each warning lamp, the ground side of each warning lamp is connected in parallel with the drive means via a diode. te1
It is characterized by having a detection means that is connected to the common line of the book, turns only one of the drive means in an OFF state, and detects a potential outputted to the common line from a warning lamp corresponding to the drive means in the OFF state. Core breakage detection device for vehicles.