JPH01232476A - Logical data control method for cad device - Google Patents

Abstract

PURPOSE:To produce the integrated logical data from the latest graphic data just with extraction of the integrated logical data by securing the latest level for each type of the drawing data, the drawing logical data and the integrated logical data respectively. CONSTITUTION:The level areas are prepared to show the latest level for the drawing data, the drawing logical data and the integrated logical data respectively. When the integrated logical data is produced, the levels shown in the level areas are checked to all drawing data. When only the drawing data having the discordance of levels are compiled. Furthermore the level of each drawing of the integrated logical data is checked together with the level of the logical data. Then the replacement processing (linkage processing) is carried out for the discordant levels. Thus the miscompiling cases can be decreased.

Description

[Detailed Description of the Invention] [Summary J] This invention relates to a logical data management method in a CAD device used when designing printed circuit boards for digital circuits, pattern wiring for ICs, etc., which reduces the number of times of compilation and eliminates mistakes such as forgetting to compile. With the aim of reducing the number of errors and making it possible to modify drawings with simple operations, the system combines drawing data, drawing logical data created by compiling this drawing data, and integrated logical data obtained by linking this drawing logical data. In a CAD device that has a database of The level of the level area is sequentially shifted up by +1 each time it is updated, the level of the level area of graphic data is transferred when drawing data is compiled, the level of the level area of drawing logical data is transferred when linking drawing logical data, When creating the integrated logic, the level that is specified in each level area is checked, and the system is configured so that compilation and linkage processing can only be performed for those with level mismatches.

[Industrial Application Field] The present invention relates to a logical data management method in a CAD device used for designing printed circuit boards of digital circuits, pattern wiring of ICs, etc.

For example, when connecting multiple ICs efficiently using pattern wiring, the coordinate data of the connection bins of each IC element and the data (graphic data) indicating the lines to connect each connection bin can be transferred to a graphic terminal, etc. The computer compiles the input graphic data to create logical data for each drawing, and then links and integrates these logical data to create one package of logical data. Simulations and implementation designs can be performed based on the integrated logical data.

Such multiple graphical data and logical data.

In a logical CAD device that uses integrated logical data, -
Efficiently correct each data input (correct drawing)
A logical data management method is required to avoid mistakes.

[Prior Art] FIG. 4 is a conceptual diagram of the structure of a database in a logical CAD device. The database includes graphic data DD1-DDn for each drawing 1-n, logical data D1-Qn for drawings 1-n, integrated logical data MDO, parts database, etc. Each of these data is stored in a storage such as a magnetic disk. stored in the device.

FIG. 5 is a conceptual diagram of the flow up to the first rt of integrated logical data MDO in the database. Each drawing 1~n
By compiling the graphic data of each drawing 1~
n logical data (objects) are obtained, and by linking these, integrated logical data (one package of logic) is obtained.

In a logical CAD device that has such a database, drawing corrections are always performed on graphical data DD1 to DDn, and therefore, after drawing corrections, the integrated logical data is created through compilation and linkage of the corrected drawings. M
You need to make sure you get the DO.

[Problems to be Solved by the Invention] For this reason, according to conventional logical data management methods, graphic data may be modified but forgotten to be compiled, or graphic data may be modified or compiled but the linkage may be forgotten, etc. There is a problem in that mistakes are likely to occur when making corrections.

Also, if you compile and link all the drawings in one package, there will be no problem the first time, but from the second time onwards, you will need to compile again even for drawings that are not modified, resulting in an unnecessary number of compilations. There is also the problem of an increase in

FIG. 6 is a conceptual diagram showing this problem.

The present invention has been made in view of these points, and by ensuring that each drawing of drawing data, drawing logical data, and integrated logical data has the latest level, mistakes such as forgetting to compile can be reduced. The purpose of the present invention is to provide a logical data management method that allows modification of drawings with simple operations.

[Means for Solving the Problems] FIG. 1 is a flow chart showing the principle of the present invention. The logical data management method of the present invention provides a CAD apparatus having a database including drawing data, drawing logical data obtained by compiling the drawing data, and integrated logical data obtained by linking the drawing logical data, the drawing data; A level area indicating the latest level is provided for each drawing logical data and integrated logical data (step (
1)), Step (2)) to set level 1 in the level area when registering drawing data to the database, step (3)) to shift up the level in the level area by +1 each time the drawing is revised or updated, Step (4): Transfer the level of the level area of the figure data when compiling the drawing data.
), transfer the level in the level area of the drawing logical data when linking the drawing logical data (step ■) [Action] When creating integrated logic, check the level shown in the level area for all drawing data. , compile only those with level mismatches. Also, the level of each drawing of the integrated logic and the level of logical data are checked, and replacement processing (linkage processing) is performed for those that do not match. This makes it possible to reduce errors such as forgetting to compile.

[Example 1 Embodiments of the present invention will be described in detail below with reference to the drawings.

FIG. 2 is a system configuration diagram for implementing the method of the present invention. In the figure, 1 is a computer (CPU), 2
3 is a storage device in which a database is stored, and 3 is a graphic display, such as a CRT. 4 is a keyboard, and 5 is a tablet for specifying and inputting a desired position of a figure displayed on the graphic display 3, such as a light pen or a mouse. 6 is a plotter, and 7 is a bus connecting each part.

FIG. 3 is a diagram for explaining the method of the present invention.

First, as shown in (a), graphical data for a logic circuit diagram is input using the graphic display 3 and tablet 5 or, if necessary, the keyboard 4. Further, these graphic data are stored in the database, and a level "1" is added to the level area in the registration section.

Next, create the integrated logical data. In this case, since there is no drawing logical data at first, all the drawing data are first compiled as shown in (b) to create logical data. At this time, drawing level ``1''
is transferred to the logical data level area. Next, (c)
As shown in the figure, linkage is performed for all drawings in one package to create integrated logical data. Also, at this time, the logic level "1" is simultaneously transferred to the level area.

Through the above procedure, the graphic data, logical data, and integrated logical data are stored as a database in the storage device 2, with the level "1" assigned to each of them.

Next, if an error is discovered during mounting design or simulation 912, and the circuit diagram needs to be corrected or updated,
As shown in (d), the graphic display 3 is displayed again.
and the tablet 5 to correct and update the graphic data. Here, for the modified/updated graphic data, the level attached to the level area is increased to 2''.

Next, instructions are given to create an integrated logic. Here, as shown in the beginning (E), a level check is performed on all drawing data, compilation is performed on mismatched or additional pages, the level is transcribed, and logical data is 1q. Subsequently, as shown in (v), the level of each drawing and the level of logical data of the integrated logic are checked, and replacement processing is performed for mismatched or additional pages. Also, the deleted page is deleted using integrated logical data.

Thereafter, repeat the procedures shown in (2), (e), and (f) above to complete the modification of the drawing.

[Effect of the invention 1 As explained in detail above, one feature of the present invention is that each data type unit of drawing data, logical data, and integrated logical data is provided with the latest level. This allows integrated logical data to be created from the latest graphical data by only instructing the extraction of logical data. Therefore, according to the present invention, the number of times of compiling can be reduced, mistakes such as forgetting to compile can be reduced, and drawings can be corrected with simple operations.

[Brief explanation of the drawing]

Fig. 1 is a flowchart showing the principle of the present invention, Fig. 2 is a system configuration diagram for realizing the method of the present invention, Fig. 3 is a diagram for explaining the invention in detail, and Fig. 4 is a logical CADI Fig. 5 is a conceptual diagram of the flow until integrated logical data is obtained in the database; Fig. 6 is a conceptual diagram for explaining the problems of the conventional method. In Figure 2, 1 is a CPU. 2 is a storage device, 3 is a graphic display, 4 is a keyboard, 5 is a tablet, 6 is a plotter, and 7 is a bus. Flowchart showing the principle of the present invention, Figure 1, Section 2

Claims (1)

[Scope of Claims] A CAD device having a database including drawing data, drawing logical data created by compiling the drawing data, and integrated logical data obtained by linking the drawing logical data, the drawing data; A level area indicating the latest level is established for each drawing logical data and integrated logical data (step (1)), and the level area "1" is set when registering the drawing data in the database.
(Step (2)), and increase the level of the level area by 1 each time the drawing is revised or updated.
(step (3)), transfer the level of the level area of the graphic data when compiling the drawing data (step (4)), and transfer the level of the level area of the drawing logical data when linking the drawing logical data. (Step (5)) A CAD device characterized in that the level assigned to each level area is checked when creating the integrated logic, and compilation and linkage processing can be performed only for those with level mismatches. Logical data management methods.