JPH01231431A - A/d converting circuit - Google Patents

A/d converting circuit

Info

Publication number
JPH01231431A
JPH01231431A JP5625988A JP5625988A JPH01231431A JP H01231431 A JPH01231431 A JP H01231431A JP 5625988 A JP5625988 A JP 5625988A JP 5625988 A JP5625988 A JP 5625988A JP H01231431 A JPH01231431 A JP H01231431A
Authority
JP
Japan
Prior art keywords
conversion
section
reference voltage
voltage level
value
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5625988A
Other languages
Japanese (ja)
Inventor
Teruyuki Higuchi
輝幸 樋口
Kengo Mitsui
郁吾 三井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
NEC Computertechno Ltd
Original Assignee
NEC Corp
NEC Computertechno Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, NEC Computertechno Ltd filed Critical NEC Corp
Priority to JP5625988A priority Critical patent/JPH01231431A/en
Publication of JPH01231431A publication Critical patent/JPH01231431A/en
Pending legal-status Critical Current

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  • Analogue/Digital Conversion (AREA)

Abstract

PURPOSE:To correct the AD conversion without using any programming method by applying correction and calculation to a digital value subject to AD conversion by an AD conversion section based on a digital value representing a reference voltage level at the initial operation stored by a reference voltage level storage section. CONSTITUTION:An analog signal inputted via an analog signal input section 16 is AD-converted by an AD conversion section 10 after the end of the initial operation and its digital value is inputted directly to an arithmetic section 14. The arithmetic section 14 compares the digital value given from the AD conversion section 10 receiving an input analog voltage with a digital value representing a reference voltage level in the initial operation read from a reference voltage level storage section 12, the AD conversion value of the input analog voltage outputted from the AD conversion section 10 is corrected after the end of the initial operation nd its correction value is outputted externally via a digital signal output section 18. Thus, the AD conversion value is corrected without using any programming method.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明はAD変換回路に係わり、特にAD変換を行う基
準となるアナログの基準電圧レベルの変動に起因するA
D変換値の変動を自動的に補正するAD変換回路に関す
る。
[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to an AD conversion circuit, and in particular, the present invention relates to an AD conversion circuit, and in particular, A
The present invention relates to an AD conversion circuit that automatically corrects fluctuations in D conversion values.

〔従来の技術〕[Conventional technology]

従来のAD変換回路には種々の方式のものが有るが、い
ずれもAD変換の基準となる基準電圧に基づいて入力ア
ナログ電圧に対してそのディジタル変換値を1対lで出
力するだけであり、アナログの基準電圧のレベルが変動
してもAD変換値を補正するように構成されていなかっ
た。
There are various types of conventional AD conversion circuits, but all of them simply output the digital conversion value in a 1:1 ratio with respect to the input analog voltage based on the reference voltage that is the standard for AD conversion. It was not configured to correct the AD conversion value even if the level of the analog reference voltage fluctuated.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上述したように従来のAD変換回路ではアナログ入力電
圧に対して基準電圧のレベルに基づいて忠実にディジタ
ル値に変換して出力するように構゛成されているために
基準電圧のレベルの変動に対応できるようにするにはプ
ログラム的手法を用いなければならず、それ故プログラ
ム構成が複雑になるという問題があった。
As mentioned above, conventional AD conversion circuits are configured to faithfully convert an analog input voltage into a digital value based on the level of the reference voltage and output it, so they are sensitive to fluctuations in the level of the reference voltage. In order to be able to handle this, a programmatic method had to be used, which caused the problem that the program configuration became complicated.

本発明はこのような事情に鑑みてなされたものであり、
プログラム的手法を用いることなく、AD変換の基準と
なる基準電圧の変動に応じてAD変換値を補正すること
ができるAD変換回路を提供することを目的とするもの
である。
The present invention was made in view of these circumstances, and
It is an object of the present invention to provide an AD conversion circuit capable of correcting an AD conversion value according to fluctuations in a reference voltage that is a reference for AD conversion without using a programming method.

〔課題を解決するための手段〕[Means to solve the problem]

本発明は上記目的を達成するために、入力アナログ電圧
をAD変換するAD変換手段と、初期動作時にAD変換
の基準となるアナログ基準電圧がAD変換手段によりA
D変換されて得られたディジタル値を基準電圧レベル保
持手段と、初期動作完了後にAD変換手段のディジタル
出力を受け、このディジタル値と基準電圧レベル保持手
段により保持されている基準電圧レベルを示すディジタ
ル値とを比較演算することによりAD変換手段のAD変
換値を補正する演算手段とを有することを特徴とするも
のである。
In order to achieve the above object, the present invention includes an AD conversion means for AD converting an input analog voltage, and an analog reference voltage that is a reference for AD conversion at the time of initial operation.
A digital value obtained by D conversion is sent to a reference voltage level holding means, and after the initial operation is completed, a digital output from the AD conversion means is received, and this digital value and a digital value indicating a reference voltage level held by the reference voltage level holding means are provided. The present invention is characterized in that it has a calculation means for correcting the AD conversion value of the AD conversion means by performing a comparison calculation with the value.

このように構成することによりアナログ入力電圧に対す
るAD変換値を相対的な値として出力することができる
With this configuration, the AD conversion value for the analog input voltage can be output as a relative value.

〔実施例〕〔Example〕

以下、本発明の好ましい実施例を図面を参照して説明す
る。
Hereinafter, preferred embodiments of the present invention will be described with reference to the drawings.

第1図には本発明に係わるAD変換回路の一実施例の構
成が示されている。同図にふいてAD変換回路はアナロ
グ信号人力部16より入力されるアナログ信号をディジ
タル信号に変換するAD変換部10と、初期動作時にこ
のAD変換部10によりAD変換された基準電圧レベル
のディジタル値を保持する基準電圧レベル保持部12と
、初期動作完了後にAD変換部10によりAD変換され
た人力アナログ電圧のディジタル値を基準電圧レベル保
持部12により保持されている初期動作時における基準
電圧レベルを示すディジタル値に基づいて補正演算する
演算部14とから主として構成されている。
FIG. 1 shows the configuration of an embodiment of an AD conversion circuit according to the present invention. As shown in the figure, the AD conversion circuit includes an AD conversion section 10 that converts an analog signal inputted from an analog signal input section 16 into a digital signal, and a digital signal of a reference voltage level that is AD-converted by this AD conversion section 10 during initial operation. A reference voltage level holding unit 12 that holds a value, and a reference voltage level holding unit 12 that holds a digital value of a human-powered analog voltage that is AD-converted by the AD conversion unit 10 after the initial operation is completed, and a reference voltage level at the time of initial operation. It is mainly composed of a calculation section 14 that performs correction calculations based on digital values indicating .

上記構成において、初期動作としてAD変換部lOにお
けるAD変換動作の基準となるアナログ基準電圧がアナ
ログ信号入力部16よりAD変換910に入力され、A
D変換部10で変換されたディジタル値が基準電圧レベ
ル保持部12に保持される。
In the above configuration, as an initial operation, an analog reference voltage serving as a reference for AD conversion operation in the AD conversion unit IO is input from the analog signal input unit 16 to the AD conversion 910,
The digital value converted by the D conversion section 10 is held in the reference voltage level holding section 12.

次いで初期動作完了後、アナログ信号入力816を介し
て入力されるアナログ信号はAD変換部10でAD変換
され、そのディジタル値は演算部に直接、入力される。
Next, after the initial operation is completed, the analog signal input via the analog signal input 816 is AD converted by the AD converter 10, and the digital value thereof is directly input to the arithmetic unit.

演算部14ではAD変換部10より出力された入力アナ
ログ電圧のディジタル値と基準電圧レベル保持部12か
ら読み出された初期動作における基準電圧レベルを示す
ディジタル値とが比較演算され、初期動作完了後にAD
変換部10より出力された入力アナログ電圧のAD変換
値が補正され、その補正値がディジタル信号出力部18
を介して外部に出力される。
The calculation unit 14 compares and calculates the digital value of the input analog voltage output from the AD conversion unit 10 and the digital value indicating the reference voltage level in the initial operation read from the reference voltage level holding unit 12. A.D.
The AD conversion value of the input analog voltage output from the converter 10 is corrected, and the corrected value is sent to the digital signal output unit 18.
output to the outside via.

このように本実施例によればプログラム的手法を用いず
に、AD変換部lOにおけるアナログ基準電圧レベルが
変動しても、初期動作時にふける基準電圧レベルに基づ
いてAD変換値を補正することができる。
In this way, according to this embodiment, even if the analog reference voltage level in the AD converter lO fluctuates, the AD conversion value can be corrected based on the reference voltage level at the time of initial operation, without using a programming method. can.

またAD変換部10における基準電圧レベルの変化が大
きい場合には初期動作の頻度を高くすることにより対応
でき、従来のAD変換回路を用いる場合に比してプログ
ラム構成が簡略化されると共に、AD変換回路を1つの
ユニットとして把えることかできるので汎用性を持たせ
ることができる。
In addition, when the reference voltage level in the AD converter 10 changes significantly, it can be handled by increasing the frequency of initial operations, which simplifies the program configuration compared to the case where a conventional AD converter circuit is used. Since the conversion circuit can be considered as one unit, it is possible to provide versatility.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明では初期動作完了後にAD変
換部によりAD変換されたディジタル値を基準電圧レベ
ル保持部により保持されている初期動作時における基−
準電圧レベルを示すディジタル値に基づいて補正演算す
るように構成したので、本発明によればプログラム的手
法を用いることなく、AD変換部におけるAD変換の基
準となる基準電圧レベルが変動しても、AD変換値を補
正することができ、アナログ人力に対するAD変換値を
常に相対的な値として出力することがで、きる。
As explained above, in the present invention, after the initial operation is completed, the digital value AD-converted by the AD converter is converted into the reference voltage level held by the reference voltage level holding unit at the time of the initial operation.
Since the present invention is configured to perform correction calculations based on digital values indicating quasi-voltage levels, the present invention does not require programming techniques even if the reference voltage level, which is the standard for AD conversion in the AD conversion unit, changes. , it is possible to correct the AD conversion value, and it is possible to always output the AD conversion value with respect to analog human power as a relative value.

それ故、センサ等の検出出力の処理の如く、高精度を要
・求されるアナログ信号の処理に対して極めて顕著な効
果が発揮される。
Therefore, an extremely remarkable effect is exhibited in the processing of analog signals that require high precision, such as the processing of detection outputs from sensors and the like.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明に係わるAD変換回路の一実施例の構成
を示すブロック図である。 10・・・・・・AD変換部、 12・・・・・・基準電圧レベル保持部、14・・・・
・・演算部、 16・・・・・・アナログ信号入力部、18・・・・・
・ディジクル信号出力部。
FIG. 1 is a block diagram showing the configuration of an embodiment of an AD conversion circuit according to the present invention. 10... AD conversion section, 12... Reference voltage level holding section, 14...
...Calculation section, 16...Analog signal input section, 18...
- Digital signal output section.

Claims (1)

【特許請求の範囲】[Claims] 入力アナログ電圧をアナログ・ディジタル変換するAD
変換手段と、初期動作時にAD変換の基準となるアナロ
グ基準電圧が前記AD変換手段によりアナログ・ディジ
タル変換されて得られたディジタル値を保持する基準電
圧レベル保持手段と、初期動作完了後に前記AD変換手
段のディジタル出力を受け、このディジタル値と基準電
圧レベル保持手段により保持されている基準電圧レベル
を示すディジタル値とを比較演算することにより前記A
D変換手段のAD変換値を補正する演算手段とを有する
ことを特徴とするAD変換回路。
AD converts input analog voltage from analog to digital
a conversion means, a reference voltage level holding means for holding a digital value obtained by converting an analog reference voltage, which is a reference for AD conversion, into an analog-to-digital value by the AD conversion means at the time of initial operation; A.
1. An AD conversion circuit comprising: calculation means for correcting an AD conversion value of the D conversion means.
JP5625988A 1988-03-11 1988-03-11 A/d converting circuit Pending JPH01231431A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5625988A JPH01231431A (en) 1988-03-11 1988-03-11 A/d converting circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5625988A JPH01231431A (en) 1988-03-11 1988-03-11 A/d converting circuit

Publications (1)

Publication Number Publication Date
JPH01231431A true JPH01231431A (en) 1989-09-14

Family

ID=13022084

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5625988A Pending JPH01231431A (en) 1988-03-11 1988-03-11 A/d converting circuit

Country Status (1)

Country Link
JP (1) JPH01231431A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03205921A (en) * 1990-01-08 1991-09-09 Hitachi Denshi Ltd Digitizer circuit
JP2006352442A (en) * 2005-06-15 2006-12-28 Seiko Epson Corp Integrated circuit device, microcomputer, and electronic equipment

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03205921A (en) * 1990-01-08 1991-09-09 Hitachi Denshi Ltd Digitizer circuit
JP2006352442A (en) * 2005-06-15 2006-12-28 Seiko Epson Corp Integrated circuit device, microcomputer, and electronic equipment

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