JPH01224820A - Method for constituting bus and bus circuit - Google Patents

Abstract

PURPOSE:To transmit a high speed signal without a waveform distortion even when it is divided into many slots by dividing between respective plural pins connected to the plural terminals of the first card of a mother board and the other plural pins of a slot connected to the one terminal of a second card for an averaged number and wiring. CONSTITUTION:A driver 13A is connected to receivers 110-112, a driver 13B is connected to receives 120-123, the respective drivers are divided into the three receives and the four receives, respectively, and are connected, and the both drivers drive the load of an averaged number. The receivers 110-112 and 120-123 are connected through pins 102a-108a, respectively, the receivers 110-112 receive a signal from the driver 13A from a bus 11, and the receivers 120-123 receive the signal from the driver 13B from a bus 12. Thus, even when the high speed signal is divided into many slots in the case of forming the bus in the mother board, transmission can be executed without a waveform distortion.

Description

[Detailed Description of the Invention] [Summary] Regarding a bus configuration method and a bus circuit for forming a bus on a motherboard when configuring a system using a microprocessor, the present invention relates to a bus configuration method and a bus circuit for forming a bus on a motherboard. The purpose of the present invention is to provide a bus configuration method and a bus circuit that can be transmitted without waveform distortion even when distributed to the slots of the motherboard. A receiver that outputs output from a plurality of pins of one slot and connects the pins so that each output of the plurality of driver is received by an approximately average number of receivers from the slots of the mother port, and receives the output of the plurality of drivers. is configured to be connected to the same predetermined pin position of each slot 1, and is further equipped with multiple drivers that are simultaneously driven by the same signal and output to multiple terminals in a hash circuit formed on the motherboard. a first card; a second cart having a receiver for receiving an output signal of the driver from a fixed terminal; and at least one slot having a plurality of pins connecting to the plurality of terminals of the first card; and a motherboard having another slot with a pin connecting to the one terminal location of the second card, each of the plurality of pins connecting to the plurality of terminals of the first card of the motherboard. , the wiring is divided into an average number of pins connected to one terminal of the second card and the pins of the other plurality of slots.

[Field of Industrial Application] The present invention relates to a bus configuration method and bus circuit for forming a bus on a motherboard when a system is configured using a microprocessor.

When creating a system using a microprocessor, a common bus configuration is very often used, and the signals transmitted by the bus include clock signals and various control signals in addition to data and address signals.

Conventionally, when a bus is configured using a motherboard or a bank panel (hereinafter simply referred to as the motherboard), a configuration in which the buses are simply connected to one bus is used to transmit signals such as clock signals that are affected by the rise or fall of the waveform. However, this method has disadvantages in response to an increase in clock speed and an increase in the number of connected slots, and a solution to these problems is desired.

[Prior Art] Fig. 4 shows a configuration diagram of a conventional example, (a) shows a circuit configuration diagram of a signal lot, and (b) shows an explanatory diagram of the connection relationship between a motherboard and a card.

First, in (A), 30 is a signal generator, 31 is a driver, 32 to 38 are receivers, and 300 is a lotus. It is output to bus 300. A plurality of receivers 32 to 3 are connected to the bus 300 at predetermined intervals, and when received by each receiver, the signal is supplied to a circuit (not shown) provided in each receiver to achieve a desired function.

If the bus circuit shown in (a) of FIG. 4 is configured by a motherboard and a card, it will be as shown in (b). (
In (b), 40 is a card (printed circuit board) including the driver 400, 41 is a motherboard having a plurality of slots 1 to 8, and 42 is a card including a receiver 421, to which card 40 is connected in slot positions 1 to 8 of the motherboard. A card with seven receivers is used to connect to seven slots other than those slot positions.

Note that "slot" refers to the motherboard (bank panel).
represents a place where a guide rail is provided and a plurality of pins are provided which connect to a plurality of terminals of the card when one card is inserted.

In the configuration (b), a card 40 equipped with a driver 400 is inserted into one of the slots of the motherboard 41, and seven cards equipped with a receiver 421 are inserted into the other slots. Then pins 411.412.4 on the motherboard
13...One of 418 and the driver 40 of the card 40
0 terminal 401 is connected, and the remaining pins are connected to terminals 422 connected to receivers 421 of seven cards 42 in their respective slots.

Then, when the card 40 is connected to slot 1 and the cards 42 are inserted into the other slots 2 to 8, (a) in FIG.
A bus circuit is formed.

[Problem R to be solved by the invention] According to the conventional configuration, there is no problem when the speed of the signal generated from the signal generator is low, but when the speed of the signal (especially the clock signal) is increased, or when the motherboard When increasing the number of slots (in the case of FIG. 4, when increasing the number of cards equipped with receivers), the problem is that waveform distortion increases and signals cannot be transmitted correctly.

The reason for this is that as shown in Figure 4 (a), bus 300
has a characteristic impedance (for example, 1
00Ω) and is matched with the terminating resistor R1,
This is because, in terms of AC, as the frequency increases, impedance matching becomes difficult due to an increase in capacitance according to the number of loads, and as a result, reflection occurs and waveform distortion occurs.

SUMMARY OF THE INVENTION An object of the present invention is to provide a bus configuration method and a bus circuit that can transmit high-speed signals without waveform distortion even if they are distributed to many slots when a bus is formed on a motherboard.

[Means to solve the problem] A basic configuration diagram of the present invention is shown in FIG.

In FIG. 1, 10 is a motherboard, 11.12 is a bus formed by crossing the pins in the center as shown in the figure, 13A and 13B are drivers, and 14 is a signal generator, 101a and 101b. ~108a, 108b are pins provided in each slot, 110~112
．． 120 to 123 each represent a receiver.

Driver 13A is connected to receivers 110-112;
Driver 13B is connected to receivers 120-123,
Each driver is divided and connected to three receivers and four receivers, respectively, and both drivers drive an average number of loads.

Although FIG. 1 shows the basic configuration when two drivers are provided, it is also possible to configure three or more drivers and correspondingly divide the receiver into three or more parts based on the same principle. Further, although only two pins are shown in each slot on the motherboard 10, other pins are naturally provided, but are not shown.

[Operation] In FIG. 1, drivers 13A and 13B are simultaneously driven by an input signal from signal generating section 14, and the output of each driver is outputted to buses 11 and 12 from pins 101a and 101b of the motherboard.

Receivers 110-112 and 120-123 that receive outputs from the two drivers are connected to the motherboard via pins 102a-108a, respectively.
0 to 112 receive signals from driver 13A from bus 11, and receivers 120 to 123 receive signals from driver 13B from bus 12.

In the above explanation, the outputs of drivers 13A and 13B are connected to pin 1.
01aS101b, but this output can be sent to any pin in any other slot on the motherboard, such as 105a,
Connecting to IQ5b also works in the same way. In that case, the receiver 120 is connected to pin Iota, 101b.

[Example] A configuration diagram of Example 1 of the present invention is shown in FIG. 2 (al), and an explanatory diagram of the connection arrangement between the motherboard and the card is shown in FIG. 2.

In FIG. 2 ia), 20 is a clock signal generator;
01 is a card (printed circuit board) equipped with driver A (202) and driver B (203), 21 is a motherboard,
22 represents a card provided with a receiver 221.

The card 20 can be inserted into any of the slots 1 to 8 of the motherboard 21. If the card 20 is inserted into slot 1, the output of the driver ASB of the card 20 is connected to the pins 204a and 204b of the slot I-1. 211a,
211b and enters the state shown in FIG. 2 (bl).

The card 22 has a receiver 221 connected to a terminal 222a.
It can be inserted into any slot other than the one in which the driver is inserted to receive signals. In this example, seven cards are prepared (the receiver configuration is the same, but each card is equipped with a different circuit), inserted into the other slots 2 to 8, and one of them is inserted into the other slots 2 to 8. The state in which the card 22 is inserted is shown in FIG. 2 (bl).

Motherboard pin 2] IX1-214a and pin 2
] 5b to 218b are connected to each other, and pins 211b to 218b are connected to each other.
213b and pins 215a to 218a are connected to each other, and when the cards 22 are inserted into slots 2 to 8, the circuit configuration shown in FIG.
Each drives approximately the same number of receivers as a load, and the load on each driver is approximately half that of a single driver.

If three drivers are provided and output is simultaneously output from three terminals, the load on each driver will be reduced to 1/3.

FIG. 2 (C1) shows another wiring example diagram of the motherboard in the configuration of the embodiment shown in FIG. 2 (al).

The wiring of this motherboard is different in that the pins corresponding to the two outputs of the driver are connected in a crossed manner for each slot.

A configuration diagram of a second embodiment of the present invention is shown in FIG.

Figure 3 shows only the configuration of the motherboard, and the card equipped with a driver and the card equipped with a receiver are shown in Figure 2+al.
It is similar to that shown in .

The motherboard 50 in FIG. 3 has pins 5 of slots 1 to 8.
01a to 504a are connected to each other, and pins 501b and 504a are connected to each other.
05a to 508a are connected as shown in the figure,
The feature is that nothing is wired to the pins 502b to 508b.

In the case of the motherboard shown in FIG. 3, the position where the card (20 in FIG. 2 (al)) provided with a driver is inserted is limited to slot 1.

Then, seven cards with receivers (Fig. 2(al)
22) are connected to other slots 2 to 8, and output approximately the same number of drivers A, B from 502a to 508a, which have the same pin position (a side) (in this example, 3 and 4).
pcs) each.

In this configuration, the wiring of the motherboard is simplified compared to FIG. 2 (al).

〔Effect of the invention〕

According to the bus configuration method and bus circuit of the present invention, when a bus is formed on a motherboard, high-speed signals can be distributed to many slots without causing signal distortion.

[Brief explanation of the drawing]

FIG. 1 is a basic configuration diagram of the present invention, FIG. Other wiring example diagrams, FIG. 3 is a configuration diagram of Embodiment 2 of the present invention, and FIG. 4 is a configuration diagram of a conventional example. In FIG. 1, 10: Motherboard 11. 12: Buses 13A, 13B: Driver 14: Signal generator 10'la to 108b: Bin

Claims (1)

[Claims] 1) In a bus configuration method for forming a bus on a motherboard, the same signal is simultaneously driven by a plurality of drivers (13A, B) to connect a plurality of pins (101a, b) of one slot of the motherboard (10). output from the plurality of drivers, and the number of receivers (110 to 112
, 120 to 123), and the receiver that receives the plurality of driver outputs is connected to the same pin position (101a to 108a) of each slot.
) A bus configuration method for forming a bus on a motherboard. 2) In the bus circuit formed on the motherboard, a first card (20) equipped with a plurality of drivers (202, 203) that are simultaneously driven by the same signal and output to a plurality of terminals (204a, b), and the output of the driver. One terminal with fixed signal (222a)
a second card (22) with a receiver (221) receiving from the first card;
one slot and the one terminal position of the second card (
a motherboard having another slot with pins (211a to 218a) connected to the first card of the motherboard, each of the plurality of pins connected to the plurality of terminals of the first card of the motherboard; A bus circuit characterized in that wiring is divided into an average number of pins between one terminal of a card and pins of a plurality of other slots connected to each other.