JPH01222465A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPH01222465A JPH01222465A JP4897588A JP4897588A JPH01222465A JP H01222465 A JPH01222465 A JP H01222465A JP 4897588 A JP4897588 A JP 4897588A JP 4897588 A JP4897588 A JP 4897588A JP H01222465 A JPH01222465 A JP H01222465A
- Authority
- JP
- Japan
- Prior art keywords
- inner lead
- resin
- lead
- island
- tab
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 20
- 229910052751 metal Inorganic materials 0.000 claims abstract description 8
- 239000002184 metal Substances 0.000 claims abstract description 8
- 238000005530 etching Methods 0.000 abstract description 4
- 238000000034 method Methods 0.000 abstract description 4
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 abstract description 2
- 229910052709 silver Inorganic materials 0.000 abstract description 2
- 239000004332 silver Substances 0.000 abstract description 2
- 230000015572 biosynthetic process Effects 0.000 abstract 1
- 238000009877 rendering Methods 0.000 abstract 1
- 239000010409 thin film Substances 0.000 abstract 1
- 239000011347 resin Substances 0.000 description 8
- 229920005989 resin Polymers 0.000 description 8
- 238000007789 sealing Methods 0.000 description 7
- 230000006866 deterioration Effects 0.000 description 4
- 230000000694 effects Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000001934 delay Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は樹脂封止型半導体装置に関し、特に面実装型パ
ッケージである樹脂封止型半導体装置に関するものであ
る。DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention relates to a resin-sealed semiconductor device, and particularly to a resin-sealed semiconductor device that is a surface-mount package.
従来、樹脂封止型半導体装置においては、外部からの水
分に対する耐湿性劣化を防止するために内部リードを微
細化する方法がなされてきた。これは樹脂封止型半導体
装置における耐湿性劣化の原因となる水分の侵入経路の
内、特に重大な影響を持つ内部リードと樹脂界面の長さ
を大きくし、水分のパッケージ内部への到達を遅らせよ
うというものである。そのため、第３図に平面構造図と
して示したように樹脂封止部５内で内部リード４は曲折
して形成され、その終端から金属細線３を介してアイラ
ンドタブ２上の半導体素子１に電気的に接続されていた
。Conventionally, in resin-sealed semiconductor devices, a method has been used to miniaturize internal leads in order to prevent deterioration of moisture resistance against external moisture. This increases the length of the internal lead and resin interface, which has a particularly serious effect on the moisture intrusion routes that cause moisture resistance deterioration in resin-sealed semiconductor devices, and delays moisture from reaching the inside of the package. That's what it's like. Therefore, as shown in the plan view of FIG. 3, the internal leads 4 are bent inside the resin sealing part 5, and the terminals of the internal leads 4 are electrically connected to the semiconductor element 1 on the island tab 2 via the thin metal wires 3. was connected.
上述したような樹脂封止型半導体装置の耐湿性の劣化の
直接原因の一つは樹脂封止部の内部から外部へ延びるリ
ードによってパッケージ外部から内部へ熱が伝わり内部
リードの温度が上昇して内部リードと封止樹脂間の密着
性が劣化することにあった。また、上述した従来の手段
である内部リードの微細化は樹脂封止領域内での一本の
内部リード当りの占有面積が大きくなってしまうため、
小型パッケージや多数のリードを持つパッケージあるい
はパッケージに対して相対的に大きな半導体素子を搭載
しているような場合には適用できないという欠点があっ
た。One of the direct causes of deterioration in moisture resistance of resin-sealed semiconductor devices as described above is that heat is transferred from the outside of the package to the inside of the package by the leads extending from the inside of the resin-sealed part to the outside, raising the temperature of the internal leads. The adhesion between the internal leads and the sealing resin deteriorated. Furthermore, the miniaturization of internal leads, which is the conventional method described above, increases the area occupied by each internal lead within the resin sealing area.
This method has the disadvantage that it cannot be applied to small packages, packages with a large number of leads, or cases where a relatively large semiconductor element is mounted on the package.
本発明は広範な種類のパッケージにおいて耐湿性に秀れ
た樹脂封止型半導体装置を提供することを目的とする。An object of the present invention is to provide a resin-sealed semiconductor device with excellent moisture resistance in a wide variety of packages.
本発明による樹脂封止型半導体装置は、樹脂封止領域の
外縁部近傍の内部リードにおいて、少なくとも一部分の
断面積を他の部分より著しく減少させ、パッケージ外部
から内部への熱の伝播を制限することによって内部リー
ドと封止樹脂間の密着性の劣化を防止しパッケージ外部
からの水分の流入を阻止する構造を有する。In the resin-sealed semiconductor device according to the present invention, the cross-sectional area of at least a portion of the internal lead near the outer edge of the resin-sealed region is significantly reduced compared to other portions, thereby restricting the propagation of heat from the outside of the package to the inside. This structure prevents deterioration of the adhesion between the internal leads and the sealing resin and prevents moisture from entering from outside the package.
〔実施例〕
第１図を参照して本発明の一実施例による樹脂封止型半
導体装置を説明する。[Embodiment] A resin-sealed semiconductor device according to an embodiment of the present invention will be described with reference to FIG.
半導体素子１は銀ペーストなどによりアイランドタブ２
に固着されており金属細線３を介して内部リード４に電
気的に接続されている。この内部リード４は樹脂封止部
５の外縁部近傍でその板厚を減少させた部分７を持って
いる。尚、６は外部リードである。The semiconductor element 1 is attached to an island tab 2 using silver paste or the like.
and is electrically connected to an internal lead 4 via a thin metal wire 3. The internal lead 4 has a portion 7 near the outer edge of the resin sealing portion 5 where the thickness is reduced. Note that 6 is an external lead.
このような構造は、金属薄片でアイランドタブ２、内部
リード４および外部リード６を形成する際に全面エツチ
ングして各部を形成し、本発明による内部リード４の板
厚を薄く構成する部分７についてはハーフエツチングを
行なうことにより容易に実現できる。In this structure, each part is formed by etching the entire surface when forming the island tab 2, the inner lead 4, and the outer lead 6 using thin metal pieces, and the part 7 of the inner lead 4 according to the present invention is made thinner. can be easily realized by half-etching.
第２図を参照して本発明の第２の実施例を説明する。こ
の場合、内部リード４はその幅寸法を減少させた部分８
を樹脂封止領域５の外縁部近傍に持っており、さらに外
部リード６へと伸びている。A second embodiment of the present invention will be described with reference to FIG. In this case, the inner lead 4 has a reduced width portion 8.
is located near the outer edge of the resin-sealed region 5 and further extends to the external lead 6.
この実施例では、幅寸法のみの加工となるため、通常の
リードフレーム製造方法の範囲内で、工程を追加する事
なくリードフレーム用マスクパターンを手直しするだけ
で容易に実現できる。In this embodiment, since only the width dimension is processed, it can be easily realized within the range of normal lead frame manufacturing methods by simply modifying the lead frame mask pattern without adding any additional steps.
以上に説明したように本発明では、内部リードの樹脂封
止領域の外縁部近傍にその断面積を減少させた部分を設
ける事により、パッケージ外部から内部への熱伝導の主
経路である内部リードの熱伝導を制限し、これにより内
部リードの温度が上昇し内部リードと封止樹脂間の密着
性が著しく劣化するのを阻止でき、よって水分のパッケ
ージ内部への到達を防止し、耐湿性に優れた樹脂封止型
半導体装置を提供できる。As explained above, in the present invention, by providing a portion with a reduced cross-sectional area near the outer edge of the resin-sealed area of the internal lead, the internal lead, which is the main path of heat conduction from the outside to the inside of the package, is provided. This prevents the temperature of the internal leads from rising and the adhesion between the internal leads and the sealing resin to deteriorate significantly, thereby preventing moisture from reaching the inside of the package and improving moisture resistance. An excellent resin-sealed semiconductor device can be provided.
第１図は本発明の一実施例の縦断面図、第２図は本発明
の第２の実施例の平面構造図、第３図は従来の技術であ
る内部パターンの微細化の一実施例である。
１・・・・・・半導体素子、２・・・・・・アイランド
タブ、３・・・・・・金属細線、４・・・・・・内部リ
ード、５・・団・樹脂封止部、６・・・・・・外部リー
ド、７・旧・・内部リードの板厚を減少させた部分、８
・・・・・・内部リードの幅寸法を縮小させた部分。
代理人 弁理士 内 原 音
序 １ 回
第２回FIG. 1 is a vertical cross-sectional view of an embodiment of the present invention, FIG. 2 is a plan view of the structure of a second embodiment of the present invention, and FIG. 3 is an example of miniaturization of internal patterns using conventional technology. It is. DESCRIPTION OF SYMBOLS 1...Semiconductor element, 2...Island tab, 3...Metal thin wire, 4...Internal lead, 5...Group/resin sealing part, 6... External lead, 7. Old... Portion with reduced plate thickness of internal lead, 8
・・・・・・Part where the width dimension of the internal lead is reduced. Agent Patent Attorney Uchihara Onjo 1st 2nd session
Claims (1)
ブと、前記半導体素子と金属細線を介して電気的に接続
された内部リード部と、該半導体素子と該アイランドタ
ブと該金属細線と該内部リード部とを樹脂封止してなる
パッケージ部と、前記内部リード部から該パッケージ部
外へ延伸して設けられた外部リード部とを具備し、前記
内部リード部の少なくとも一部の断面積が他の内部リー
ド部の断面積よりも小さく形成されていることを特徴と
する半導体装置。A semiconductor element, an island tab on which the semiconductor element is mounted, an internal lead portion electrically connected to the semiconductor element via a thin metal wire, the semiconductor element, the island tab, the thin metal wire, and the inner lead portion. and an external lead portion extending from the internal lead portion to the outside of the package portion, the cross-sectional area of at least a portion of the internal lead portion being A semiconductor device characterized in that the cross-sectional area of an internal lead portion is smaller than that of an internal lead portion.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4897588A JPH01222465A (en) | 1988-03-01 | 1988-03-01 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4897588A JPH01222465A (en) | 1988-03-01 | 1988-03-01 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01222465A true JPH01222465A (en) | 1989-09-05 |
Family
ID=12818262
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4897588A Pending JPH01222465A (en) | 1988-03-01 | 1988-03-01 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01222465A (en) |
-
1988
- 1988-03-01 JP JP4897588A patent/JPH01222465A/en active Pending
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