JPH01221926A - Variable length code conversion method - Google Patents

Abstract

PURPOSE:To obtain a code with the minimum magnetization inversion interval (Tmin) of 1.33 time the on-going (2, 7) RLL code and double the MFM by selecting a code word limiting the number of run of '0' at the start and end of the code word and possible to be decoded uniquely. CONSTITUTION:The number of run of '0' of a binary code word string with the minimum data length (m)=1, the minimum code word length (n)=3, the number of code word length rmax=5, and connecting the code words after conversion with each other is (d, k)-limited to a value over 5 and less than 16. A condition usable as the code word in such variable length code is selected by three conditions: the condition to satisfy (d, k) limitation in one code word, the one to satisfy the (d, k) limitation even when the code words are connected with each other, and the one possible to discriminate the boundary of the code word correctly and to be decoded uniquely, and in addition to that, it is possible to obtain the code with the Tmin of 1.33 times the on-going (2, 7) RLL code and double the MFM by allocating the code word with a large number of '1's in the code words so as to decrease an average magnetization inversion interval, and to reduce waveform interference in digital recording with high density.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a variable length code conversion method applied to the transmission or recording of digital signals.

[Conventional technology]

Various code conversion methods have been developed for use in recording and reproducing digital signals on optical disks, magnetic disks, etc. as recording density increases. The following three considerations are particularly required as properties required for this code.

(1) Minimum magnetization reversal interval T s I m In order to be less susceptible to the band limitation of the recording and reproducing system, T ea I
It is desirable that m is large.

(2) Maximum magnetization reversal interval T m m I To obtain a self-clock function and extract clock information, it is desirable that T□8 be small.

(3) Detection window width Tw Represents the degree of margin against time axis fluctuations such as jitter of the reproduced signal and peak shift due to waveform interference, and is preferably large.

From (1) and (3), T1. , there is also an evaluation method that states that the larger xTW is, the better. .

When converting an m-bit data word into an n-bit code word, if the minimum value of the number of runs of "0" between "1" and "1" in the code word is d and the maximum value is k, then these is expressed as follows.

T−+−” (d + 1) T wTffi,,
= (k+1) TwTW = (m/n)T (T: 1-bit length of data word) Conventionally, various code conversion methods have been devised from the above viewpoint, and MFM, (2°7) is a typical one. An example is RLL. These are code conversion methods with the following values: Note that from now on, for convenience, it will be standardized and represented by T.

MFM T,,,,=1. OTm,, =2.
OTv=0. 5 Tffrill
xTW=0. 5(2,7)RLL T1. =1. 5 T, ,, =4
．． OTw=0.5T,,1. XTW
= 0.75 [Problem to be solved by the invention] However, as recording density increases, the minimum magnetization reversal interval T
A code conversion method with larger m1ns or Tml x Tw has become necessary.

[Means for solving problems]

In the present invention, the minimum data length m=1, the minimum code word length n=3, and the number of code word lengths rma. = 5, the minimum value d of the number of runs of “0” between “1” and “1” of the binary code string connecting the code words after conversion is d = 5, and the maximum value is = 16. is realized, T,, n=2.0, Tffi, x=5
．． It has the characteristic of 67, T, = 0.33.

〔Example〕

Embodiments of the present invention will be described below based on the drawings. The condition for being able to use it as a code word in a variable length code is n
FIG. 3 is a diagram showing a pattern of bit code words. In FIG. 1, (1) the (d, k) restriction is satisfied within one code word.

(2) Even if the codewords are connected, the (d, to') restriction is satisfied.

(3) Codeword boundaries can be correctly determined, and decoding can be performed at will.

Next, a method of constructing a code word that satisfies these conditions will be described. However, for convenience of explanation, the code word that satisfies (1) is (d,
k) Restricted codewords, codewords that satisfy (1) and (2) are valid codewords (1), (2).

(3) A codeword that satisfies all of the above is called a unique codeword.

D, T, Tang and L, R, Bahl, “Bl.
ock Codes for Class of Con
5trained No1seless Channel
ls ”Information and Control
According to OL, Vol. 17.1970, it has been proven that the number of code words N (n) of a (d, ni') restricted code having a length of n bits can be determined by the following equation.

N(n)=n+1 (1≦n≦d+1)N(n
)=N (n-1)+N (n-d-1)(d+1
<n=k) N (n) = (d + k + 1- n)
+N(n-i-1) (k<n≦d+k) N(n)=N (n-i-1) (n>d+k
) However, N(n)=O(n<0) N(0)=1.

As a result, the total number of n-bit (d, k) restricted code patterns shown in FIG. 1 can be calculated.

In addition, in order to satisfy condition (2), the length of L block is p
, the length q of the R block should satisfy the following equation.

dO≦p≦kO d1≦q≦k1 (do +dl =dSko -1'-kl =k) In the effective codewords constructed in this way, the (d, k) restriction can be violated even if the codewords are connected to each other. There isn't.

This n-bit effective code word is d O, d 1 . k O
, k 1 are given appropriately, and the R block and L block are obtained by selecting codewords that satisfy this condition from the (d, k) restricted codes.

Next, a unique code word selection agent will be explained. Second
As shown in the figure, if the 2n-bit code word A and the n-bit code words B and C connected are equal, decoding becomes impossible. Therefore, such codeword A is not a unique codeword.

In general, an rn-bit unique codeword is obtained by removing from the rn-bit effective codeword an rn-bit effective codeword obtained by concatenating unique codewords smaller than rn bits.

Assuming that the number of effective codewords of rn bits is Nr and the number of unique codewords is Vr, when r=1, all effective codewords are unique codewords. The number of code words is Vl = N1. When r = 2, the number of code words is V2 = N2-VI

The number of code words is V3=N3-(V1'+V1 xV2'+V2 xV
1') The same applies to the case of r=4.

For the cases of dO=0, d1=5, kO=2, and kl=14, the code words obtained in this way are shown in Table 1, and the number of code words is shown in Table 2.

Table 1 Table 2 Next, data words are assigned to the code words obtained in this way.

When r=1, since the data word is 1 bit, the number of required 3-bit unique code words (hereinafter referred to as the required number of words) is two. However, as shown in Table 2, there is no unique codeword, so two codewords are missing.

If r=2, the 2 not allocated at r=1
Four 2-bit data words created by adding 1 bit after the data words "0" and "1" are assigned to a unique 6-bit code word, but since there is only one, 3
There is a shortage of pieces.

Similarly, in the case of r=3, six 3-bit data words obtained by adding one bit after the three data words that were not allocated in r=2 are allocated to a 9-bit unique code word. There are only 3 pieces, so 3 pieces are missing.

Repeating the same procedure for r=4 or more, r=5
In this case, the required number of words is 6, but the number of code words is 6, and all data words can be allocated. The words in parentheses in Table 1 are examples of assigned data words. In this case, the number of required words and the number of unique codewords will be equal, but when the number of codewords increases, the average magnetization reversal interval will be small. .

FIG. 4 is a diagram showing an example of an encoding circuit for realizing an embodiment of the present invention. The input data bit string is taken into a 5-bit shift register and sent to a latch circuit. Furthermore, these 5 bits are sent to a code conversion circuit.

In the code conversion circuit, among the 5 bits, r (1≦
r≦5) When the bit is equal to any of the r-bit data words in Table 1, the corresponding code word is sent to the parallel-to-serial conversion circuit. The serially converted code word is sent to the NRZ I modulation circuit and subjected to NRZ I modulation. Further data strings are loaded into the shift register by the number of bits in the matched data bit string, and the same process is repeated.

FIG. 5 shows an example of a decoding circuit for decoding the signal encoded by the encoding circuit of FIG. 4. The input code word bit string is taken into a 15-bit shift register and sent to a latch circuit. Furthermore, this one
The 5 bits are sent to the sign inversion circuit. In the code inversion circuit, when 3r (1≦r≦5) bits from the beginning among the 15 bits are equal to any of the 3r-bit code words in Table 1, the corresponding data word is sent to the parallel-to-serial conversion circuit. . However, in this case, matching is performed with priority given to the code word with the longest length. That is, first it is checked whether it is a 15-bit codeword, then it is checked whether it is a 12-bit codeword, and finally it is checked whether it is a 3-bit codeword. If it is equal to any of the code words in Table 1, the corresponding data word is sent to the parallel-to-serial conversion circuit. As many as the number of bits of the matched codeword,
Furthermore, the code word bit string is taken into the shift register and the same process is repeated.

[Other Examples]

Code words can also be constructed using r msm ” 5 for the following parameters. All of these have the same characteristics.

(a) dQ = o, dl = 5, kO = 9, kl =
7(b) dO = 1, dl = 4, kO = 3, k
l = 43 (c) dO = 1, dl = 4, kO = 10, k
l = 6(d) dO = 2, dl = 3, kO = 4,
kl=12(e)dO=2, dl=3, ko=11,
kl = 5(f) dO = 3, dl = 2, kO =
5, kl = 11 (g) dO = 3, dl = 2, ko =
12, kl = 4(h) dO = 4, dl = 1
, kO=6, kl=10(i) dO=4, dl
= 1, kO = 13, kl = 3 (D do = 5
, dl = 0, kO = 7, kl = 9(k)d
O = 5, dl = 0, kO = 14, kl = 2 [Effects of the Invention] As explained above, the variable length code conversion method of the present invention limits the number of runs of "0" at the start and end of a code word. death,
Moreover, by selecting a code word that can be decoded at will, a code with T m I I+ 1.33 times larger than that of the conventional (2,7) RLL code and twice larger than that of MFM was obtained. Therefore, waveform interference can be reduced in high-density digital recording or high-speed transmission, and the practical effect is very high.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing a pattern of an n-bit code word. FIG. 2 is a diagram illustrating code words that cannot be uniquely decoded. Figure 3 (a
) and (b) are diagrams explaining non-unique codewords. Fourth
The figure shows an example of a block diagram of an encoding circuit. FIG. 5 is a diagram showing an example of a block diagram of a decoding circuit.

Claims (2)

[Claims] (1) When the minimum data word length is 1 bit and the minimum code word length is 3 bits, a variable length code that converts an r-bit data word into a 3r-bit code word for r where 1≦r≦5 In the conversion method, “0” between “1” and “1” of the binary code bit string generated by the connection of code words after conversion
In order to limit the number of runs in 5 to 16, d0, d
1, k0, and k1 are non-negative integers that satisfy d0+d1=5 and k0+k1=16, then "
0” run number p is d0≦p≦k0, “0” at the end
A variable length code conversion method characterized in that the number of runs q of is limited to d1≦q≦k1. (2) The variable-length code conversion method according to claim 1, characterized in that the codewords are assigned to the data words with priority in descending order of the number of runs of "1".