JPH0122113B2 - - Google Patents
Info
- Publication number
- JPH0122113B2 JPH0122113B2 JP56035182A JP3518281A JPH0122113B2 JP H0122113 B2 JPH0122113 B2 JP H0122113B2 JP 56035182 A JP56035182 A JP 56035182A JP 3518281 A JP3518281 A JP 3518281A JP H0122113 B2 JPH0122113 B2 JP H0122113B2
- Authority
- JP
- Japan
- Prior art keywords
- polishing
- semiconductor wafer
- abrasive
- cloth
- sided
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000005498 polishing Methods 0.000 claims description 44
- 235000012431 wafers Nutrition 0.000 claims description 33
- 239000004065 semiconductor Substances 0.000 claims description 31
- 239000004744 fabric Substances 0.000 claims description 19
- 238000000034 method Methods 0.000 claims description 5
- 230000006378 damage Effects 0.000 description 6
- 239000006061 abrasive grain Substances 0.000 description 5
- 238000007517 polishing process Methods 0.000 description 4
- 238000011109 contamination Methods 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 239000000843 powder Substances 0.000 description 3
- JOYRKODLDBILNP-UHFFFAOYSA-N Ethyl urethane Chemical compound CCOC(N)=O JOYRKODLDBILNP-UHFFFAOYSA-N 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 2
- 230000001070 adhesive effect Effects 0.000 description 2
- 238000002347 injection Methods 0.000 description 2
- 239000007924 injection Substances 0.000 description 2
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 239000003082 abrasive agent Substances 0.000 description 1
- 239000012670 alkaline solution Substances 0.000 description 1
- 239000008119 colloidal silica Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000006837 decompression Effects 0.000 description 1
- 238000005187 foaming Methods 0.000 description 1
- 239000002649 leather substitute Substances 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000004745 nonwoven fabric Substances 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 229920000728 polyester Polymers 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 230000000452 restraining effect Effects 0.000 description 1
- 230000003746 surface roughness Effects 0.000 description 1
Classifications
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B24—GRINDING; POLISHING
- B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
- B24B37/00—Lapping machines or devices; Accessories
- B24B37/04—Lapping machines or devices; Accessories designed for working plane surfaces
Description
【発明の詳細な説明】
この発明は半導体ウエハの研摩方法に係り、特
に半導体ウエハに対する鏡面仕上研摩方法の改良
に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for polishing semiconductor wafers, and more particularly to an improvement in a method for polishing semiconductor wafers to a mirror finish.
半導体素子がICからLSI、VLSIへ発展するに
伴なつて益々加工パターンの微細度が向上すると
ともに電気的特性に対する要望もきびしくなりつ
つある。叙上の事情から半導体ウエハに対する仕
上も高度に要求されるようになり、従来の鏡面仕
上の程度では満足できず、さらに平行度、平面
度、表面のあらさ、くもりの程度を向上にする必
要に迫られている。 As semiconductor devices evolve from ICs to LSIs and VLSIs, the fineness of processed patterns is becoming increasingly finer and demands on electrical characteristics are becoming more stringent. Due to the above-mentioned circumstances, the finishing of semiconductor wafers has become highly demanding, and the conventional mirror finish is no longer satisfactory, and there is a need to further improve parallelism, flatness, surface roughness, and cloudiness. I'm under pressure.
従来、半導体ウエハに対する鏡面仕上研摩は両
面研摩装置で行なわれていた。すなわち、第１図
および第２図によつて示されるように、半導体ウ
エハ１，１′…をキヤリヤ２によつて支持させ、
上面に硬質研摩布３ａを貼着した載置プレート４
ａと、下面に硬質研摩布３ｂを貼着した抑えプレ
ート４ｂとの間に挾み、上記両プレート４ａ，４
ｂは互いに逆方向に回転するようになつている。
また、前記キヤリヤ２は外周にギアを備え、載置
プレート４ａの中央に設けられた太陽ギア５およ
び載置プレートの外側に設けられたインタナル・
ギア６の各ギアと噛合つており、例えばインタナ
ル・ギアを回転させることによつて半導体ウエハ
に自転を伴なう公転をさせる。次に抑えプレート
４ｂの上面にはほぼ半導体ウエハの上方に円周に
沿う溝７が設けられ、この溝から抑えプレートを
貫通して半導体ウエハ上に至る複数個の研摩剤注
入孔８，８′…が設けられている。なお、研摩剤
１０には例えばコロイダルシリカ研摩剤が用いら
れ、上記溝７の上方に設置された研摩剤滴下ノズ
ル９，９′…から滴下され、研摩剤注入孔を経て
半導体ウエハの研摩面に到達するようになつてい
る。 Conventionally, mirror finish polishing of semiconductor wafers has been performed using a double-sided polishing machine. That is, as shown in FIGS. 1 and 2, semiconductor wafers 1, 1'... are supported by a carrier 2,
Mounting plate 4 with hard abrasive cloth 3a attached to the top surface
a and a restraining plate 4b having a hard abrasive cloth 3b attached to the lower surface thereof, and both of the plates 4a, 4
b are adapted to rotate in opposite directions.
The carrier 2 also has gears on its outer periphery, including a sun gear 5 provided in the center of the mounting plate 4a and an internal gear provided on the outside of the mounting plate 4a.
It is meshed with each gear of the gear 6, and by rotating the internal gear, for example, the semiconductor wafer is caused to revolve along with rotation. Next, a circumferential groove 7 is provided on the upper surface of the holding plate 4b almost above the semiconductor wafer, and a plurality of abrasive injection holes 8, 8' extend from this groove through the holding plate and onto the semiconductor wafer. ...is provided. The abrasive 10 is, for example, a colloidal silica abrasive, which is dropped from abrasive drop nozzles 9, 9', etc. installed above the groove 7, and is applied to the polished surface of the semiconductor wafer through an abrasive injection hole. I'm starting to reach it.
上述の両面研摩装置による研摩状態では最近の
半導体ウエハに対する要求に対し不充分であるこ
とはすでに述べた通りであり、さらに良好な形状
と鏡面に仕上げるには軟質の研摩布と極微細粉末
砥粒とを用いて研摩を施す必要がある。しかし、
両面研摩は、片面研摩に較べ半導体ウエハを支持
するのに接着剤を用いないので、片面研摩が半導
体ウエハを基台に固着するための手間を要するこ
と、半導体ウエハが接着剤で汚染されること、研
摩後の取外しによる汚染、損傷が起り易いことな
どの欠点があるのに反し、これらの欠点が皆無で
ある長所があるが、上記の要請に応えるために研
摩布を軟質研摩布に、また研摩剤を極微細粉末砥
粒に夫々変えると半導体ウエハとの間の摩擦抵抗
が大きくなる。そして、自由な状態でキヤリア中
に保たれている半導体ウエハは、この摩擦抵抗に
抗しきれずキヤリアよりはみ出してしまい、研摩
中に半導体ウエハが破壊してしまうなどの事故が
発生する。さらに上記半導体ウエハの破壊によつ
て研摩板やキヤリアの破損を招くので、製造工程
に多大の損害となる欠点がある。 As already mentioned, the polishing conditions by the above-mentioned double-sided polishing device are insufficient to meet the recent demands for semiconductor wafers, and in order to achieve a better shape and mirror finish, a soft polishing cloth and ultra-fine powder abrasive grains are required. It is necessary to perform polishing using but,
Compared to single-sided polishing, double-sided polishing does not use adhesive to support the semiconductor wafer, so single-sided polishing requires more effort to secure the semiconductor wafer to the base, and the semiconductor wafer may be contaminated with adhesive. However, it has the advantage of not having any of these drawbacks, such as contamination and damage caused by removal after polishing. If the abrasive is changed to ultrafine powder abrasive grains, the frictional resistance between the abrasive and the semiconductor wafer will increase. The semiconductor wafer, which is held in a free state in the carrier, cannot resist this frictional resistance and protrudes from the carrier, causing accidents such as destruction of the semiconductor wafer during polishing. Furthermore, the destruction of the semiconductor wafer causes damage to the polishing plate and carrier, resulting in considerable damage to the manufacturing process.
この発明は上記従来の欠点を改良するためにな
されたもので、半導体ウエハの鏡面仕上研摩を第
１次と第２次とに分けて施し、第１次研摩工程は
研摩布に研摩剤を注いだ研摩面を有する両面研摩
装置によつて、第２次研摩工程は第１次研摩に用
いられた研摩布よりも軟質の研摩布に極微細砥粒
を含む研摩剤を注いだ研摩面に半導体ウエハを減
圧にて吸着保持させて摺接研摩を施す片面研摩装
置によつて施すことを特徴とする。 This invention was made to improve the above-mentioned conventional drawbacks, and the mirror finish polishing of semiconductor wafers is divided into a first and a second polishing process, and the first polishing process involves pouring an abrasive onto a polishing cloth. In the second polishing process, an abrasive containing ultrafine abrasive grains is poured onto a polishing cloth that is softer than the polishing cloth used in the first polishing process. It is characterized in that it is performed by a single-sided polishing device that performs sliding polishing by suctioning and holding the wafer under reduced pressure.
以下にこの発明を１実施例につき図面を参照し
て詳細に説明する。まず、この１実施例にかかる
方法の第１次研摩工程は叙上の従来の方法とほと
んど変らないので説明を省略する。なお、硬質研
摩布３ｂにはウレタン含浸ポリエステル不織布の
スーバ（商品名）を用いて好適したが、これに
限られるものでなく、摩擦抵抗が小さくて高速研
摩を行なえるものであれば、ウレタンを発泡させ
て形成した研摩布のようなものでもよい。次に第
３図に示される片面研摩装置によつて第２次研摩
を施す。図において、１１は回転基台で上面に軟
質研摩布１２が貼着されている。この軟質研摩布
は例えばウレタンで毛羽立たせた人造皮革でポリ
テツクス・シユープリーム（商品名）を用いて適
した。次に１３は極微細砥粒を含む研摩剤２０、
を上記軟質研摩布１２上に滴下し含浸させる研摩
剤滴下ノズルである。この滴下ノズルから滴下さ
れる上記の研摩剤は、滴下ノズルよりも上方に配
置された研摩剤タンクから流量調節用コツクを中
途に備えた導管（図示省略）によつて供給され
る。また、上記研摩剤２０は粒径が10ミリミクロ
ン以下のSiO2粉末を含むアルカリ性溶液によつ
て構成されたものである。次に、１４はワツクス
レスの半導体ウエハ保持治具で、半導体ウエハ１
を板状の弾性部材１４ａを介し減圧導路１４ｂで
吸引保持するとともに低速で回転する。なお、上
記軟質研摩布としてはフエルト、スエードのよう
なものでもよい。 Hereinafter, one embodiment of the present invention will be explained in detail with reference to the drawings. First, the first polishing step of the method according to this embodiment is almost the same as the conventional method described above, so the explanation will be omitted. Although Suba (trade name), a urethane-impregnated polyester nonwoven fabric, is preferably used as the hard abrasive cloth 3b, the material is not limited to this, and urethane may be used as long as it has low frictional resistance and can perform high-speed polishing. It may also be something like an abrasive cloth formed by foaming. Next, secondary polishing is performed using a single-sided polishing apparatus shown in FIG. In the figure, reference numeral 11 denotes a rotating base, and a soft abrasive cloth 12 is adhered to the upper surface thereof. This soft abrasive cloth is, for example, artificial leather fluffed with urethane and is suitable for use with Polytex Supreme (trade name). Next, 13 is an abrasive 20 containing ultrafine abrasive grains,
This is an abrasive dropping nozzle that drips and impregnates the soft abrasive cloth 12 onto the soft abrasive cloth 12. The above-mentioned abrasive dripped from this dripping nozzle is supplied from an abrasive tank disposed above the dripping nozzle through a conduit (not shown) equipped with a flow rate adjustment pot in the middle. The abrasive 20 is made of an alkaline solution containing SiO 2 powder with a particle size of 10 millimicrons or less. Next, 14 is a waxless semiconductor wafer holding jig, which holds the semiconductor wafer 1.
is suctioned and held in the vacuum conduit 14b via the plate-shaped elastic member 14a, and rotates at a low speed. The soft abrasive cloth may be made of felt or suede.
この発明の方法によれば、ICはもとよりLSI、
VLSIなどの製造に適するウエハに研摩仕上げす
ることができる。すなわち、両面研摩による第１
次研摩に引続き施される第２次研摩の片面研摩に
おいても半導体ウエハを固定するためにワツクス
を用いないので、このワツクスによる汚染や除去
のための汚染、ワツクス固定のための取着と研摩
後の除去のための工程増加、前記工程に伴なう破
損の増加等を生ずることなく上記LSI等の製造に
満足できる鏡面仕上となる。また、第２次研摩に
よる除去量は高々1μｍであるので、第１次研摩
で得られたウエハの平行度、平面度の精度を低下
させることもない利点がある。 According to the method of this invention, not only IC but also LSI,
It is possible to polish and finish wafers suitable for manufacturing VLSI and other devices. In other words, the first
Wax is not used to fix the semiconductor wafer in the single-sided polishing of the second polishing that is performed after the next polishing, so there is no contamination caused by this wax, contamination for removal, attachment for wax fixation, and post-polishing. A mirror finish that is satisfactory for manufacturing the above-mentioned LSI etc. can be obtained without increasing the number of steps for removing , or increasing damage caused by the step. Further, since the amount removed by the second polishing is at most 1 μm, there is an advantage that the accuracy of the parallelism and flatness of the wafer obtained by the first polishing is not reduced.
第１図および第２図は両面研摩装置に関し第１
図は断面図、第２図は第１図のAA′線に沿う平面
における上面図、第３図はこの発明の１実施例の
一部に用いられる片面研摩装置の断面図である。
１，１′……半導体ウエハ、２……キヤリア、
３ａ，３ｂ……硬質研摩布、４ａ……載置プレー
ト、４ｂ……抑えプレート、５……太陽ギア、
８，８′……研摩剤注入口、１０……研摩剤、９，
９′…，１３……研摩剤滴下ノズル、１１……回
転基台、１２……軟質研摩布、１４……半導体ウ
エハ保持治具、１４ａ……半導体ウエハ保持治具
の弾性部材、１４ｂ……半導体ウエハ保持治具の
減圧導路、２０……極微細砥粒を含む研摩剤。
Figures 1 and 2 show the first part of the double-sided polishing device.
The figure is a sectional view, FIG. 2 is a top view taken along the line AA' in FIG. 1, and FIG. 3 is a sectional view of a single-sided polishing apparatus used in a part of an embodiment of the present invention. 1, 1'...Semiconductor wafer, 2...Carrier,
3a, 3b...hard abrasive cloth, 4a...mounting plate, 4b...pressing plate, 5...sun gear,
8,8'... Abrasive inlet, 10... Abrasive, 9,
9'..., 13... Abrasive dropping nozzle, 11... Rotating base, 12... Soft abrasive cloth, 14... Semiconductor wafer holding jig, 14a... Elastic member of semiconductor wafer holding jig, 14b... Decompression guide path of semiconductor wafer holding jig, 20... Abrasive agent containing ultrafine abrasive grains.
Claims (1)
置の研摩面を研摩布に研摩剤を注いで形成し第１
次研摩を施す工程と、前記工程により半導体ウエ
ハの主面に残留する微少なくもりを除去するため
に前記第１次研摩後の半導体ウエハの一方の主面
を減圧により吸着支持し前記研摩布よりも軟質の
研摩布に研摩剤を注いだ研摩面を有する片面研摩
装置により半導体ウエハの他の主面を摺接させて
第２次研摩を施す工程とからなることを特徴とす
る半導体ウエハの研摩方法。1 Mirror finish polishing of semiconductor wafers is performed by pouring abrasive onto a polishing cloth to form the polished surface of a double-sided polishing device.
A second polishing step, and a step of suctioning and supporting one main surface of the semiconductor wafer after the first polishing by vacuum to remove minute clouds remaining on the main surface of the semiconductor wafer due to the above step, and removing the polishing cloth from the polishing cloth. The polishing of a semiconductor wafer is characterized by comprising the step of performing secondary polishing by slidingly contacting the other main surface of the semiconductor wafer with a single-sided polishing device having a polishing surface made by pouring an abrasive onto a soft polishing cloth. Method.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56035182A JPS57149154A (en) | 1981-03-13 | 1981-03-13 | Method of polishing semiconductor wafer |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56035182A JPS57149154A (en) | 1981-03-13 | 1981-03-13 | Method of polishing semiconductor wafer |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS57149154A JPS57149154A (en) | 1982-09-14 |
| JPH0122113B2 true JPH0122113B2 (en) | 1989-04-25 |
Family
ID=12434702
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP56035182A Granted JPS57149154A (en) | 1981-03-13 | 1981-03-13 | Method of polishing semiconductor wafer |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS57149154A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0788146A1 (en) | 1996-01-31 | 1997-08-06 | Shin-Etsu Handotai Company Limited | Method of polishing semiconductor wafers |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4918870A (en) * | 1986-05-16 | 1990-04-24 | Siltec Corporation | Floating subcarriers for wafer polishing apparatus |
| TW199948B (en) * | 1991-12-19 | 1993-02-11 | Dsc Comm Corp |
-
1981
- 1981-03-13 JP JP56035182A patent/JPS57149154A/en active Granted
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0788146A1 (en) | 1996-01-31 | 1997-08-06 | Shin-Etsu Handotai Company Limited | Method of polishing semiconductor wafers |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS57149154A (en) | 1982-09-14 |
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