JPH01220304A - Substrate with conductive thin film and its manufacture - Google Patents
Substrate with conductive thin film and its manufactureInfo
- Publication number
- JPH01220304A JPH01220304A JP4515988A JP4515988A JPH01220304A JP H01220304 A JPH01220304 A JP H01220304A JP 4515988 A JP4515988 A JP 4515988A JP 4515988 A JP4515988 A JP 4515988A JP H01220304 A JPH01220304 A JP H01220304A
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- thin film
- conductive thin
- film
- resist
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 67
- 239000010409 thin film Substances 0.000 title claims abstract description 66
- 238000004519 manufacturing process Methods 0.000 title claims description 6
- 239000010408 film Substances 0.000 claims abstract description 51
- 238000000034 method Methods 0.000 claims abstract description 9
- 238000004528 spin coating Methods 0.000 claims description 11
- 238000000151 deposition Methods 0.000 claims description 5
- 238000000059 patterning Methods 0.000 claims description 3
- 239000011521 glass Substances 0.000 abstract description 5
- 230000002093 peripheral effect Effects 0.000 abstract description 4
- 229920002120 photoresistant polymer Polymers 0.000 abstract description 4
- 238000004544 sputter deposition Methods 0.000 abstract description 4
- 239000007788 liquid Substances 0.000 abstract 1
- 238000001035 drying Methods 0.000 description 6
- KFZMGEQAYNKOFK-UHFFFAOYSA-N Isopropanol Chemical compound CC(C)O KFZMGEQAYNKOFK-UHFFFAOYSA-N 0.000 description 3
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 description 2
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000000243 solution Substances 0.000 description 2
- XOLBLPGZBRYERU-UHFFFAOYSA-N tin dioxide Chemical compound O=[Sn]=O XOLBLPGZBRYERU-UHFFFAOYSA-N 0.000 description 2
- 229910001887 tin oxide Inorganic materials 0.000 description 2
- 229910021578 Iron(III) chloride Inorganic materials 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 239000007864 aqueous solution Substances 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000010894 electron beam technology Methods 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 229910003437 indium oxide Inorganic materials 0.000 description 1
- PJXISJQVUVHSOJ-UHFFFAOYSA-N indium(iii) oxide Chemical compound [O-2].[O-2].[O-2].[In+3].[In+3] PJXISJQVUVHSOJ-UHFFFAOYSA-N 0.000 description 1
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 1
- RBTARNINKXHZNM-UHFFFAOYSA-K iron trichloride Chemical compound Cl[Fe](Cl)Cl RBTARNINKXHZNM-UHFFFAOYSA-K 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229920000609 methyl cellulose Polymers 0.000 description 1
- 239000001923 methylcellulose Substances 0.000 description 1
- 235000010981 methylcellulose Nutrition 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 238000007738 vacuum evaporation Methods 0.000 description 1
Landscapes
- Non-Insulated Conductors (AREA)
- Manufacturing Of Electric Cables (AREA)
- Liquid Crystal (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、薄１ｔ！ＩＥＬパネル、プラズマディスブー
パネル及び液晶デイスプレーパネル等に利用される、′
４Ｔｉ性ｉｆ付き基板に関するものである。[Detailed Description of the Invention] [Industrial Field of Application] The present invention is thin! Used in IEL panels, plasma display panels, LCD display panels, etc.'
The present invention relates to a 4Ti substrate with IF.
（従来の技術〕
従来、この種の導電性薄膜付き基板１としては、第３図
（断面図）に示すものがあ′つた。すなわち、例えば１
４”×１４”角の主表面を有するガラス基板２の一方の
主表面全面に真空蒸着法又はスパッタリング法等により
、インジウム ティン オキサイド（以下ｒｌＴＯＪと
いう。）からなる透明導電性基膜３を被着したものであ
る。(Prior Art) Conventionally, as this type of substrate 1 with a conductive thin film, there has been one shown in FIG. 3 (cross-sectional view).
A transparent conductive base film 3 made of indium tin oxide (hereinafter referred to as ``rlTOJ'') is deposited on the entire surface of one main surface of a glass substrate 2 having a 4" x 14" square main surface by vacuum evaporation, sputtering, or the like. This is what I did.
しかしながら従来の導電性薄膜付き基板１では以下のよ
うな問題点があった。However, the conventional substrate 1 with a conductive thin film has the following problems.
すなわち、基板２の主表面全面上に、導電性薄膜３を被
着していること、換言すれば基板２の外周縁と導電性薄
膜３の外周縁とが一致していることから、導電性薄膜３
を所望のパターンにパターン化したとき、基板２の主表
面外周縁近傍に枠状のｍｌ性薄膜パターンが残存してし
まい種々の問題点を生ずる。このことを第３図〜第４図
に基づき説明する。なお、第３図及び第４図は平面図で
ある。先ず、第３図に示すように、導電性薄膜付き基板
１の導電性薄膜３上に、一般にレジスト膜厚の均一性が
優れているといわれているスピンコート法によりポジ型
レジスト膜４（膜厚：１μｍ）を形成する。しかしなが
ら、このスピンコート法でも、基板２が大きくなると、
基板２の自重が大きくなり（最大で２．５Ｋｇ＞、その
ため基板２の回転速度を２０００ｒｐｍ以下にしなくて
はスピンコータのモータが破壊する問題点がある。その
ため、２０００ ｒ ｐＩＩｌ以下でレジスト膜４を形
成すると、第３図に示すように、基板２の外周縁から２
〜５＃ｌ５１（Ｌｌ）内側に、幅Ｌ２が約０．５＃ａで
、高さＨがレジスト膜４の厚さと同様又は２倍程度（例
えば１μｌｌ１）である凸状レジスト部分４ａがレジス
トの表面張力により枠状に形成されてしまう。そして、
このようなレジスト膜４を、通常の露光量（例えば２０
０ｍＪ ／ ａｉ ）で全面露光、現像及び導電性薄膜
３をエツチングすると、第４図に示すように凸状レジス
ト部分４ａの下部に位置する導電性薄膜５のところのみ
がエツチングされず残存してしまう。このことから生ず
る問題点をさらに第５図に基づき説明する。第５図にお
いて、−点鎖線Ａ内が所望のパターンを形成する領域Ｘ
で二点鎖線［３，０で囲まれた領域Ｙが、前述した凸状
レジスト部分４ａにより形成された残存導電性薄膜パタ
ーン５が残存する領域である。この所望パターン領域Ｘ
は、近年基板２の外周縁より内側に２〜３ｍ＋＋（Ｌ３
）内側に入ったところまで広がってきており、そのため
、所望パターン領域Ｘの内側に残存導電性薄膜パターン
５が残存する領域Ｙが入ってきてしまう。したがって、
所望パターン領域Ｘ内に、導電性薄膜３からなる、線状
の所望パターン６を残存して形成しても、その一部６ａ
（例えば、薄膜ＥＬパネルのときは、外部電極取り付は
用配線パターンとなるもの。）が、枠状の残存導電性薄
膜パターン５と連結してしまい、前述したような薄Ｆ３
Ｅ Ｌパネルのときは、所望パターン６の一部６ａは
個々に独立しなくなってしまい、ショートとなってしま
う。また、たとえ、残存導電性薄膜パターン５が残存す
る領域Ｙが、所望パターン領域Ｘの外側であっても、残
存導電性薄膜パターン５が基板２の外周縁近傍に存在す
ることにより、ソケットなどの外部［１ｉと接触する可
能性がある。That is, since the conductive thin film 3 is deposited on the entire main surface of the substrate 2, in other words, the outer periphery of the substrate 2 and the outer periphery of the conductive thin film 3 are aligned, so that the conductive thin film 3
When patterned into a desired pattern, a frame-shaped ML thin film pattern remains near the outer periphery of the main surface of the substrate 2, causing various problems. This will be explained based on FIGS. 3 and 4. Note that FIGS. 3 and 4 are plan views. First, as shown in FIG. 3, a positive resist film 4 (film) is deposited on the conductive thin film 3 of the conductive thin film-coated substrate 1 by spin coating, which is generally said to have excellent uniformity in resist film thickness. Thickness: 1 μm). However, even with this spin coating method, if the substrate 2 becomes large,
The weight of the substrate 2 becomes large (maximum 2.5 kg>), so there is a problem that the spin coater motor will break if the rotation speed of the substrate 2 is not lower than 2000 rpm.Therefore, the resist film 4 is When formed, as shown in FIG.
~5#l51 (Ll) Inside, there is a convex resist portion 4a with a width L2 of about 0.5#a and a height H of the resist film 4, which is the same as or about twice the thickness (for example, 1μll1). It is formed into a frame shape due to surface tension. and,
Such a resist film 4 is coated with a normal exposure amount (for example, 20
When the entire surface is exposed, developed and the conductive thin film 3 is etched at 0 mJ/ai), only the portion of the conductive thin film 5 located below the convex resist portion 4a remains unetched, as shown in FIG. . The problems arising from this will be further explained based on FIG. 5. In FIG. 5, the area within the - dotted chain line A is the area X where the desired pattern is formed.
The region Y surrounded by the two-dot chain line [3,0 is the region where the residual conductive thin film pattern 5 formed by the above-mentioned convex resist portion 4a remains. This desired pattern area
In recent years, 2 to 3 m++ (L3
) has spread to the inside, and as a result, the region Y where the residual conductive thin film pattern 5 remains comes inside the desired pattern region X. therefore,
Even if the linear desired pattern 6 made of the conductive thin film 3 remains in the desired pattern region X, a portion 6a of it remains.
(For example, in the case of a thin film EL panel, the external electrode attachment is used as a wiring pattern.) is connected to the frame-shaped residual conductive thin film pattern 5, and the thin F3
In the case of an EL panel, the portions 6a of the desired pattern 6 are no longer independent, resulting in a short circuit. Furthermore, even if the region Y where the residual conductive thin film pattern 5 remains is outside the desired pattern region There is a possibility of contact with the outside [1i.
なお、残存する領域Ｙが所望パターン領域Ｘの外側であ
るとき、前述した凸状レジスト部分４ａを除去する方法
としては、アセトン等により除去する方法が考えられる
が、これによっても清浄に凸状レジスト部分４ａを除去
することは困難であり、かつ所望パターン領域Ｘ上のレ
ジスト膜４も除去してしまう恐れがある。Note that when the remaining region Y is outside the desired pattern region It is difficult to remove the portion 4a, and there is a risk that the resist film 4 on the desired pattern region X will also be removed.
したがって、本発明の目的は、基板上に、例えばショー
トの原因となる不用の導電性λり膜パターンを基板の外
周縁近傍に残存させない導電性薄膜付き基板とその￥Ｊ
”？１方法を提供することである。SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a substrate with a conductive thin film that does not leave unnecessary conductive λ film patterns on the substrate near the outer periphery of the substrate, which may cause short circuits, for example.
``?1 method is to be provided.
前述した目的を達成するために、本発明は基板と、該基
板の一主表面上に被着された導電性薄膜とを備えた導電
性Ｆｔ９膜付き基板において、前記導電性Ｉ膜をパター
ン化するとき前記導電性薄膜上に塗布するレジスト膜の
前記基板外周縁近傍に存する所定の凸状レジスト部分よ
り内側に前記２９電性薄膜を被着してなる導電性薄膜付
き基板であり、また、基板と、該基板の一主表面上に被
着された導電性薄膜とを備えた導電性薄膜付き基板の製
造方法において、前記導電性薄膜をパターン化するとき
前記導電性薄膜上にレジスト膜を塗布するスピンコート
法の条件により、前記レジスト膜の前記基板外周縁近傍
に存する所定の凸状レジスト部分の位置を予め判定し、
次に前記凸状レジスト部分の内側の前記基板表面上に前
記導電性薄膜を被着する１ｆｆｌ性薄股付き基板の製造
方法である。In order to achieve the above object, the present invention provides a substrate with a conductive Ft9 film comprising a substrate and a conductive thin film deposited on one main surface of the substrate, in which the conductive I film is patterned. A substrate with a conductive thin film is formed by depositing the conductive thin film on the inner side of a predetermined convex resist portion near the outer periphery of the substrate of a resist film coated on the conductive thin film, and In a method for manufacturing a substrate with a conductive thin film comprising a substrate and a conductive thin film deposited on one main surface of the substrate, a resist film is formed on the conductive thin film when patterning the conductive thin film. Determining in advance the position of a predetermined convex resist portion of the resist film near the outer peripheral edge of the substrate according to the conditions of the spin coating method for coating,
Next, there is a method for manufacturing a 1ffl thin crotched substrate, in which the conductive thin film is deposited on the surface of the substrate inside the convex resist portion.
なお、「所定の凸状レジスト部分」とは、レジスト膜の
基板外周縁近傍に存する「全ての凸状レジスト部分」と
、例えば、前述したように第５図で示す所望パターン６
の一部６ａを形成する部分の「部分的な凸状レジスト部
分」も意味する。Note that the "predetermined convex resist portions" include "all convex resist portions" of the resist film near the outer periphery of the substrate, and, for example, as described above, the desired pattern 6 shown in FIG.
It also means a "partially convex resist portion" of a portion forming part 6a.
本発明によれば、導電性薄膜が凸状レジスト部分の内側
に被着していることから、ショート等の原因となる残存
導電性薄膜パターンを形成することがなくなる。According to the present invention, since the conductive thin film is deposited on the inside of the convex resist portion, there is no possibility of forming a residual conductive thin film pattern that may cause short circuits or the like.
本発明の一実施例を第１図及び第２図に基づき詳述する
。なお、第１図は平面図、第２図は第１閏のＸｌ−Ｘｔ
線部分拡大断面図である。An embodiment of the present invention will be described in detail with reference to FIGS. 1 and 2. In addition, Fig. 1 is a plan view, and Fig. 2 is a diagram of Xl-Xt of the first leap.
It is an enlarged sectional view of a line part.
先ず、３００ｍｍ Ｘ ３５０ｍ Ｘ １． ＩＭの大
きさに形状加工し、３００ｓ＋Ｘ ３５０ＩＩｍの表面
を精密した、アルミノボロシリケートからなるガラス基
板１０（重Ｕ：３００Ｇ ）上に、後記するレジスト膜
１３（例えば、ポジ型のフォトレジストであるシュブレ
ー社製のＡＺ −１３５０）を形成するためのレジスト
液を滴下し、スピンコート法で成膜する。なお、このと
きのスピンコートの条件は、後記するＩＴＯからなる透
明導電性ＶＪ膜１１上に前述したレジスト膜１３を形成
するときと同一条件である、初期回転数１５０゜ｒｐｍ
、初期回転時＠３秒、乾燥回転数３００ｒｐｍ。First, 300mm x 350m x 1. A resist film 13 to be described later (for example, a positive photoresist called Schbrae) is placed on a glass substrate 10 (weight U: 300G) made of aluminoborosilicate, which has been shaped into the size of IM and has a precise surface of 300s + x 350IIm. A resist solution for forming AZ-1350 (manufactured by Co., Ltd.) is dropped, and a film is formed by spin coating. The conditions for spin coating at this time are the same as those for forming the above-described resist film 13 on the transparent conductive VJ film 11 made of ITO, which will be described later.
, initial rotation @ 3 seconds, drying rotation speed 300 rpm.
乾燥回転時間１４０秒であり、乾燥回転は初期回転後に
引き続き行なう。そして、このスピンコートの条件によ
れば、レジスト膜の凸状レジスト部分１３ａは基板１０
の外周縁から２ｍｍ（Ｌｌ）内側に入ったところに生じ
る。したがって、予め所望するスピンコートの条件によ
り、凸状レジスト部分１３ａが生じる位置を把握してお
く。The drying rotation time was 140 seconds, and the drying rotation was continued after the initial rotation. According to this spin coating condition, the convex resist portion 13a of the resist film is formed on the substrate 10.
It occurs at a point 2 mm (Ll) inside from the outer periphery of. Therefore, the position where the convex resist portion 13a will be formed is determined in advance according to the desired spin coating conditions.
次に、前述したと同様のガラスミ基板１０を用意し、基
板１０の外周縁から２．５＃ＩＩＩＩ （Ｌ ａ ）内
側に入った、基板１０の一主表面上に、スパッタリング
法によりＩＴＯからなる透明導電性＠膜１１（膜厚：
１０００人）を被着し、本例の導電性薄膜付き基板１２
を製作する。このとき、ＩＴＯ膜１１を被着しない主表
面の部分には、マスクをかけておき、スパッタリングに
よりＩＴＯＩｌｏｌｌの被着後マスクを取り外す。Next, a glass substrate 10 similar to that described above is prepared, and on one main surface of the substrate 10, which is 2.5 #III (L a ) inside from the outer periphery of the substrate 10, a layer of ITO is deposited by sputtering. Transparent conductive @ film 11 (film thickness:
1000 people), and the conductive thin film-coated substrate 12 of this example
Manufacture. At this time, a mask is applied to the main surface portion where the ITO film 11 is not applied, and the mask is removed after the ITOI roll is applied by sputtering.
次に、この導電性薄膜付き基板１２上にレジスト膜を被
着して凸状レジスト部分の位置を確認する。Next, a resist film is deposited on the conductive thin film-coated substrate 12, and the position of the convex resist portion is confirmed.
先ず、前°述したレジスト液を透明）ｇ電性薄膜１１上
に滴下し、スピンコート法により、初期回転数１５００
ｒ ｐｍ、初期回転時間３秒で初期回転し、次に乾燥回
転数３００ｒｐｍ、乾燥回転時間１４０秒で乾燥回転し
、レジスト膜１３を透明導電性薄膜１１上に被着・乾燥
させる。このようにして被着させたレジスト膜１３は、
第１図の二点鎖ａＤ、Ｅで囲まれた領域Ｚのように枠状
で、透明導電性薄膜１２よりも外側に凸状レジスト部分
１３ａを有して形成される。First, the above-mentioned resist solution was dropped onto the transparent conductive thin film 11, and the initial rotation speed was set to 1500 using a spin coating method.
rpm and an initial rotation time of 3 seconds, and then a dry rotation is performed at a drying rotation speed of 300 rpm and a drying rotation time of 140 seconds to deposit and dry the resist film 13 on the transparent conductive thin film 11. The resist film 13 deposited in this way is
It is formed in a frame shape, as in the area Z surrounded by double-dot chains aD and E in FIG. 1, and has a convex resist portion 13a on the outside of the transparent conductive thin film 12.
この凸状レジスト部分１３ａは、基板１０の外周縁より
内側２．０Ｎ（Ｌｌ）に存在し、その幅Ｌ２は約０．５
ｍで、高さＨは約１μｍである。その後、レジスト膜１
３を９０℃で３０分間プレベークする。次に、例えば、
第５図に示した所望パターン６を得るべく、所望のフォ
トマスクを介して透明導電性薄膜１１の膜厚１μｍのレ
ジスト１ｌｉ１３を充分に露光できる露光Ｎ２００ｔｎ
Ｊ ／ｃｉで露光し、ＡＺ専用現像で現像し、４０ボ一
メ度塩化第２鉄水溶液と３６重量％塩酸の１／１混合液
で透明導電性薄膜１１をエツチングし、レジスト膜１３
をメチルセロソブル及びイソプロピルアルコールを用い
て剥離し、所望の透明導電性薄膜パターンを形成する。This convex resist portion 13a exists 2.0N (Ll) inside the outer peripheral edge of the substrate 10, and its width L2 is approximately 0.5
m, and the height H is about 1 μm. After that, resist film 1
Pre-bake 3 at 90°C for 30 minutes. Then, for example,
In order to obtain the desired pattern 6 shown in FIG. 5, the exposure N200tn is enough to fully expose the 1 μm thick resist 1li13 of the transparent conductive thin film 11 through a desired photomask.
The transparent conductive thin film 11 is exposed to light at J/ci, developed using an AZ exclusive developer, and etched with a 1/1 mixture of a 40-bore ferric chloride aqueous solution and 36% by weight hydrochloric acid to form a resist film 13.
is peeled off using methyl cellulose and isopropyl alcohol to form a desired transparent conductive thin film pattern.
以上のようにして透明導電性薄膜パターンを形成しても
、透明導電性薄膜１１の外側に凸状レジスト部分１３ａ
が存在し、すなわち凸状レジスト部分１３ａの下方には
透明導電性１１１１１が存在しないことから、この凸状
レジスト部分１３ａが充分に露光されず、現像時に残っ
ていても、透明導電性薄膜１１は従来のように枠状に残
存することはない。Even if the transparent conductive thin film pattern is formed as described above, the convex resist portions 13a on the outside of the transparent conductive thin film 11
exists, that is, there is no transparent conductive material 11111 below the convex resist portion 13a. Therefore, even if this convex resist portion 13a is not sufficiently exposed and remains during development, the transparent conductive thin film 11 is It does not remain in a frame shape like in the past.
以上本発明は前記実施例に限らず以下のものであっても
よい。先ず、導電性薄膜はＩＴＯからなるものに限らず
、酸化スズ、酸化スズにＳｂ等をドープしたもの及び酸
化インジウム等の他の透明導電性＠膜からなるものや、
Ｎｉ、Ａｕ等の不透明の導電性薄膜からなるものでもよ
く、その膜厚も適宜決定してもよい。また、導電性基膜
が被着される領域は、凸状レジスト部分が存する領域と
所望されるパターンの領域とを鑑みて適宜決定すればよ
く、さらに、第５図に示すように所望パターンがＸ方向
（図において左右方向）に長寸法を有するものであれば
、左右の凸状レジスト部分の下には導電性ｊ膜を被着せ
ず、図において上下方向における導電性薄膜は、凸状レ
ジスト部分の下に被着してもよい。As described above, the present invention is not limited to the above-mentioned embodiments, but may include the following. First, conductive thin films are not limited to those made of ITO, but also those made of other transparent conductive films such as tin oxide, tin oxide doped with Sb, etc., and indium oxide.
It may be made of an opaque conductive thin film such as Ni or Au, and the film thickness may be determined as appropriate. Further, the area to which the conductive base film is applied may be appropriately determined in consideration of the area where the convex resist portion exists and the area of the desired pattern, and further, as shown in FIG. If it has a long dimension in the X direction (horizontal direction in the figure), the conductive film is not deposited under the convex resist portions on the left and right, and the conductive thin film in the vertical direction in the figure is the convex resist. It may be applied under the part.
また、レジスト膜はポジ型のフォトレジストに限らず、
ネガ型フォトレジストや電子線レジスト等の他のレジス
トでもよく、またその膜厚も適宜決定すればよい。In addition, the resist film is not limited to positive photoresist.
Other resists such as negative photoresist or electron beam resist may be used, and the film thickness thereof may be determined as appropriate.
また、基板としてはガラス基板に限らず、セラミックか
らなる基板、アルミニウムからなる金属基板等の他の基
板であってもよく、またその形状も正方形、矩形及び円
状等であってもよい。Further, the substrate is not limited to a glass substrate, and may be other substrates such as a ceramic substrate or a metal substrate made of aluminum, and its shape may be square, rectangular, circular, or the like.
また、前記実施例では、導電性薄膜上にレジスト膜を被
着する前に、そのレジスト膜を被着するスピンコート条
件により基板上にレジスト膜を形成して凸状レジスト部
分の位置を判定したが、予め種々のスピンコート条件、
特に種々の回転数によりレジスト膜を基板上に被着して
、それぞれの回転数に対応する凸状レジスト部分の位置
を判定しておいてもよい。なお、前記実施例では、乾燥
回転数を増加すると基板外周縁方向へ凸状レジスト部分
は移動する。In addition, in the above example, before depositing the resist film on the conductive thin film, a resist film was formed on the substrate under the spin coating conditions for depositing the resist film, and the position of the convex resist portion was determined. However, various spin coating conditions are set in advance,
In particular, the resist film may be deposited on the substrate at various rotational speeds, and the position of the convex resist portion corresponding to each rotational speed may be determined. In the above embodiment, when the drying rotation speed is increased, the convex resist portion moves toward the outer peripheral edge of the substrate.
本発明によれば、レジスト膜の所定の凸状レジスト部分
より内側に導電性薄膜を基板上に被着していることから
、例えばショートの原因となる導電性薄膜パターンを基
板の外周縁近傍に残存させることを防止でき、また凸状
レジスト部分をアセトン等で除去する必要もなくなり実
用上非常に６益である。According to the present invention, since the conductive thin film is deposited on the substrate inside the predetermined convex resist portion of the resist film, for example, the conductive thin film pattern that may cause a short circuit is placed near the outer periphery of the substrate. It is possible to prevent the resist from remaining and there is no need to remove the convex resist portions with acetone or the like, which is a great practical advantage.
第１図及び第２図はそれぞれ本発明の導電性薄膜付き基
板の一実施例を示す図で、第１図は平面図、第２図は第
１図のＸｌ−Ｘｔ線部分拡大断面図である。第３図は従
来の導電性薄膜付き基板を示す断面図であり、第４図は
従来の導電性薄膜付き基板を用いたときに残存する不用
の導電性薄膜パターンを示す平面図である。第５図は所
望のパターンを示す平面図である。
１０・・・基板、１１−・・導電性ｉａ膜、１２・・・
導電性λン膜付き基板、１３・・・レジスト膜、１３ａ
・・・凸状レジスト部分。1 and 2 are views showing an embodiment of the conductive thin film-coated substrate of the present invention, respectively. FIG. 1 is a plan view, and FIG. 2 is a partially enlarged sectional view taken along the line Xl-Xt in FIG. 1. be. FIG. 3 is a sectional view showing a conventional substrate with a conductive thin film, and FIG. 4 is a plan view showing an unnecessary conductive thin film pattern that remains when the conventional substrate with a conductive thin film is used. FIG. 5 is a plan view showing the desired pattern. 10... Substrate, 11-... Conductive IA film, 12...
Substrate with conductive λ film, 13... resist film, 13a
... Convex resist part.
Claims (2)
薄膜とを備えた導電性薄膜付き基板において、前記導電
性薄膜をパターン化するとき前記導電性薄膜上に塗布す
るレジスト膜の前記基板外周縁近傍に存する所定の凸状
レジスト部分より内側に前記導電性薄膜を被着してなる
導電性薄膜付き基板。(1) In a substrate with a conductive thin film comprising a substrate and a conductive thin film deposited on one main surface of the substrate, a resist applied on the conductive thin film when patterning the conductive thin film. A substrate with a conductive thin film formed by depositing the conductive thin film on the inner side of a predetermined convex resist portion of the film near the outer periphery of the substrate.
薄膜とを備えた導電性薄膜付き基板の製造方法において
、前記導電性薄膜をパターン化するとき前記導電性薄膜
上にレジスト膜を塗布するスピンコート法の条件により
、前記レジスト膜の前記基板外周縁近傍に存する所定の
凸状レジスト部分の位置を予め判定し、次に前記凸状レ
ジスト部分の内側の前記基板表面上に前記導電性薄膜を
被着する導電性薄膜付き基板の製造方法。(2) In a method for manufacturing a substrate with a conductive thin film, which includes a substrate and a conductive thin film deposited on one main surface of the substrate, when patterning the conductive thin film, a conductive thin film is formed on the conductive thin film. Based on the conditions of the spin coating method for applying a resist film, the position of a predetermined convex resist portion of the resist film near the outer periphery of the substrate is determined in advance, and then the position of a predetermined convex resist portion of the resist film is determined on the substrate surface inside the convex resist portion. A method of manufacturing a substrate with a conductive thin film, which comprises depositing the conductive thin film on a substrate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63045159A JP3075479B2 (en) | 1988-02-26 | 1988-02-26 | Substrate with conductive thin film and method of manufacturing the same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63045159A JP3075479B2 (en) | 1988-02-26 | 1988-02-26 | Substrate with conductive thin film and method of manufacturing the same |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH01220304A true JPH01220304A (en) | 1989-09-04 |
| JP3075479B2 JP3075479B2 (en) | 2000-08-14 |
Family
ID=12711487
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP63045159A Expired - Lifetime JP3075479B2 (en) | 1988-02-26 | 1988-02-26 | Substrate with conductive thin film and method of manufacturing the same |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3075479B2 (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS50154792A (en) * | 1974-05-23 | 1975-12-13 |
-
1988
- 1988-02-26 JP JP63045159A patent/JP3075479B2/en not_active Expired - Lifetime
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS50154792A (en) * | 1974-05-23 | 1975-12-13 |
Also Published As
| Publication number | Publication date |
|---|---|
| JP3075479B2 (en) | 2000-08-14 |
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