JPH01211985A - Manufacture of josephson element - Google Patents

Manufacture of josephson element

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Publication number
JPH01211985A
JPH01211985A JP63036965A JP3696588A JPH01211985A JP H01211985 A JPH01211985 A JP H01211985A JP 63036965 A JP63036965 A JP 63036965A JP 3696588 A JP3696588 A JP 3696588A JP H01211985 A JPH01211985 A JP H01211985A
Authority
JP
Japan
Prior art keywords
film
crystal
trench
superconductor
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP63036965A
Other languages
Japanese (ja)
Other versions
JPH07120822B2 (en
Inventor
Yoshifusa Wada
和田 容房
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
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Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP63036965A priority Critical patent/JPH07120822B2/en
Publication of JPH01211985A publication Critical patent/JPH01211985A/en
Publication of JPH07120822B2 publication Critical patent/JPH07120822B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Superconductor Devices And Manufacturing Methods Thereof (AREA)

Abstract

PURPOSE:To facilitate the control the shape and characteristics of a Josephson element, by a method wherein, after a trench is formed on a crystal substrate or a crystal film, the width of the trench is narrowed by forming, on the surface, a film of the same material as the crystal substrate or the crystal film, or of the material turning to a base for growing a superconducting film. CONSTITUTION:A fine trench 4 is formed in the region to form a Josephson element on a crystal substrate 1. The width of the trench 4 is narrowed by forming, on the whole substrate 1 surface, a base supporting film 6 turning to a base for forming a superconductor. When a superconductor film is successively formed on the whole substrate 1 surface, the crystal structure of superconducting thin films 7, 8 reflect the crystal structure of the base, and a film having a structure different from the trench 4 periphery grows in the trench part 4, because of unevenness of the surface or destruction of crystal structure at the time of working the trench. Since the growing speed of said film becomes small by the effect of side walls of the trench 4, the crystal regions grown on both sides of the trench 4 extend gradually, and at last form a crystal grain boundary to come into contact with each other. Thereby the formation of crystal grain boundary of the superconducting films formed on the trench 4 is facilitated, and the control of characteristics of grain boundary junction is facilitated.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は低温で動作するジョセフソン効果を用いた素子
、特に高速スイッチ素子および高磁界感度を有する素子
の製造方法に関する。
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a method for manufacturing a device using the Josephson effect that operates at low temperatures, particularly a high-speed switching device and a device having high magnetic field sensitivity.

(従来の技術) 従来、ニオブ等の金属および窒化ニオブ等の金属間化合
物超伝導体を用いて構成したジョセフソン接合を用いた
素子(ジョセフソン素子)は、酸化アルミニウムやゲル
マニウム等の絶縁体や半導体から成るトンネル障壁を超
伝導体間に形成してジョセフソン接合を構成することに
よって作製されている。
(Prior art) Conventionally, devices using Josephson junctions (Josephson devices) constructed using metals such as niobium and intermetallic compound superconductors such as niobium nitride have been constructed using insulators such as aluminum oxide or germanium, It is fabricated by forming a tunnel barrier made of semiconductor between superconductors to form a Josephson junction.

トンネル障壁の形状の規定には、半導体等の製造に用い
られている露光技術と加工技術が用いられる。これらの
ジョセフソン素子は、主にシリコン基板上に製作されて
いる。場合により、基板上に形成された超伝導体の薄膜
のパターンエツジを用いたトンネル障壁構造を有するエ
ツジ接合型ジョセフソン素子も用いられる。エツジ接合
の構造に関しては、一方の超伝導体電極膜のエツジと他
方の超伝導体電極膜の面とを接触させた構造が通常用い
られている。これは、従来のニオブ等の金属および金属
間化合物の超伝導体の超伝導性か、膜の面方向や結晶方
位に全く依存せず等方的であることによる。これらのジ
ョセフソン素子は、従来のシリコンデバイスの製造に用
いられている露光技術および加工技術を駆使して製造さ
れている。
Exposure technology and processing technology used in the manufacture of semiconductors and the like are used to define the shape of the tunnel barrier. These Josephson devices are mainly manufactured on silicon substrates. In some cases, an edge junction type Josephson device having a tunnel barrier structure using patterned edges of a superconductor thin film formed on a substrate is also used. Regarding the edge junction structure, a structure in which the edge of one superconductor electrode film is brought into contact with the surface of the other superconductor electrode film is usually used. This is due to the superconductivity of conventional superconductors of metals and intermetallic compounds such as niobium, or to the fact that they are isotropic, completely independent of the plane direction or crystal orientation of the film. These Josephson elements are manufactured using exposure and processing techniques that are used in the manufacture of conventional silicon devices.

一方、最近イツトリウム・バリウム・銅酸化物(Y−B
a−Cu−0)等において超伝導特性を示す物質が存在
することが発見された。希土類と銅を含むこれらの酸化
物超伝導体は、絶対温度40に〜90に前後において超
伝導状態に転移する。これらの酸化物高温超伝導体の超
伝導特性、即ち臨界電流密度、臨界磁界、コヒーレンス
長等の物質定数は、結晶の方位に著しく依存し、AB軸
面内方向とC軸方向において1桁前後も値に差が見られ
る。
On the other hand, recently, yttrium/barium/copper oxide (Y-B
It has been discovered that there are substances exhibiting superconducting properties such as a-Cu-0). These oxide superconductors containing rare earths and copper transition to a superconducting state at temperatures around 40 to 90 degrees absolute. The superconducting properties of these oxide high-temperature superconductors, that is, material constants such as critical current density, critical magnetic field, and coherence length, depend significantly on the crystal orientation, and vary by about an order of magnitude in the AB-axis in-plane direction and the C-axis direction. There are also differences in the values.

さらに酸化物高温超伝導体の薄膜は、チタン酸ストロン
チウム(SrTt03)結晶上に基板温度500°C〜
700°Cで成膜した時アニールなしでも超伝導特性を
示す。膜の結晶軸は、基板の結晶方位を反映して配向す
ることが知られている。一方、成膜後、900°C前後
のアニールを行うと膜の臨界温度が上昇し、超伝導特性
が改善される。この時の膜は多結晶となり多数の結晶粒
が成長する。この酸化物超伝導体を用いたジョセフソン
素子やスクイラド(SQUID)は、酸化物超伝導体の
セラミックスや薄膜を用いて下記の方法で製造されてい
る。
Furthermore, thin films of oxide high-temperature superconductors are deposited on strontium titanate (SrTt03) crystals at substrate temperatures of 500°C and up.
When deposited at 700°C, it exhibits superconducting properties even without annealing. It is known that the crystal axis of a film is oriented to reflect the crystal orientation of the substrate. On the other hand, when the film is annealed at around 900° C. after film formation, the critical temperature of the film increases and the superconducting properties are improved. At this time, the film becomes polycrystalline and many crystal grains grow. Josephson devices and SQUIDs using this oxide superconductor are manufactured by the following method using ceramics and thin films of the oxide superconductor.

(発明が解決しようとする課題) 酸化物高温超伝導体を用いたジョセフソン素子は、酸化
物超伝導体のセラミックス棒にひび割れを入れて、棒内
部に微小な弱結合を作る方法(ジャパン・ジャーナル・
オブ・アプライド・フィジックス(Japan Jou
rnal of Applied Physics)第
26巻第5号第L701〜L703頁)や、チタン酸ス
トロンチウムやマグネシアの基板上に成膜後アニールに
よって生じる結晶粒界をジョセフソン接合とする方法(
信学技報第87巻第249号第73〜78頁)によって
作られている。
(Problem to be solved by the invention) Josephson devices using oxide high-temperature superconductors are developed using a method (Japan journal·
of Applied Physics (Japan Jou
26, No. 5, pages L701-L703), and a method of forming Josephson junctions at grain boundaries produced by annealing after film formation on strontium titanate or magnesia substrates (
(IEICE Technical Report Vol. 87, No. 249, pp. 73-78).

しかしながら、酸化物高温超伝導体は、超伝導性が影響
するコヒーレンス長が2〜4nm程度と著しく小さいこ
と、真空保管時に生じる酸素の離脱や、大気中の水蒸気
との反応による組成変化等により超伝導性の破壊が生じ
易いことが知られている。このため、従来のニオブlア
ルミ酸化膜lニオブ接合を形成すると同様の絶縁体をは
さむ方法では酸化物超伝導体間に制御性良くジョセフソ
ン接合を作ることが困難であった。即ち、これらの従来
の方法によって作られたジョセフソン素子は、接合界面
において膜の組成が超伝導となる組成からずれるため十
分な性能を有する接合が得られず、又接合の臨界電流値
の制御性と再現性が著しく悪かった。一方粒界やクラッ
クを用いたジョセフソン素子では、粒界やクラックの位
置の制御ができないため、接合位置の規定も困難であっ
た。特に従来の方法では、電流密度が高いAB軸面に直
交するジョセフソン接合を形成できなかった。
However, the coherence length of oxide high-temperature superconductors, which is affected by superconductivity, is extremely small at about 2 to 4 nm, and the composition changes due to the release of oxygen during vacuum storage and the reaction with water vapor in the atmosphere, etc. It is known that conductive breakdown is likely to occur. For this reason, it is difficult to form a Josephson junction between oxide superconductors with good controllability using the same method of sandwiching an insulator when forming a conventional niobium-l-aluminum oxide film-l-niobium junction. In other words, in Josephson devices manufactured by these conventional methods, the composition of the film at the junction interface deviates from the composition that makes it superconducting, making it impossible to obtain a junction with sufficient performance, and it is difficult to control the critical current value of the junction. The accuracy and reproducibility were extremely poor. On the other hand, in Josephson elements using grain boundaries and cracks, it is difficult to specify the bonding position because the positions of the grain boundaries and cracks cannot be controlled. In particular, with conventional methods, it has not been possible to form a Josephson junction that is perpendicular to the AB axis plane where the current density is high.

本発明の目的は、従来の問題点を解決し、指定された位
置に再現性良く形成できるジョセフソン素子を提供する
ことにある。
An object of the present invention is to solve the conventional problems and provide a Josephson element that can be formed at a designated position with good reproducibility.

(課題を解決するための手段) 本発明のジョセフソン素子の製造方法は、結晶基板もし
くは結晶膜上に設けた溝上の超伝導体膜に粒界を形成し
てジョセフソン接合とするジョセフソン素子の製造にお
いて、前記溝形成後、前記結晶基板もしくは結晶膜表面
に、前記結晶基板もしくは結晶膜と同一物質もしくは前
記超伝導体膜の成長の下地となる物質を成膜して前記溝
の幅を縮小させる工程を含むことを特徴とする。
(Means for Solving the Problems) A method for manufacturing a Josephson device of the present invention is a Josephson device in which grain boundaries are formed in a superconductor film on a groove provided on a crystal substrate or a crystal film to form a Josephson junction. In manufacturing, after forming the groove, the width of the groove is increased by forming a film on the surface of the crystal substrate or crystal film with the same material as the crystal substrate or crystal film or a material that will serve as a base for the growth of the superconductor film. It is characterized by including a step of reducing the size.

(作用) 本発明によるジョセフソン素子の製造方法によれば、結
晶基板もしくは結晶膜上に設けた溝の上の超伝導体膜に
粒界を形成してジョセフソン接合とするジョセフソン素
子が、下記のようにして製作される。
(Function) According to the method for manufacturing a Josephson device according to the present invention, a Josephson device in which grain boundaries are formed in a superconductor film on a groove provided on a crystal substrate or a crystal film to form a Josephson junction can be produced. It is manufactured as follows.

先ず酸化物高温超伝導体等の超伝導物質を成膜する結晶
基板もしくは結晶膜上のジョセフソン素子を形成する領
域に微細な溝を形成する。微細な溝は、電子ビームを用
いて穴を掘る方法や、通常シリコンデバイス等の加工に
用いられている反応性イオンエツチング(RIE)法等
により形成される。
First, fine grooves are formed in a region where a Josephson element is to be formed on a crystal substrate or crystal film on which a superconducting material such as an oxide high-temperature superconductor is to be deposited. The fine grooves are formed by a method of digging a hole using an electron beam, a reactive ion etching (RIE) method, which is generally used for processing silicon devices, and the like.

続いて基板全面に前記の結晶物質もしくは、他の超伝導
体形成の下地となる下地補助膜を電子ビーム蒸着法やス
パッタ法等により成膜し溝幅を縮める。特に、前記の溝
の側壁部に膜が形成されるような斜め蒸着等の成膜法が
好ましく使用され、溝幅の縮小が行なわれる。この工程
は、溝を掘る加工精度が、露光・エツチング技術の精度
に制約され、0.5ミクロンメートル程度以下の微細な
溝の高精度の加工が困難であるために、導入されている
Subsequently, an auxiliary base film, which serves as a base for forming the crystalline material or other superconductor, is formed on the entire surface of the substrate by electron beam evaporation, sputtering, or the like, and the groove width is reduced. In particular, a film forming method such as oblique vapor deposition in which a film is formed on the side walls of the groove is preferably used to reduce the groove width. This process has been introduced because the processing accuracy for digging grooves is limited by the accuracy of exposure and etching techniques, making it difficult to process fine grooves of about 0.5 micrometers or less with high precision.

続いて、基板全面に超伝導物質を成膜する。成膜された
超伝導薄膜の結晶構造は、下地の結晶構造を反映して下
地の結晶構造と一致した構造となる。従って、溝部にお
いては、表面の凹凸もしくは溝加工時における結晶構造
の破壊等により、溝周辺部とは異なる構造の膜が成長す
る。この膜の成長速度は、溝の側壁の効果により遅くな
る。このため、溝の両側に成長した結晶領域は徐々に拡
大し、やがて溝上に結晶粒界を作って互いに接触する。
Next, a superconducting material is deposited over the entire surface of the substrate. The crystal structure of the deposited superconducting thin film reflects the crystal structure of the underlying layer and matches the crystal structure of the underlying layer. Therefore, in the groove portion, a film having a structure different from that in the peripheral portion of the groove grows due to surface irregularities or destruction of the crystal structure during groove processing. The growth rate of this film is slowed down by the effect of the trench sidewalls. Therefore, the crystal regions grown on both sides of the groove gradually expand and eventually form crystal grain boundaries on the groove and come into contact with each other.

最後に、超伝導体膜を所望の形状に加工し必要な回路を
形成する。即ち溝上の超伝導体膜を指定された電極幅W
に加工する。以上のようにして作られた結晶粒界から成
るジョセフソン接合の面積は、超伝導体膜の膜厚をtと
する時、はぼWtとなる。よって電極幅Wもしくは膜厚
tを変えることにより、臨界電流値の制御が行なわれる
Finally, the superconductor film is processed into a desired shape to form the necessary circuit. That is, the superconductor film on the groove has a specified electrode width W
Process it into The area of the Josephson junction formed by the grain boundaries created as described above is approximately Wt, where t is the thickness of the superconductor film. Therefore, by changing the electrode width W or film thickness t, the critical current value can be controlled.

(実施例) 本発明の第1の実施例によるジョセフソン素子の製造工
程を第1図に示す。
(Example) FIG. 1 shows the manufacturing process of a Josephson device according to a first example of the present invention.

先ずチタン酸ストロンチウムから成る結晶基板1のジョ
セフソン素子を形成する領域に、通常の露光技術を用い
てフォトレジスト2に長さ6pm、幅0.6pmの窓3
を明ける(第1図(a))。次に塩素ガスを用いた反応
性イオンビームエツチング技術(第48回応用物理学会
講演予稿集第1分冊第67頁講演番号19p−D−2)
により溝4を形成する。この時のエツチング条件は、塩
素ガス圧力0.15Pa、引出し電圧400V、イオン
ビーム5の電流数十pA/cm2であり、エツチング速
度は超伝導体膜10nm/分、レジスト30nm/分で
ある。上記条件の塩素イオンビーム5で40分間エツチ
ングし深さ400mmの溝4を掘る(第1図(b))。
First, a window 3 having a length of 6 pm and a width of 0.6 pm is formed in a photoresist 2 using a normal exposure technique in a region where a Josephson element is to be formed on a crystal substrate 1 made of strontium titanate.
(Figure 1(a)). Next, reactive ion beam etching technology using chlorine gas (Proceedings of the 48th Japan Society of Applied Physics, Vol. 1, page 67, lecture number 19p-D-2)
A groove 4 is formed by this. The etching conditions at this time were a chlorine gas pressure of 0.15 Pa, an extraction voltage of 400 V, and a current of several tens of pA/cm2 of the ion beam 5, and the etching speed was 10 nm/min for the superconductor film and 30 nm/min for the resist. Etching was performed for 40 minutes using the chlorine ion beam 5 under the above conditions to dig a groove 4 with a depth of 400 mm (FIG. 1(b)).

続いて、チタン酸ストロンチウムから成る結晶基板1を
600°Cに加熱し、電子ビーム斜め蒸着法により5n
m/分の速度で、チタン酸ストロンチウムから成る下地
補助膜6が300mm厚に成膜される(第1図(C))
。この詩情4の側壁には約200nmのチタン酸ストロ
ンチウムが成長する。従って、溝4の幅は0.611m
から0.2¥1m程度に縮小され、溝4の深さは400
mmから1100nと浅くなる。以上の結果、0.2p
m幅で1100nの深さに、溝4がチタン酸ストロンチ
ウムから成る下地補助膜6で埋込まれる。この時の溝4
の両側の領域では、結晶基板lと同一の構造を有するチ
タン酸ストロンチウムから成る下地補助膜6が成長する
Subsequently, the crystal substrate 1 made of strontium titanate was heated to 600°C, and 5n
An auxiliary base film 6 made of strontium titanate is formed to a thickness of 300 mm at a speed of m/min (Fig. 1 (C)).
. Strontium titanate with a thickness of about 200 nm grows on the side wall of Shijo 4. Therefore, the width of groove 4 is 0.611m
The depth of groove 4 was reduced to about 0.2 1 m, and the depth of groove 4 was 400 m.
It becomes shallow from mm to 1100n. As a result, 0.2p
The groove 4 is filled with a base auxiliary film 6 made of strontium titanate to a width of m and a depth of 1100n. Groove 4 at this time
An auxiliary base film 6 made of strontium titanate and having the same structure as the crystal substrate 1 is grown on both sides of the substrate.

続いて、基板1を650°Cに加熱し、イツトリウム・
バリウム・銅酸化物を成膜速度10nm1分で圧力10
パスカルの酸素雰囲気中で40分間蒸着して成膜する。
Subsequently, the substrate 1 is heated to 650°C and yttrium.
Barium/copper oxide was deposited at a deposition rate of 10 nm and 1 minute at a pressure of 10
The film is formed by vapor deposition for 40 minutes in a Pascal oxygen atmosphere.

蒸着源としては、イツトリウム・バリウム・銅酸化物の
焼結体を用いる。焼結体の組成は、蒸着により形成され
たイツトリウム・バリウム・銅酸化物が超伝導体となる
組成に調整されている。蒸着源と成長した膜との組成ず
れは、装置と成膜条件に依存して大きく変化する。たと
えば本実施例においては、バリウムと銅がそれぞれ所望
の組成比より2%と4%増量した蒸着源を用いる。ここ
で蒸着源の加熱には、l0KVで加速された電子ビーム
が用いられる。又十分な酸素を補給する他の方法として
100vで加速した酸素イオンビームを試料全面に照射
する手段も用いても良い。
A sintered body of yttrium, barium, and copper oxide is used as a vapor deposition source. The composition of the sintered body is adjusted so that the yttrium-barium-copper oxide formed by vapor deposition becomes a superconductor. The compositional deviation between the vapor deposition source and the grown film varies greatly depending on the equipment and film forming conditions. For example, in this embodiment, a vapor deposition source is used in which the amounts of barium and copper are increased by 2% and 4%, respectively, from the desired composition ratio. Here, an electron beam accelerated at 10 KV is used to heat the deposition source. Furthermore, as another method for supplying sufficient oxygen, a means of irradiating the entire surface of the sample with an oxygen ion beam accelerated at 100V may also be used.

以上のようにして形成された膜厚400nmのイツトリ
ウム・バリウム・銅酸化物超伝導体の結晶構造は、基板
のチタン酸ストロンチウムの結晶構造を反映した構造と
なる。即ち、C軸が基板面に垂直なチタン酸ストロンチ
ウム基板1を用いた時、同様にイツトリウム・バリウム
・銅酸化物は、C軸が基板面に垂直となった構造となる
。なお、溝4の上部においては、溝の両側から成長した
第1および第2の超伝導体膜7.8の結晶の粒界9が形
成され、ジョセフソン接合となる(第1図(d))。
The crystal structure of the 400 nm thick yttrium-barium-copper oxide superconductor formed as described above has a structure that reflects the crystal structure of the strontium titanate of the substrate. That is, when using the strontium titanate substrate 1 in which the C-axis is perpendicular to the substrate surface, yttrium-barium-copper oxide has a structure in which the C-axis is perpendicular to the substrate surface. In addition, in the upper part of the groove 4, grain boundaries 9 of the crystals of the first and second superconductor films 7.8 grown from both sides of the groove are formed, forming a Josephson junction (Fig. 1(d)). ).

続いて、フォトレジストを用いた露光・エツチング技術
により、第1及び第2の超伝導体電極膜7.8が所望の
形状、たとえば電極幅Wが4pmに加工され、必要な配
線と第2図に斜視図で示したジョセフソン素子が形成さ
れる。この時の反応性イオンビームエツチングを用いた
加工は次のように行なわれる。10’Torrの塩素ガ
スを高周波プラズマでイオン化し、引出し電圧400v
でイオン化した塩素ガスを加速してイオンビームを作る
。このイオンビームを試料全面に照射してイツトリウム
・バリウム、銅酸化物をエツチングする。たとえばエッ
チング速度4nm/分で80分間エツチングすることに
より超伝導体電極7.8が所望形状に加工される。
Subsequently, the first and second superconductor electrode films 7.8 are processed into a desired shape, for example, with an electrode width W of 4 pm, by exposure and etching technology using photoresist, and the necessary wiring and wiring as shown in FIG. A Josephson element shown in a perspective view is formed. Processing using reactive ion beam etching at this time is performed as follows. Chlorine gas of 10'Torr is ionized with high frequency plasma, and the extraction voltage is 400v.
The ionized chlorine gas is accelerated to create an ion beam. The entire surface of the sample is irradiated with this ion beam to etch yttrium, barium, and copper oxide. For example, the superconductor electrode 7.8 is processed into a desired shape by etching for 80 minutes at an etching rate of 4 nm/min.

上記実施例以外の超伝導体膜の成膜法として、イツトリ
ウム・バリウム・銅酸化物の焼結体の電極をターゲット
としたスパッタ法や、イツトリウムとバリウムと銅の金
属もしくは酸化物をそれぞれ異なるターゲット又は蒸着
源として同時にもしくは時分割でスパッタ又は蒸着する
方法等も利用できる。さらに超伝導体膜の加工には、イ
オンビーム・エツチング法や塩素以外の気体を用いた反
応性プラズマエツチング法等が用いられる。超伝導体膜
の形成時の試料温度は、650°C以外にも400〜9
00°C前後の範囲に設定しても良好な超伝導体膜が形
成される。
As a method for forming a superconductor film other than the above examples, a sputtering method using an electrode of a sintered body of yttrium, barium, and copper oxide as a target, or a method using different metals or oxides of yttrium, barium, and copper as targets. Alternatively, a method of simultaneously or time-sharing sputtering or vapor deposition as a vapor deposition source can also be used. Furthermore, ion beam etching, reactive plasma etching using a gas other than chlorine, etc. are used to process the superconductor film. The sample temperature during the formation of the superconductor film is not only 650°C but also 400°C to 9°C.
A good superconductor film can be formed even if the temperature is set in the range of around 00°C.

以上に説明した本発明のジョセフソン素子の製造方法に
よれば、第1および第2の超伝導体電極膜、結晶粒界は
、結晶基板に設けた溝の上に形成される。従って接合の
長さは超伝導体電極膜の電極幅Wで決まり、接合部の幅
は、超伝導体電極膜の膜厚tでほぼ決まる。従って接合
の面積はほぼWtとなり膜厚tと電極幅Wで制御できる
。又接合が形成される位置は、結晶基板に設けた溝によ
って制御できる。即ちジョセフソン素子の形状と特性の
制御が容易になる。
According to the Josephson device manufacturing method of the present invention described above, the first and second superconductor electrode films and the crystal grain boundaries are formed on the grooves provided in the crystal substrate. Therefore, the length of the bond is determined by the electrode width W of the superconductor electrode film, and the width of the bond portion is approximately determined by the thickness t of the superconductor electrode film. Therefore, the area of the junction becomes approximately Wt, which can be controlled by the film thickness t and the electrode width W. Furthermore, the position where the bond is formed can be controlled by grooves provided in the crystal substrate. That is, the shape and characteristics of the Josephson element can be easily controlled.

以上のようにして形成された、第1および第2の超伝導
体膜の粒界を接合としたジョセフソン素子は、大きな電
流密度を有する接合を形成することができる。即ち、ジ
ョセフソン素子の臨界電流値は以下のようにして定まる
。C軸が基板に垂直となっている下地結晶を用いると、
超伝導体膜は、C軸が基板に垂直となる。よって、超伝
導体膜においては、臨界電流値が大きい方向(AB軸)
が膜面の方向となり、接合を流れる電流方向と一致する
The Josephson element formed as described above, in which the grain boundaries of the first and second superconductor films are a junction, can form a junction having a large current density. That is, the critical current value of the Josephson element is determined as follows. When using a base crystal whose C axis is perpendicular to the substrate,
The C-axis of the superconductor film is perpendicular to the substrate. Therefore, in a superconductor film, the direction where the critical current value is large (AB axis)
is the direction of the membrane surface, which coincides with the direction of the current flowing through the junction.

従って、ジョセフソン素子の電流密度として、超伝導体
膜の最大電流密度106A/cm”を得ることもできる
。たとえば、ジョセフソン接合部の電流密度5 X 1
05A/am2を仮定すると、ジョセフソン素子の臨界
電流値として、通常の論理回路等で用いられている0、
1mAを有する接合は、0.4pm厚の超伝導体膜を用
いた特約111mの電極幅の第1及び第2の超伝導体電
極によって得られる。0.4pm膜厚の超伝導体電極の
電極幅を2pmにすれば0.2mA、4pmにすれば0
.4mAの臨界電流値を用するジョセフソン素子が形成
される。
Therefore, the maximum current density of the superconductor film of 106 A/cm" can be obtained as the current density of the Josephson element. For example, the current density of the Josephson junction is 5 x 1.
Assuming 05A/am2, the critical current value of the Josephson element is 0, which is used in ordinary logic circuits, etc.
A junction with 1 mA is obtained by first and second superconductor electrodes with an electrode width of approximately 111 m using a 0.4 pm thick superconductor film. If the electrode width of a superconductor electrode with a film thickness of 0.4 pm is 2 pm, it will be 0.2 mA, and if it is 4 pm, it will be 0.
.. A Josephson device is formed using a critical current value of 4 mA.

なお前記実施例では溝4の断面形状が矩形であるが、7
字形、U字形、台形、逆台形等でもよい。
In the above embodiment, the cross-sectional shape of the groove 4 is rectangular.
It may be a letter shape, a U-shape, a trapezoid, an inverted trapezoid, or the like.

(発明の効果) 本発明のジョセフソン素子の製造方法によれば、結晶基
板上に設けた溝の上に超伝導体膜の粒界を形成して、接
合としたジョセフソン素子が得られる。特に下地の結晶
上に設けた溝の幅を縮小することにより、溝の上に形成
する超伝導体膜の粒界の形成を容易にし、粒界接合の特
性の制御を容易にする。さらに本発明の製造方法におい
ては、超伝導体膜の結晶構造を下地の結晶構造で制御で
きるので、電流密度の高い結晶軸方向に電流を流すよう
なジョセフソン素子を制御性良く形成できる。
(Effects of the Invention) According to the method for manufacturing a Josephson device of the present invention, a Josephson device can be obtained in which the grain boundaries of the superconductor film are formed on the grooves provided on the crystal substrate to form a junction. In particular, by reducing the width of the groove provided on the underlying crystal, it is easier to form grain boundaries in the superconductor film formed on the groove, and the characteristics of grain boundary junctions can be easily controlled. Furthermore, in the manufacturing method of the present invention, since the crystal structure of the superconductor film can be controlled by the crystal structure of the underlying layer, it is possible to form a Josephson element with good controllability in which current flows in the direction of the crystal axis where the current density is high.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の詳細な説明するためのジョセフソン素
子の断面構造で表わした製造工程を示す図、第2図は本
発明の製造方法によって製作されたジョセフソン素子の
斜視図である。 1・・・結晶基板     2・・・フォトレジスト3
・・・窓        4・・・溝5・・・イオンビ
ーム   60.・下地補助膜7・・・第1の超伝導体
電極膜 8・・・第2の超伝導体電極膜
FIG. 1 is a diagram showing the manufacturing process as a cross-sectional structure of a Josephson device for explaining the present invention in detail, and FIG. 2 is a perspective view of the Josephson device manufactured by the manufacturing method of the present invention. 1... Crystal substrate 2... Photoresist 3
...Window 4...Groove 5...Ion beam 60. - Base auxiliary film 7...First superconductor electrode film 8...Second superconductor electrode film

Claims (1)

【特許請求の範囲】[Claims]  結晶基板もしくは結晶膜上に設けた溝上の超伝導体膜
に粒界を形成してジョセフソン接合とするジョセフソン
素子の製造において、前記溝形成後、前記結晶基板もし
くは結晶膜表面に、前記結晶基板もしくは結晶膜と同一
物質もしくは前記超伝導体膜の成長の下地となる物質を
成膜して前記溝の幅を縮小させる工程を含むことを特徴
とするジョセフソン素子の製造方法。
In manufacturing a Josephson device in which grain boundaries are formed in a superconductor film on a groove provided on a crystal substrate or crystal film to form a Josephson junction, after the groove is formed, the crystal is placed on the surface of the crystal substrate or crystal film. A method for manufacturing a Josephson device, comprising the step of reducing the width of the groove by depositing the same material as the substrate or the crystal film, or a material that will serve as a base for the growth of the superconductor film.
JP63036965A 1988-02-18 1988-02-18 Josephson device manufacturing method Expired - Lifetime JPH07120822B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63036965A JPH07120822B2 (en) 1988-02-18 1988-02-18 Josephson device manufacturing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63036965A JPH07120822B2 (en) 1988-02-18 1988-02-18 Josephson device manufacturing method

Publications (2)

Publication Number Publication Date
JPH01211985A true JPH01211985A (en) 1989-08-25
JPH07120822B2 JPH07120822B2 (en) 1995-12-20

Family

ID=12484447

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63036965A Expired - Lifetime JPH07120822B2 (en) 1988-02-18 1988-02-18 Josephson device manufacturing method

Country Status (1)

Country Link
JP (1) JPH07120822B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4109765A1 (en) * 1991-03-25 1992-10-01 Siemens Ag Granular limit Josephson contact element formed on even substrate - has deepened groove-type formation in substrate upper surface acting as granular limit-inducing interference profile formed by two curved lateral flanks
JPH098370A (en) * 1995-06-16 1997-01-10 Hitachi Ltd Oxide superconducting circuit

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4109765A1 (en) * 1991-03-25 1992-10-01 Siemens Ag Granular limit Josephson contact element formed on even substrate - has deepened groove-type formation in substrate upper surface acting as granular limit-inducing interference profile formed by two curved lateral flanks
DE4109765C2 (en) * 1991-03-25 2002-10-10 Siemens Ag Grain boundary Josephson contact element and method for its production
JPH098370A (en) * 1995-06-16 1997-01-10 Hitachi Ltd Oxide superconducting circuit

Also Published As

Publication number Publication date
JPH07120822B2 (en) 1995-12-20

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