JPH01211976A - Manufacture of mis type semiconductor device using gallium arsenide - Google Patents
Manufacture of mis type semiconductor device using gallium arsenideInfo
- Publication number
- JPH01211976A JPH01211976A JP3697188A JP3697188A JPH01211976A JP H01211976 A JPH01211976 A JP H01211976A JP 3697188 A JP3697188 A JP 3697188A JP 3697188 A JP3697188 A JP 3697188A JP H01211976 A JPH01211976 A JP H01211976A
- Authority
- JP
- Japan
- Prior art keywords
- gaas
- semiconductor device
- gallium arsenide
- gallium
- type semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 title claims abstract description 32
- 229910001218 Gallium arsenide Inorganic materials 0.000 title claims abstract description 32
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 16
- 239000004065 semiconductor Substances 0.000 title claims description 11
- 238000000034 method Methods 0.000 claims abstract description 29
- 239000012212 insulator Substances 0.000 claims abstract description 16
- 125000000129 anionic group Chemical group 0.000 claims abstract description 13
- 238000010438 heat treatment Methods 0.000 claims abstract description 9
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 claims abstract description 7
- 229910052733 gallium Inorganic materials 0.000 claims abstract description 7
- 238000000151 deposition Methods 0.000 claims description 8
- 230000000087 stabilizing effect Effects 0.000 claims description 6
- UPWPDUACHOATKO-UHFFFAOYSA-K gallium trichloride Chemical compound Cl[Ga](Cl)Cl UPWPDUACHOATKO-UHFFFAOYSA-K 0.000 claims 1
- 239000000758 substrate Substances 0.000 abstract description 11
- 239000011669 selenium Substances 0.000 abstract description 6
- 229910052731 fluorine Inorganic materials 0.000 abstract description 4
- PXGOKWXKJXAPGV-UHFFFAOYSA-N Fluorine Chemical compound FF PXGOKWXKJXAPGV-UHFFFAOYSA-N 0.000 abstract description 3
- BUGBHKTXTAQXES-UHFFFAOYSA-N Selenium Chemical compound [Se] BUGBHKTXTAQXES-UHFFFAOYSA-N 0.000 abstract description 3
- NINIDFKCEFEMDL-UHFFFAOYSA-N Sulfur Chemical compound [S] NINIDFKCEFEMDL-UHFFFAOYSA-N 0.000 abstract description 3
- 239000011737 fluorine Substances 0.000 abstract description 3
- 229910052711 selenium Inorganic materials 0.000 abstract description 3
- 229910052717 sulfur Inorganic materials 0.000 abstract description 3
- 239000011593 sulfur Substances 0.000 abstract description 3
- KRHYYFGTRYWZRS-UHFFFAOYSA-M Fluoride anion Chemical compound [F-] KRHYYFGTRYWZRS-UHFFFAOYSA-M 0.000 abstract description 2
- 150000004767 nitrides Chemical class 0.000 abstract description 2
- 239000002994 raw material Substances 0.000 description 8
- 210000003815 abdominal wall Anatomy 0.000 description 3
- WUKWITHWXAAZEY-UHFFFAOYSA-L calcium difluoride Chemical compound [F-].[F-].[Ca+2] WUKWITHWXAAZEY-UHFFFAOYSA-L 0.000 description 3
- 150000001875 compounds Chemical class 0.000 description 3
- 229910052698 phosphorus Inorganic materials 0.000 description 3
- JLTRXTDYQLMHGR-UHFFFAOYSA-N trimethylaluminium Chemical compound C[Al](C)C JLTRXTDYQLMHGR-UHFFFAOYSA-N 0.000 description 3
- OAKJQQAXSVQMHS-UHFFFAOYSA-N Hydrazine Chemical compound NN OAKJQQAXSVQMHS-UHFFFAOYSA-N 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 2
- 229910001634 calcium fluoride Inorganic materials 0.000 description 2
- 230000008021 deposition Effects 0.000 description 2
- 238000009826 distribution Methods 0.000 description 2
- 230000005669 field effect Effects 0.000 description 2
- 238000001741 metal-organic molecular beam epitaxy Methods 0.000 description 2
- 239000011574 phosphorus Substances 0.000 description 2
- SPVXKVOXSXTJOY-UHFFFAOYSA-N selane Chemical compound [SeH2] SPVXKVOXSXTJOY-UHFFFAOYSA-N 0.000 description 2
- 229910000058 selane Inorganic materials 0.000 description 2
- 238000003860 storage Methods 0.000 description 2
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 2
- 229910004205 SiNX Inorganic materials 0.000 description 1
- MBGCACIOPCILDG-UHFFFAOYSA-N [Ni].[Ge].[Au] Chemical compound [Ni].[Ge].[Au] MBGCACIOPCILDG-UHFFFAOYSA-N 0.000 description 1
- 238000009825 accumulation Methods 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- ISQINHMJILFLAQ-UHFFFAOYSA-N argon hydrofluoride Chemical compound F.[Ar] ISQINHMJILFLAQ-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000003486 chemical etching Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 description 1
- 238000000354 decomposition reaction Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000002003 electron diffraction Methods 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 238000000171 gas-source molecular beam epitaxy Methods 0.000 description 1
- BHEPBYXIRTUNPN-UHFFFAOYSA-N hydridophosphorus(.) (triplet) Chemical compound [PH] BHEPBYXIRTUNPN-UHFFFAOYSA-N 0.000 description 1
- 230000001678 irradiating effect Effects 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000001451 molecular beam epitaxy Methods 0.000 description 1
- 238000005457 optimization Methods 0.000 description 1
- 230000002265 prevention Effects 0.000 description 1
- 230000006641 stabilisation Effects 0.000 description 1
- 238000011105 stabilization Methods 0.000 description 1
- 238000001947 vapour-phase growth Methods 0.000 description 1
Landscapes
- Formation Of Insulating Films (AREA)
Abstract
Description
【発明の詳細な説明】
（産業上の利用分野）
本発明は半導体装置の製造方法、更に詳しくはヒ化ガリ
ウムを用いたＭＩＳ（金属−絶縁体一半導体）型半導体
装置の製造方法に関する。DETAILED DESCRIPTION OF THE INVENTION (Industrial Application Field) The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of manufacturing a MIS (metal-insulator-semiconductor) type semiconductor device using gallium arsenide.
（従来の技術）
ヒ化ガリウム（以降ＧａＡｓと記す）を用いたＭＩＳ型
半導体装置の特性は絶縁体膜とＧａＡｓとの界面特性に
大きく依存する。従来、良好な界面特性を得る方法とし
ては、絶縁体膜形成前に、■ＧａＡｓ表面を８２、Ｎ２
、ＮＨ３等のプラズマで処理する方法（ジャーナル・オ
ブ・アプライド・フィジクス（Ｊｏｕｒｎａｌ ｏｆ
ｔｈｅ Ａｐｐｌｉｅｄ Ｐｈｙｓｉｃｓ＞ ５□（１
９８１）３５１５−３５１９）、■ＧａＡｓ表面を高純
度流水で処理する方法（アプライド・フィジスク・レタ
ーズ（Ａｐｐｌｉｅｄ Ｐｈｙｓｉｃｓ Ｌｅｔｔｅｒ
ｓ）ｉ止（１９８７） ２５６−２５８ ）等が検討さ
れてきた。これらは、ｎ型ＧａＡｓを用いたＭＩＳ型半
導体装置においてＧａＡｓ表面の過剰Ａｓが表面ポテン
シャルをピンニングしてしまい界面特性を劣化させてし
まうという問題の解決を目的としたものである。(Prior Art) The characteristics of a MIS type semiconductor device using gallium arsenide (hereinafter referred to as GaAs) largely depend on the interface characteristics between an insulating film and GaAs. Conventionally, the method of obtaining good interface properties was to heat the GaAs surface with 82 and N2 before forming the insulator film.
, a method of treatment with plasma such as NH3 (Journal of Applied Physics)
the Applied Physics> 5□(1
981) 3515-3519), ■Method of treating GaAs surfaces with high-purity running water (Applied Physics Letters)
s) i Stop (1987) 256-258), etc. have been studied. These are aimed at solving the problem that in a MIS type semiconductor device using n-type GaAs, excess As on the GaAs surface pins the surface potential and deteriorates the interface characteristics.
（発明が解決しようとする問題点）
しかし、■の場合プラズマ条件によってはＧａＡｓ表面
が損傷を受ける危険性がある。すなわち、プラズマ処理
時間やプラズマ出力条件等の最適化が必要になる。また
■の場合には流水処理後絶縁体膜を形成するまでの間に
ＧａＡｓ表面を大気に晒してはならず特別の工夫が必要
とされ再現性に問題がある。本発明の目的は、再現性の
良い半導体装置の製造方法を得ることにある。(Problems to be Solved by the Invention) However, in the case of (2), there is a risk that the GaAs surface may be damaged depending on the plasma conditions. That is, optimization of plasma processing time, plasma output conditions, etc. is required. In the case of (2), the GaAs surface must not be exposed to the atmosphere after the water treatment and before the insulating film is formed, which requires special measures and there is a problem with reproducibility. An object of the present invention is to obtain a method for manufacturing a semiconductor device with good reproducibility.
（問題を解決するための手段）
本発明は、ヒ化ガリウム上に非酸化物系絶縁体膜を形成
する方法であって、該絶縁体膜形成前にヒ化ガリウム表
面をガリウム安定化面とした後リン（Ｐ）、セレニウム
（Ｓｅ）、硫黄（Ｓ）、フッ素（Ｆ）のうち１つの陰イ
オン性元素を結合させるかまたは陰イオン性元素を含む
ラジカルあるいは分子を吸着させた上にこれに該絶縁体
膜を４５０℃以下で堆積する工程を含むことを特徴とす
るヒ化ガリウムを用いたＭＩＳ型半導体装置の製造方法
を提供するものである。(Means for Solving the Problem) The present invention is a method for forming a non-oxide insulator film on gallium arsenide, in which the gallium arsenide surface is converted into a gallium stabilizing surface before forming the insulator film. After that, one of the anionic elements of phosphorus (P), selenium (Se), sulfur (S), and fluorine (F) is bonded, or radicals or molecules containing anionic elements are adsorbed, and then this is added. The present invention provides a method for manufacturing an MIS type semiconductor device using gallium arsenide, which comprises a step of depositing the insulating film at 450° C. or lower.
（作用）
上記問題を解決するための手段を検討した結果、特許願
６１−１９１３０７．同６１−１９１３７９において記
載した方法などが有用であることを見いだした。すなわ
ち、（１１Ｇ ａ Ａ ｓ基板上に成長させたＧａＡｓ
エピタキシャル成長層の上に絶縁体膜として■腹壁化物
を被着させる工程において該■腹壁化物堆積直前に（１
−１＞Ａｓ原料、■腹壁化物の■族原料、Ｎ原料を順に
供給するかあるいは（１−２）Ｇａ原料、Ｎ原料を順に
供給する方法、または（２１ＧａＡｓ工ピタキシヤル成
長層あるいはＧａＡｓ基板のＡｓ雰囲気中熱処理の後５
００−５５０℃において（２−１）高純度Ｈ２中あるい
は高真空中または（２−２）燐雰囲気中で熱処理を行っ
た後４５０℃以下で非酸化物系絶縁体膜を被着させる方
法を採ることにより比較的簡便に特性の再現性を改善す
ることが可能であった。しがしながら、依然として、再
現性に問題があった。その原因を検討したところ、上記
方法の場合には製造工程の繰り返しに伴い製造装置内の
内壁などにＧ ａ Ａ ｓやＡｓが付着する結実装置内
に制御されないＡｓ分圧が生じ、ＧａＡｓ表面における
過剰Ａｓの生成の防止を意図した上記工程の制御性が悪
化することが分かった。さらにこのＡｓ分圧の変動が過
剰Ａｓ生成の防止に与える影響は、絶縁体膜を堆積させ
るＧａＡｓ表面の状Ｓ（初期状態）によって異ることが
分った。(Operation) As a result of examining means for solving the above problem, we found that patent application No. 61-191307. It has been found that the method described in No. 61-191379 is useful. That is, (GaAs grown on a 11G a As substrate)
Immediately before the deposition of the (1) abdominal wall compound in the step of depositing the (1) abdominal wall compound as an insulating film on the epitaxial growth layer,
-1> A method of sequentially supplying an As raw material, a group II raw material for the abdominal wall compound, and a N raw material, or (1-2) a method of sequentially supplying a Ga raw material and a N raw material, or (21) a method of supplying a Ga raw material and a N raw material in this order, or After heat treatment in atmosphere 5
After heat treatment at 00-550°C in (2-1) high-purity H2 or high vacuum or (2-2) phosphorous atmosphere, a method of depositing a non-oxide insulator film at 450°C or lower. By adopting this method, it was possible to improve the reproducibility of characteristics relatively easily. However, there were still problems with reproducibility. When we investigated the cause of this, we found that in the case of the above method, an uncontrolled As partial pressure occurs in the fruiting device where GaAs and As adhere to the inner walls of the manufacturing device as the manufacturing process is repeated, and It has been found that the controllability of the above process intended to prevent the generation of excess As deteriorates. Furthermore, it has been found that the influence of this As partial pressure fluctuation on prevention of excessive As generation differs depending on the state S (initial state) of the GaAs surface on which the insulating film is deposited.
ＧａＡｓ表面の初期状態をＧａ安定化面とし、Ｐ、Ｓｅ
、Ｓ、Ｆのうちいづれが一つの陰イオン性元素を結合さ
せるかまたは陰イオン性元素を含むラジカルあるいは分
子を吸着させることにより工程の繰り返しに伴い製造装
置内に生ずる制御されないＡｓ分圧の影響を抑制できる
ことを見いだした。すなわち、イオン性から考えてＧａ
との結合がＡｓよりも強いと予想される上記陰イオン性
元素をＧａ安定化面に結合させることにより装置内残留
ＡｓがＧａとの結合することを抑制するわけである。The initial state of the GaAs surface is assumed to be a Ga-stabilized surface, and P, Se
, S, and F combine with one anionic element or adsorb radicals or molecules containing anionic elements, resulting in the influence of uncontrolled As partial pressure that occurs in the production equipment as the process is repeated. We found that it is possible to suppress the In other words, considering the ionicity, Ga
By bonding the anionic element, which is expected to have a stronger bond with Ga than As, to the Ga stabilizing surface, the As remaining in the device is inhibited from bonding with Ga.
本発明では、ＧａＡｓ表面にはあらかじめ自然酸化膜が
含まれぬようＧａＡｓエピタキシャル成長あるいはＧａ
Ａｓ基板のＡｓ雰囲気熱処理による自然酸化膜除去の工
程を行っである。この後ＧａＡｓ表面をＧａ安定化面と
し、陰イオン性元素を結合させておく、絶縁体膜として
は窒化物、フッ化物等非酸化物系絶縁体を４５０℃以下
で堆積するものとする。酸化物系の絶縁体膜はその堆積
がＧａＡｓ表面酸化膜・過剰Ａｓ生成の原因となるため
に除外する。In the present invention, GaAs epitaxial growth or Ga
A natural oxide film removal process was performed on the As substrate by heat treatment in an As atmosphere. Thereafter, the GaAs surface is used as a Ga stabilization surface and an anionic element is bonded thereto. As an insulator film, a non-oxide insulator such as nitride or fluoride is deposited at 450° C. or lower. Oxide-based insulator films are excluded because their deposition causes formation of a GaAs surface oxide film and excess As.
（実施例） 以下、本発明を実施例により説明する。(Example) The present invention will be explained below using examples.
第１や実施例においては非酸化物系絶縁体としてフッ化
カルシウム（ＣａＦ２ ）を用いてＭＴＳ型電界効果ト
ランジスタ（ＭＩ ５ＦＥＴ＞を作製した。また陰イオ
ン性元素としてはセレニウム（Ｓｅ）をガリウム安定化
面に結合させることとした。工程はガスソース分子線エ
ピタキシー（ＭＯＭＢＥ）装置で行った。まず化学的エ
ツチングを行った半絶縁性（，１００） Ｇ ａ Ａ
ｓ基板（ソース。In the first example and the examples, an MTS field effect transistor (MI5FET) was fabricated using calcium fluoride (CaF2) as a non-oxide insulator.Also, as an anionic element, selenium (Se) was used to stabilize gallium. The process was carried out using a gas source molecular beam epitaxy (MOMBE) device. First, chemical etching was performed to form a semi-insulating (,100) G a A
s substrate (source.
ドレインｎ＋コンタクト領域を形成したもの）を装置内
に導入し、Ａｓ分子線（ＡＳ４強度：１ｘ１０ ”Ｃ１
ｌ−２ｓｅｃ−’ ）を照射しながら昇温し６５０℃で
２分間熱処理することにより基板表面の自熱酸化膜を除
去した。次に２００’ Ｃまで降温しくＡｓ分子線照射
は５５０℃で停止した） Ｇ ａ分子線（１ｘ １０１
３ｃ諧−２ｓｅｃ−’ ）を１分間照射後再び６２０℃
まで昇温してＧａ安定化面を得た。このとき反射高速電
子線回折（ＲＨＥＥＤ）パタンは４ｘ６構造を示した。A drain n+ contact region formed) was introduced into the device, and an As molecular beam (AS4 intensity: 1
The autothermal oxide film on the surface of the substrate was removed by increasing the temperature while irradiating the substrate with 1-2 sec-') and performing heat treatment at 650° C. for 2 minutes. Next, the temperature was lowered to 200'C, and As molecular beam irradiation was stopped at 550°C.) Ga molecular beam (1x 101
3c-2sec-') for 1 minute and then heated to 620℃ again.
A Ga-stabilized surface was obtained by increasing the temperature to . At this time, the reflection high-speed electron diffraction (RHEED) pattern showed a 4x6 structure.
引き続き装置内、５００℃でＨｚ Ｓ ｅ （０、０５
ｃｃ／５ｉｎ）を供給し１分間熱処理後降温し４００℃
でＨ２Ｓｅ供給を停止後ＣａＦ２を厚さ５０ｎｍ蒸着し
た。得られたＣａＦ２／ＧａＡｓ試料にアルミニウム（
ＡＩ）を蒸着後バターニングしゲートを形成した。Subsequently, in the apparatus, Hz S e (0,05
cc/5in) was supplied, and after heat treatment for 1 minute, the temperature was lowered to 400°C.
After stopping the supply of H2Se, CaF2 was deposited to a thickness of 50 nm. Aluminum (
After depositing AI), buttering was performed to form a gate.
最後にソース、ドレインｎ＋コンタクト上に金・ゲルマ
ニウム・ニッケル（ＡｕＧｅＮｉ ）電極を形成り、Ｍ
ＩＳＦＢＴとした。本方法で作製したＭＩＳＦＥＴは蓄
積型の動作を示した。ゲート長１μｍのとき相互コンダ
クタンス（ｇｍ）は平均４５ｍ５／ｍｍであり、この平
均ｇｌは１０回の製造回数で±１５％の分布範囲内にあ
り、本実施例が良好な再現性を持つことがわかった。Finally, gold-germanium-nickel (AuGeNi) electrodes are formed on the source and drain n+ contacts, and M
It was named ISFBT. The MISFET manufactured by this method exhibited storage type operation. When the gate length is 1 μm, the average mutual conductance (gm) is 45 m5/mm, and this average gl is within a distribution range of ±15% after 10 manufacturing cycles, which indicates that this example has good reproducibility. Understood.
第２の実施例では非酸化物系絶縁体として窒化アルミニ
ウム（Ａ又Ｎ）をトリメチルアｌレミニウム（ＴＭＡ）
−ヒドラジン（Ｎ２ Ｈ４）系原料により堆積してＭＩ
Ｓ型電界効果トランジスタ（ＭＩＳＦＥＴ）を作製した
。また陰イオン性元素としてはリン（Ｐ）をガリウム安
定化面に結合させることとした。本実施例ではガスソー
ス分子線エピタキシャル（ＭＯＭＢＥ）装置により工程
を行った。第１の実施例と同じＧａＡｓ基板を装置内に
導入し、Ａｓ分子線（Ａｓ４強度：１ｘｌＯ”ｃｌｌｌ
−２ｓｅｃ−１）を照射しながら昇温し６５０″Ｃで２
分間熱処理することにより基板表面の自然酸化膜を除去
した。次に５５０℃″（’Ａｓ分子線を停止した後１分
間Ｈ２（０、１ｃｃ／５ｉｎ）雰囲気中で熱処理を行い
Ｇａ安定化面を得た。引き続きフォスフイン（Ｐ Ｈ３
＋ ０ 、０５ｃｃ／５ｉｎ）を供給しながら４００″
Ｃまで降温した後Ｎ２Ｈ，，ＴＭＡの供給を順に開始し
厚さ１１００ｎのＡ又Ｎ膜を堆積した。本方法で作製し
たＭＩＳＦＥＴは蓄積型の動作を示した。ゲート長１μ
ｍのとき相互コンダクタンス（ｇ−）は平均５０ｍ５／
ａｍであり、この平均ｇ■は１０回製造回数で±１５％
の分布範囲内にあり、本実施例が良好な再現性を持つこ
とがわかった。In the second embodiment, aluminum nitride (A or N) is used as a non-oxide insulator, and trimethylaluminum (TMA) is used as the non-oxide insulator.
- MI by depositing with hydrazine (N2 H4)-based raw material
An S-type field effect transistor (MISFET) was manufactured. Further, as an anionic element, phosphorus (P) was bonded to the gallium stabilizing surface. In this example, the process was performed using a gas source molecular beam epitaxial (MOMBE) apparatus. The same GaAs substrate as in the first embodiment was introduced into the apparatus, and the As molecular beam (As4 intensity: 1xlO"clll
-2sec-1) while raising the temperature to 650″C.
The natural oxide film on the surface of the substrate was removed by heat treatment for a minute. Next, a Ga-stabilized surface was obtained by heat treatment at 550°C (1 minute after stopping the As molecular beam) in an H2 (0.1cc/5in) atmosphere.
+0,05cc/5in) while supplying 400″
After the temperature was lowered to C, supply of N2H, TMA was started in order, and an A or N film with a thickness of 1100 nm was deposited. The MISFET manufactured by this method exhibited storage type operation. Gate length 1μ
When m, the mutual conductance (g-) is on average 50m5/
am, and this average g■ is ±15% for 10 manufacturing times.
It was found that this example had good reproducibility.
第３の実施例では第２の実施例におけるＰＨ３をＨ２Ｓ
（０、０５ｃｃ／ｓｉｎ＞に変えガリウム安定化面に
硫黄（Ｓ）を結合させることとした。本方法で作製した
ＭＩＳＦＥＴは蓄積型の動作を示した。ゲート長１μｍ
のとき相互コンダクタンス（ｇｍ）は平均４５ｍ５／ａ
ｍであり、この平均ｇｌは１０回の製造回数で±１５％
の分布範囲内にあり、本実施例が良好な再現性を持つこ
とがわかった。In the third example, PH3 in the second example was replaced with H2S.
(0.05cc/sin>), we decided to bond sulfur (S) to the gallium stabilizing surface.The MISFET fabricated using this method exhibited accumulation type operation.Gate length: 1 μm
The average mutual conductance (gm) is 45 m5/a when
m, and this average gl is ±15% for 10 manufacturing times.
It was found that this example had good reproducibility.
第４の実施例では第１の実施例におけるＨ２ＳｅをＮ
Ｆ Ｓ （０、０５ｃｃ／ｗｉｎ）に変えガリウム安
定化面にフッ素（Ｆ）を結合させることとした。ただし
この場合ＮＦ、はフッ化アルゴンエキシマ−レーザー光
を用いて分解を行った０本方法で作製したＭＩＳＦＥＴ
は蓄積型の動作を示した。ゲート長１μｍのとき相互コ
ンダクタンス（ｇ■）は平均５０ｍ５／ａｍであり、こ
の平均ｇｍは１０回の製造回数で±１５％の分布範囲内
にあり、本実施例が良好な再現性を持つことがわかりた
。In the fourth example, H2Se in the first example was replaced with N
Instead of F S (0.05 cc/win), fluorine (F) was bonded to the gallium stabilized surface. However, in this case, NF is a MISFET manufactured using the 0-wire method in which decomposition was performed using argon fluoride excimer laser light.
showed an accumulation-type behavior. When the gate length is 1 μm, the mutual conductance (g■) is on average 50 m5/am, and this average gm is within a distribution range of ±15% after 10 manufacturing times, indicating that this example has good reproducibility. I understand.
以上の結果は従来法のうちでも最良の場合の４０％より
も改善されたものである。The above results are an improvement over the best case of 40% among the conventional methods.
実施例においてはＧａＡｓ基板上に直接、絶縁体膜を被
着したが、基板上にＧａＡｓのエピタキシャル成長層を
形成させ、その成長層の表面をＧａ安定化面とした後、
絶縁体膜を形成させても良い、また絶縁体膜としては、
ＣａＦ２やＡＩＮに限られたものではなく、ＳｉＮｘや
ＢＮなど他の酸素を含まない絶縁体膜でも良い。In the example, an insulating film was deposited directly on the GaAs substrate, but after forming an epitaxial growth layer of GaAs on the substrate and making the surface of the growth layer a Ga stabilizing surface,
An insulating film may be formed, and as an insulating film,
The material is not limited to CaF2 or AIN, but may be other oxygen-free insulating films such as SiNx or BN.
絶縁体膜の成長方法も分子線エピタキシー以外の気相成
長方法を用いることができる。A vapor phase growth method other than molecular beam epitaxy can also be used to grow the insulator film.
（発明の効果）
以上に述べたように、本発明によればヒ化ガリウムを用
いたＭＩＳ型半導体装置の製造工程の再現性を向上させ
ることができる。(Effects of the Invention) As described above, according to the present invention, it is possible to improve the reproducibility of the manufacturing process of a MIS type semiconductor device using gallium arsenide.
Claims (1)
ＩＳ型半導体装置を製造する方法であって、該絶縁体膜
形成前にヒ化ガリウム表面をガリウム安定化面とした後
リン（Ｐ）、セレニウム（Ｓｅ）、硫黄（Ｓ）、フッ素
（Ｆ）のうち１つの陰イオン性元素を結合させるかまた
は陰イオン性元素を含むラジカルあるいは分子を吸着さ
せた上にこれに該絶縁体膜を４５０℃以下で堆積する工
程を含むことを特徴とするヒ化ガリウムを用いたＭＩＳ
型半導体装置の製造方法。A non-oxide insulator film is formed on gallium arsenide, and M
A method for manufacturing an IS type semiconductor device, the method comprising: forming a gallium arsenide surface as a gallium stabilizing surface before forming the insulator film; A heat treatment method comprising the step of bonding one of the anionic elements or adsorbing radicals or molecules containing the anionic element, and then depositing the insulating film thereon at 450°C or lower. MIS using gallium chloride
A method for manufacturing a type semiconductor device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3697188A JPH07107936B2 (en) | 1988-02-18 | 1988-02-18 | Method for manufacturing MIS type semiconductor device using gallium arsenide |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3697188A JPH07107936B2 (en) | 1988-02-18 | 1988-02-18 | Method for manufacturing MIS type semiconductor device using gallium arsenide |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH01211976A true JPH01211976A (en) | 1989-08-25 |
| JPH07107936B2 JPH07107936B2 (en) | 1995-11-15 |
Family
ID=12484631
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3697188A Expired - Lifetime JPH07107936B2 (en) | 1988-02-18 | 1988-02-18 | Method for manufacturing MIS type semiconductor device using gallium arsenide |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH07107936B2 (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2001004943A1 (en) * | 1999-07-07 | 2001-01-18 | Matsushita Electric Industrial Co., Ltd. | Multilayered body, method for fabricating multilayered body, and semiconductor device |
| JP2009260325A (en) * | 2008-03-26 | 2009-11-05 | Univ Of Tokyo | Semiconductor substrate, method for manufacturing semiconductor substrate and semiconductor device |
| JP2011091394A (en) * | 2009-10-02 | 2011-05-06 | Imec | Method for manufacturing low defect interface between dielectric, and group iii/v compound |
| JP2013165144A (en) * | 2012-02-10 | 2013-08-22 | Nippon Telegr & Teleph Corp <Ntt> | Method for manufacturing mos structure |
-
1988
- 1988-02-18 JP JP3697188A patent/JPH07107936B2/en not_active Expired - Lifetime
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2001004943A1 (en) * | 1999-07-07 | 2001-01-18 | Matsushita Electric Industrial Co., Ltd. | Multilayered body, method for fabricating multilayered body, and semiconductor device |
| JP2009260325A (en) * | 2008-03-26 | 2009-11-05 | Univ Of Tokyo | Semiconductor substrate, method for manufacturing semiconductor substrate and semiconductor device |
| CN101978503A (en) * | 2008-03-26 | 2011-02-16 | 国立大学法人东京大学 | Semiconductor wafer, method of manufacturing a semiconductor wafer, and semiconductor device |
| JP2011091394A (en) * | 2009-10-02 | 2011-05-06 | Imec | Method for manufacturing low defect interface between dielectric, and group iii/v compound |
| JP2013165144A (en) * | 2012-02-10 | 2013-08-22 | Nippon Telegr & Teleph Corp <Ntt> | Method for manufacturing mos structure |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH07107936B2 (en) | 1995-11-15 |
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