JPH01209841A - Configuration method for communication control processor - Google Patents

Abstract

PURPOSE:To compose the title processor of a component part, parts part and a macro cell part by dividing functions of communication control processing into primitive units, and configurating each primitive processing unit as a separate function block. CONSTITUTION:In the arrival of a processing request from a layer 3 being a host device, a layer 2 uses a layer 3 interface section 12 to receive the request, discriminates the content of request, selects, e.g., a processing section 1 being a processing section in charge of the execution among plural processing sections 1-n and starts the processing section 1. The processing sections 1-n are configurated to execute the content of primitive units (information transmission/ reception procedure between adjacent layers) and the processing section 1 executes the content of job by the data and control of a common section 14. After the execution is finished, the result is replied to a layer 1 via a layer 1 interface section 11.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method of configuring a communication control processing device typified by the 15DN user/network interface/D channel signal protocol LAPD.

[Prior art]

Conventionally, this type of communication processing method is based on the TTC standard "User/Network Interface, 15DN User/Network Interface J.
As shown in JT-Q920, JT-Q921 Telegraph and Telephone Technical Committee
cessProcedure on the D cb
The data link layer specifications, represented by ANNEL), interface to the physical layer (layer 1), which is the adjacent lower layer, transmit and receive bit streams from/to the opposite device, detect flags, detect frames, and perform frame check sequences. (Fe2) It can be roughly divided into low-level processing such as checking and decomposition of each field, and high-level processing such as link management, order control, error control, etc. based on the contents of each field.

The communication control processing device that realizes this is r l5DN.
Subscriber line signal processing device, patent application No. 59-169952 J
As shown in Figure 2, the former lower-level processing was realized by hardware, and the latter higher-level processing was realized by firmware, and the functions were shared.

FIG. 2 shows an example of the configuration of a conventional communication control processing device. In the figure, a signal processing unit (SIG) connects a data link channel (hereinafter referred to as D channel) for each subscriber to a multiplexer (MUX) (not shown).
Individually multiplexed and distributed, it becomes the logical termination of these channels.

In this signaling system LAP-D, information transmitted on the D channel is sandwiched between two flags indicating start and end, and is decomposed into the following four fields. That's the address field.

These are a control field, an information field, and a frame check sequence (Fe2). The address field shows identification information of the subscriber or terminal (D-location), the control field shows information showing the format of the frame to be sent and received, and information showing the regularity and order of the frame, By checking this content, the normality of the procedure is confirmed. The information field is information that is sent to and received from the host device, and information is sent and received with the host device by exchanging primitives. Frame check sequence (Fe2) is a method for detecting bit errors in transmitted and received data.
A frame check sequence (Fe2) pattern is generated on the transmitting side using a certain calculation method, and the receiving side performs calculations including the frame and check sequence (Fe2)'i to obtain a certain residual result. Check the gender.

Among these processes, the logical interface conditions for primitives with higher-level devices are not specified in detail, and CC
ITT specifies only the concept, and detailed interface conditions are determined depending on the various systems.

In FIG. 2, a reception calculation circuit 2 and a transmission calculation circuit 3 generate flags for information to be transmitted and received, generate and extract frame components by detection, and perform a frame check sequence (Fe2).
This is a circuit that checks the generation of holes and turns. Frame information to be input/output to this arithmetic circuit is temporarily stored in a reception buffer 4 and a transmission buffer 5.

Analysis of the fields within the frame information and confirmation of the normality of the frame information are performed by a microprocessor 6 provided in the signal processing unit (SIG) 1. Activation of these processes and transmission and reception of information are performed via an interface circuit 7 under the control of a processing section 8 outside the signal processing section (SIG) 1.

[Problem to be solved by the invention]

However, in the device with the above configuration, the scale of the firmware becomes very large, and it is difficult to loosely couple the interface between the two functional blocks, firmware and 71-ware.

According to system requirements, it has become very difficult to increase circulation and versatility using applicable parts.

An object of the present invention is to provide a device that improves the distribution of the layer 2 portion described above and can be easily applied to other systems.

[Means to solve the problem]

The present invention makes the functional division or functional division of the layer 2 part of the software and firmware into a functional division or division of functions that is not taken into account in the 71-ware and firmware configuration, and by loosely coupling each of them, it is possible to create components. , is a communication control processing system with a configuration that allows macro cellization.

[For production]

When layer 2 (data link layer) receives a processing request from layer 3, which is a higher-level device, it first processes the layer 3 interface.
The processing unit 12 receives the request and determines the content of the request, selects a processing unit, for example, the processing unit 1, to be in charge of execution from among the plurality of processing units, and activates the processing unit 1.

Processing unit 1 = n it, 7' It is configured to execute the contents of a limit tape (information exchange procedure between adjacent layers) unit, and the processing unit 1 executes the contents of its duties using the data and control of the common section. When the execution is finished, a reply to that effect is sent to layer 1 via the layer 1 interface section.

Embodiments of the present invention will be described in detail below with reference to the drawings.

〔Example〕

FIG. 1 shows an example of processing division for the layer 2 portion. The same figure (a
), it can be divided into multiple functions: a system-dependent section, which is a system-specific function section, and a recommendation content-dependent section, which is a function compliant with CCITT recommendations. Further, the recommendation content dependent section can have processing functions divided into a common section having common data and control functions, and a primitive unit.

If the conventional division of software and firmware is viewed as a horizontal division, this example can be said to be a vertical division since it is a division of processing units.

In the conventional system, each divided functional unit had a firmware/hardware interface at a fixed level, but in this example, the interface can be freely set according to the functional content. Therefore, it is possible to determine the optimal allocation of firmware and nodeware for each functional unit, and it is possible to easily create components. Figure 1 (
b) is a functionally divided block diagram of the layer 2 portion. This embodiment represents the functional blocks of the processing device based on the division of functions shown in FIG. 3(a). The trigger for starting processing in layer 2 (data link layer) 10 is either a frame signal from the other device via layer 1 interface section 11 or a frame signal from an upper layer via layer 3 interface section 12. That's it.

The interface section of this layer 2 (data link layer) 10 with the outside is the layer 1 interface x, section 11.
．． In addition to the layer 3 interface section 12, the maintenance test section 13
A processing unit 15-i receives and receives processing request triggers from the outside through these three interface units, determines what kind of processing is requested by them, and handles the requests.
(1≦i≦n). For example, if a request is made by the processing unit 15-
1, the processing unit 15-1 executes the predetermined task content, and upon completion, reports it to the response light via the corresponding interface unit.

The common section 14 is a collection of data etc. that are commonly used by the processing sections 15-1 to 15-n. For example, the transmission state variable V(S), the reception state variable V(
R), various state variables such as confirmation state variable V(A), and state number.

Next, how the functions of the processing units 15-1 to 15-ni are divided will be described. FIG. 3 is a diagram showing the exchange of information between adjacent layers.

Communication between this layer 2 and other layers 2 and adjacent layers is logically performed using these primitives. For example, A2 in FIG. 3 is a primitive related to data link setting from layer 3 to layer 2. This primitive is composed of four types: "request", "display", "response", and "confirmation". Here, "request" means that the upper layer requests a service (operation) from the lower layer, and "display" means that the lower layer requests some service (operation).
This will display what has been executed.

"Response" is for requesting a lower layer to respond to a request from a partner device, and "confirmation" is for sending a confirmation response to an upper layer as a response to a request from a lower layer.

Figure 4 is a block diagram showing processing divisions.
Here are two examples. All of these processes are related to setting the multi-frame operating state.

First, the process I20 is layer 3 (network layer) 21
This is a functional block for processing when a multi-frame operation state setting is requested by a primitive rDL general specification request from After performing "clear", transition to rUA reception standby state, etc., the SABM command (extended asynchronous balanced mode command) is sent to layer 2 (data link layer) 23 of the opposite device 12, so layer 1 (physical layer) 18 and completes the process.

Processing ■24 corresponds to the processing on the other side of processing I20, and is a processing performed by the rPH-data display primitive.
24 is activated, and after performing internal processing such as clearing various internal meters, layer 3 (network layer) 2
5 rDL general constant display primitives, layer 1
(Physical layer) 2,? KrPH-Data Request Primitive" is sent to complete the process.

In this way, one of the processes 1-n is assigned to each primitive, and various primitives are executed according to the command contents.

〔Effect of the invention〕

As explained above, the function division of the layer 2 part is performed by considering the firmware and hardware as one unit, so it is possible to divide the functions into parts for each divided processing device, component network, or macro cell. Methods to increase the distribution of products can be easily introduced. Furthermore, since each functional block in the layer 2 portion can be made into a single function, it is possible to easily design and manufacture parts of appropriate functional units.

[Brief explanation of the drawing]

Fig. 1 is a functional division diagram of the layer 2 part of the present invention, Fig. 2 is a conventional communication control processing device, and Fig. 3 is a diagram of the Zorimitipu list.
FIG. 4 is a processing division diagram. l... Signal processing unit, 10, 19.23... Layer 2
．． 1 No. Layer I interface section, 12 Layer 3 interface section, 13 Maintenance test section, 14
... Common part, 15-1 to 15-n... Processing part 1 to n
116...Device 1, 17...Device fJ, Ill, 2
2...Layer 1.20...Processing! , 21.25...
- Layer 3. 24... Processing ■, 26... Transmission medium. (Q) Layer 2 partial function division diagram Figure 1 (b)

Claims (1)

[Claims] High-level data transmission procedure (H
A method for configuring a communication control processing device to which DLC) is applied, the function of the communication control processing being divided into primitive units,
A method for configuring a communication control processing device, characterized in that primitive processing units are configured as separate functional blocks.