JPH01209746A - Semiconductor device - Google Patents

Abstract

PURPOSE:To make it possible to absorb the stress that is yielded after the mounting of a flip-chip shaped semiconductor device with the ground layer of a bump, by forming the ground layer of the bump with a heat resisting low-stress resin layer and a conductor wiring layer. CONSTITUTION:In a semiconductor device, a barrier metal layer 9 for connecting a solder bump 10 is formed on an Al electrode 2 on the surface of a silicon substrate 1 through the multilayer interconnection layers of a first conductor layer 5, a second polyimide layer 6 and a second conductor layer 7. The first conductor layer 5 is extending on the first polyimide layer from the upper part of the Al electrode 2 and connected to the second conductor layer 7 at a surface P. The Al electrode 2 and the barrier metal layer 9 are connected in a zigzag pattern and have mechanically soft structures. The polyimide has heat resisting property and widely used as a resin that can be formed in a minute pattern. Since the elastic coefficient of the polyimide is about two orders of magnitude lower than those of inorganic materials and metal materials, the yielding stress is small. The polyimide layer 6 that is the low stress resin is thickly formed beneath the solder bump 10.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device, and particularly to a flip-chip type semiconductor device having a solder bump electrode.

[Conventional technology]

FIG. 3 is a sectional view of an example of a conventional semiconductor device.

The semiconductor device includes solder bumps 10 on electrodes 2 provided on the surface of a silicon substrate 1 with barrier metal 9 interposed therebetween.

As the passivation film 3, a silicon oxide film, a nitride film, or a resin passivation film such as polyimide resin has been used in some cases.

[Problem to be solved by the invention]

In the conventional semiconductor device described above, the solder bump electrode is AN
Since the barrier metal is formed directly on the electrode, the structure of the bump underlayer has a function to absorb the mechanical stress that is applied to the connection part after the semiconductor device with the solder bump electrode is mounted on the mounting board. There was no stress, and most of the stress was left to the bump electrode itself.

Generally speaking, when mounting flip-chips, a particular problem in terms of reliability is deterioration of the connection part due to stress caused by the difference in thermal expansion coefficient between the mounting board and the flip-chip. Since the function of absorbing these stresses is very small, there is a problem that the semiconductor device deteriorates.

An object of the present invention is to provide a semiconductor device that does not suffer from deterioration due to stress after solder bumps are connected to a mounting board.

[Means to solve the problem]

The semiconductor device of the present invention includes an Ae electrode formed on one main surface of a semiconductor substrate and a solder bump provided on the semiconductor substrate and connected to the two electrodes. A multilayer wiring layer including a plurality of low stress heat resistant resin layers and at least one conductive layer is provided between the solder bump and the lower electrode.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a sectional view of a first embodiment of the invention.

The semiconductor device includes a first conductive layer 5, a second polyimide layer 6, and a second conductive layer 7 on the ke electrode 2 on the surface of a silicon substrate 1.
A barrier metal layer 9 is formed to connect the solder bumps 10 via the multilayer wiring layer.

The first conductor layer 5 extends from above the Af electrode 2 to the lateral first polyimide layer, and is connected there to the second conductor layer 7 in the P plane.
The N electrode 2 and the barrier metal layer 9 are connected in a zigzag pattern and have a mechanically flexible structure.

Polyimide has heat resistance and is widely used as a resin that can be formed into fine patterns, but compared to inorganic materials and metal materials, polyimide has an elastic modulus of about 2 or less, so the stress generated is small.

It also has the effect of absorbing stress applied from other sources.

In this embodiment, a polyimide layer, which is a low-stress resin, is formed thickly below the solder bumps 10.

In the case of polyimide, the desired thickness can be set by increasing or decreasing the number of resin layers and conductor layers, and the stress varies depending on its elastic modulus and film thickness (for example, the 1981 IEICE General National Conference 1-24 ), in order to obtain an appropriate stress absorption effect and to avoid being influenced by the stress generated by the polyimide itself, the appropriate thickness of the polyimide film is about 20 to 200 μm.

Normally, in the case of polyimide, the thickness of one layer that can be well patterned is about 2 to 20 μm, so in order to obtain a sufficient thickness, it is necessary to have a multilayer structure as in this example.

Furthermore, each conductor layer can have a single layer or multilayer structure that can be formed by sputtering, vapor deposition, or plating.

FIG. 2 is a sectional view of a second embodiment of the invention.

The semiconductor device is similar to the first embodiment in that multilayer wiring is formed using a heat-resistant resin layer and a wiring layer, but the second conductive layer 7 is connected to the barrier metal layer 9 under one solder bump 10 and the second conductive layer 7. 1 conductive layer 5, as well as the other barrier metal layer 9. It also serves as a wiring connected to the surface Q of the first conductive layer 51 or an electrode lead wiring.

When the bump lower structure is formed by a thick low-stress resin layer and electrode lead wiring, there is an effect that the arrangement of the bump electrodes does not need to be limited to vertically above the Al electrodes 2.2fi.

〔Effect of the invention〕

As explained above, the present invention allows the bump underlayer to absorb stress generated after a flip-chip type semiconductor device is mounted by forming the bump underlayer with a heat-resistant, low-stress resin layer and a conductive wiring layer. be able to.

Additionally, it is possible to conduct wiring on the semiconductor chip using the conductor layer, and bump electrodes can be placed anywhere, reducing the need to consider damage to the functional parts of the semiconductor chip. .

Further, as a result, a thick M fat layer can be formed on the surface of the semiconductor chip, and it becomes easy to provide a protective effect on the surface of the semiconductor element and an α-ray shielding effect.

The flip-chip type semiconductor device obtained by the present invention eliminates the need to consider the difference in thermal expansion coefficient with the mounting substrate as in the past, and the bump arrangement and bump size can be freely set, making the chip mounting substrate inexpensive. This makes it possible to use ceramic substrates or resin substrates, and at the same time, it is possible to obtain high connection reliability.

[Brief explanation of the drawing]

FIG. 1 is a sectional view of a first embodiment of the invention, FIG. 2 is a sectional view of a second embodiment of the invention, and FIG. 3 is a sectional view of an example of a conventional semiconductor device. DESCRIPTION OF SYMBOLS 1... Silicon substrate, 2... Ae main electrode 3... Surface protective film, 4... First polyimide layer, 5... First conductive film, 6... Second polyimide layer, 7 ... second conductive layer, 8 ... second polyimide layer, 9 ... barrier metal layer, 10 ... solder bump. Figure 1

Claims (1)

[Claims] In a semiconductor device having an Al electrode formed on one main surface of a semiconductor substrate and a solder bump provided on the semiconductor substrate and connected to the Al electrode, between the Al electrode and the lower electrode of the solder bump. 1. A semiconductor device comprising: a multilayer wiring layer comprising a plurality of low-stress heat-resistant resin layers and at least one conductive layer.