JPH01202898A - Multilayer circuit board - Google Patents

Multilayer circuit board

Info

Publication number
JPH01202898A
JPH01202898A JP63027872A JP2787288A JPH01202898A JP H01202898 A JPH01202898 A JP H01202898A JP 63027872 A JP63027872 A JP 63027872A JP 2787288 A JP2787288 A JP 2787288A JP H01202898 A JPH01202898 A JP H01202898A
Authority
JP
Japan
Prior art keywords
axis
pattern
conductor pattern
circuit board
axis conductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63027872A
Other languages
Japanese (ja)
Inventor
Mitsuo Inagaki
光雄 稲垣
Shigekatsu Kobayashi
小林 茂勝
Hiroyasu Sugiki
杉木 廣安
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP63027872A priority Critical patent/JPH01202898A/en
Publication of JPH01202898A publication Critical patent/JPH01202898A/en
Pending legal-status Critical Current

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  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

PURPOSE:To simplify circuit modification and reduce the cost, by laminating a Y-axis pattern layer and X-axis pattern layer on the backside of a mother circuit board. CONSTITUTION:Y-axis conductor pattern 15 of a Y-axis pattern layer 10 and X-axis conductor pattern 25 of a X-axis pattern layer 20 crosses at their lattice intersecting points, and the positions of the intersecting points correspond to those of through holes 2. the Y-axis conductor pattern 15 and the X-axis conductor pattern 25 are insulated by insulating films 16, 27. In addition, the Y-axis conductor pattern 15 and the through holes 2 are insulated each other by an insulating film 17. And, when lattice intersecting points are selectively pushed and heated, only the insulating films 16, 17, 26, 27 are melted and removed without damaging the frame rims of windows 12, 22 of polyimide films 11, 21, and the Y-axis conductor pattern 15 and the X-axis conductor pattern 25 are thermally bonded, enabling conduction between them. Therefore, by selecting intersecting points of the lattice and connecting the Y-axis conductor pattern 15 and the X-axis conductor pattern 25 at the positions of the intersecting points of the lattice, a plurality of through holes 2 at the desired positions can be connected. Thus, a multilayer circuit substrate suitable for general purposes is obtained.

Description

【発明の詳細な説明】 〔概要〕 母回路基板の裏面にパターン層を貼着した多層回路基板
に関し、 回路変更が容易にでき、汎用性ある低コストの多層回路
基板を捉供することを目的とし、格子交点にそれぞれ窓
を配設したポリイミドフィルム、該ポリイミドフィルム
の裏面のY軸格子上に配設したY軸導体パターン、及び
該Y軸導体パターンの表面を含む該ポリイミドフィルム
の両面の全面に密着した、低耐熱温度性の絶縁膜と、よ
りなるY軸パターン層と、格子交点にそれぞれ窓を配設
したポリイミドフィルム、該ポリイミドフィルムの裏面
のX軸格子上に配設したX軸導体パタ゛=゛ン、及び該
X軸溝体パターンの表面を含む該ポリイミドフィルムの
両面に密着した、低耐熱温度性の絶縁膜と、よりなるX
軸パターン層とが、格子交点の所望の位置にスルーホー
ルを有する、母回路基板の裏面に積層されてなり、選択
した格子交点、及び該スルーホールに対応する格子交点
が加熱押圧されて、該Y軸導体パターンと該X軸溝体パ
ターン、又は該Y軸導体パターン、該X軸溝体パターン
及び該スルーホールとが、熱圧着されてなる構成とする
[Detailed Description of the Invention] [Summary] The present invention relates to a multilayer circuit board in which a pattern layer is attached to the back side of a mother circuit board. , a polyimide film with windows arranged at each grid intersection point, a Y-axis conductor pattern arranged on the Y-axis grid on the back side of the polyimide film, and the entire surface of both sides of the polyimide film including the surface of the Y-axis conductor pattern. A Y-axis pattern layer consisting of an insulating film that is in close contact with a low heat-resistant temperature, a polyimide film with windows arranged at each grid intersection point, and an X-axis conductor pattern arranged on the X-axis grid on the back side of the polyimide film. and an insulating film with low heat-resistant temperature that is in close contact with both surfaces of the polyimide film including the surface of the X-axis groove pattern.
The axial pattern layer is laminated on the back surface of the mother circuit board, which has through holes at desired positions of the grid intersection points, and the selected grid intersection points and the grid intersection points corresponding to the through holes are heated and pressed. The Y-axis conductor pattern and the X-axis groove pattern, or the Y-axis conductor pattern, the X-axis groove pattern, and the through hole are bonded together by thermocompression.

〔産業上の利用分野〕[Industrial application field]

本発明は、母回路基板の裏面にパターン層を貼着した多
層回路基板に関する。
The present invention relates to a multilayer circuit board in which a pattern layer is attached to the back surface of a mother circuit board.

〔従来の技術〕[Conventional technology]

多層回路基板には、樹脂銅張積層板を所望数積層し、両
面、又は両面及び内層に所望の導体パターンをエツチン
グ形成した多層樹脂積層板と、セラミック基板を積層し
両面、又は両面及び内層に所望の導体パターンを形成し
た多層セラミック基板とがある。
For the multilayer circuit board, a desired number of resin copper-clad laminates are laminated, and a desired conductor pattern is etched on both sides or both sides and the inner layer.The multilayer resin laminate is then laminated with a ceramic board and a ceramic board is laminated on both sides or both sides and the inner layer. There is also a multilayer ceramic substrate on which a desired conductor pattern is formed.

これらの回路基板は、スルーホールを介して各層の導体
パターンを接続している。
These circuit boards connect conductor patterns in each layer via through holes.

そして、いずれの多層回路基板も、回路設計時にその導
体パターンの形状が決定され、それに従い各層の導体パ
ターンが形成されている。
In any multilayer circuit board, the shape of the conductor pattern is determined at the time of circuit design, and the conductor pattern of each layer is formed in accordance with the shape.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

したがって、従来の多層回路基板は、製造された後に回
路変更することが非常に困難で、回路変更の融通性が劣
るという問題点があった。
Therefore, the conventional multilayer circuit board has a problem in that it is very difficult to change the circuit after it is manufactured, and flexibility in changing the circuit is poor.

また、内層に導体パターンを有しているので構造が複雑
で、コスト高になる恐れがあった。
Furthermore, since the inner layer has a conductive pattern, the structure is complicated and there is a risk that the cost will be high.

本発明は、このような点に鑑みて創作されたもので、回
路変更が容易にでき、汎用性ある低コストの多層回路基
板を提供することを目的としている。
The present invention was created in view of these points, and an object of the present invention is to provide a versatile, low-cost multilayer circuit board that allows easy circuit changes.

〔課題を解決するための手段〕[Means to solve the problem]

上記の目的を達成するために本発明は、第1図に例示し
たように、Y軸パターン層10を、格子交点にそれぞれ
窓12を配設したポリイミドフィルム11と、それぞれ
のY軸格子上でポリイミドフィルム11の裏面に配設し
たY軸溝体パターン15と、Y軸溝体パターン15の表
面を含むポリイミドフィルム11の両面の全面に密着し
た低耐熱温度性の絶縁膜16.17とで、構成する。
In order to achieve the above object, the present invention, as illustrated in FIG. The Y-axis groove pattern 15 disposed on the back surface of the polyimide film 11 and the low temperature-resistant insulating films 16 and 17 that are in close contact with both surfaces of the polyimide film 11 including the surface of the Y-axis groove pattern 15. Configure.

またX軸パターン層20を、格子交点にそれぞれ窓22
を配設したポリイミドフィルム21と、それぞれのX軸
格子上でポリイミドフィルム21の裏面に配設したXl
1b導体パター ン25と、X軸導体パターン25の表
面を含むポリイミドフィルム21の両面に密着した低耐
熱温度性の絶縁膜26.27とで、構成する。
In addition, the X-axis pattern layer 20 is provided with windows 22 at each grid intersection.
A polyimide film 21 is arranged on the polyimide film 21, and a
It is composed of the 1b conductor pattern 25 and low temperature resistant insulating films 26 and 27 that are closely adhered to both surfaces of the polyimide film 21 including the surface of the X-axis conductor pattern 25.

母回路基板1は、表面に所望の回路パターンを有し、格
子交点の所望の位置に裏面に通ずるスルーホール2を有
する。この母回路基板1の裏面に、Y軸パターン1i1
0とX軸パターン層20とを積層し、選択した格子交点
、及びスルーホール2に対応する格子交点を加熱押圧し
て、Y軸導体パ7−ン15とX軸導体パターン25、又
はY軸溝体パターン15.x軸導体パターン25.及び
スルーホール2とを、熱圧着する構成とする。
The mother circuit board 1 has a desired circuit pattern on its front surface, and has through holes 2 at desired positions of grid intersections that communicate with the back surface. On the back side of this mother circuit board 1, a Y-axis pattern 1i1
0 and the X-axis pattern layer 20 are laminated, and the selected lattice intersection points and the lattice intersection points corresponding to the through holes 2 are heated and pressed to form the Y-axis conductor pattern 7-15 and the X-axis conductor pattern 25, or the Y-axis Groove pattern 15. x-axis conductor pattern 25. and the through hole 2 are bonded together by thermocompression.

〔作用〕[Effect]

上記本発明によれば、Y軸パターン層10のY軸溝体パ
ターン15とX軸パターン層20のX軸導体パターン2
5とは、格子交点で直交し、且つその交点はスルーホー
ル2位置に対応している。また、Y軸溝体パターン15
とX軸導体パターン25とは、絶縁膜16.27により
絶縁状態で直交し、且つスルーホール2とは絶縁膜17
により絶縁されている。
According to the present invention, the Y-axis groove pattern 15 of the Y-axis pattern layer 10 and the X-axis conductor pattern 2 of the X-axis pattern layer 20
5 are orthogonal to each other at the grid intersection, and the intersection corresponds to the through hole 2 position. In addition, the Y-axis groove pattern 15
and the X-axis conductor pattern 25 are orthogonal to each other in an insulated state by the insulating films 16 and 27, and the through hole 2 is insulated by the insulating film 17.
is insulated by

ポリイミドフィルム11.12は、ポリイミド樹脂であ
るので、耐熱温度が高くて熔融温度が高い。
Since the polyimide films 11 and 12 are polyimide resins, they have a high heat resistance and a high melting temperature.

一方、絶縁膜16.1?、26.27は低耐熱温度性で
あるので、比較的低温度で熔融する。
On the other hand, insulating film 16.1? , 26.27 has low heat resistance and therefore melts at a relatively low temperature.

したがって、選択した格子交点を加熱押圧すると、ポリ
イミドフィルム11.21の窓12.22Jの枠縁は損
傷することなく、絶縁膜16.1?、 26.27のみ
が熔融し、除去されてY軸溝体パターン15とX軸道体
パターン25とが熱圧着され導通状態となる。
Therefore, when the selected lattice intersection points are heated and pressed, the frame edge of the window 12.22J of the polyimide film 11.21 is not damaged, and the insulating film 16.1? , 26 and 27 are melted and removed, and the Y-axis groove pattern 15 and the X-axis groove pattern 25 are thermocompressed and brought into electrical continuity.

また、スルーホール2に対応する格子交点を加熱押圧す
ると絶縁膜16.1?、26.27が熔融して、Y軸溝
体パターン15.X軸道体パターン25及びスルーホー
ル2とが熱圧着され、導通状態となる。
In addition, when the grid intersection points corresponding to the through holes 2 are heated and pressed, the insulating film 16.1? , 26 and 27 are melted to form the Y-axis groove pattern 15. The X-axis path body pattern 25 and the through hole 2 are bonded by thermocompression, and are in a conductive state.

よって格子交点を適宜に選択して、その格子交点位置で
Y軸溝体パターン15とX軸道体パターン25とを接続
することにより、所望の位置に設けた複数のスルーホー
ルを接続することができる。
Therefore, by appropriately selecting grid intersection points and connecting the Y-axis groove body pattern 15 and the X-axis groove body pattern 25 at the grid intersection positions, it is possible to connect a plurality of through holes provided at desired positions. can.

即ち、母回路基板1の裏面に貼着したY軸パターンii
o、  x軸パターン層20とで、所望に回路を構成す
ることができ、汎用性ある多層回路基板である。
That is, the Y-axis pattern ii attached to the back surface of the mother circuit board 1
With the o and x-axis pattern layers 20, a circuit can be configured as desired, making it a versatile multilayer circuit board.

〔実施例〕〔Example〕

以下図を参照しながら、本発明を具体的に説明する。な
お、全図を通じて同一符号は同一対象物を示す。
The present invention will be specifically described below with reference to the drawings. Note that the same reference numerals indicate the same objects throughout the figures.

第1図は本発明の一実施例を分離した形で示す斜視図、
第2図(a)、 (b)は本発明の熱圧着工程の断面図
、第3図は本発明の実施例の図で、+8)は裏面視の平
面図、(b)は、第1図及び第3図(a)に示す鎖線X
−X部分の断面図である。
FIG. 1 is a perspective view showing an embodiment of the present invention in separated form;
Figures 2 (a) and (b) are cross-sectional views of the thermocompression bonding process of the present invention, Figure 3 is a diagram of an embodiment of the present invention, +8) is a plan view as viewed from the back, and (b) is a cross-sectional view of the thermocompression bonding process of the present invention. The chain line X shown in the figure and Fig. 3(a)
- It is a sectional view of the X part.

第1図において、1は例えばセラミックよりなる母回路
基板で、表面に所望の回路パタ゛−ンを設け、さらにチ
ップ形回路部品を実装しである。
In FIG. 1, reference numeral 1 denotes a mother circuit board made of, for example, ceramic, on the surface of which a desired circuit pattern is provided and further chip-shaped circuit components are mounted.

母回路基板lには、所定の格子寸法の格子交点の所望の
位置に、裏面に通ずるスルーホール2を設けである。こ
のスルーホール2は例えば30μm程度裏面側に突出し
て、スルーホール突部2Aとなっている。
The mother circuit board l is provided with through holes 2 communicating with the back surface at desired positions of grid intersections of predetermined grid dimensions. This through hole 2 protrudes toward the back side by about 30 μm, for example, to form a through hole protrusion 2A.

また、母回路基板1の裏面には、スルーホール突部2A
を除くそれぞれの格子交点に、誘電体突部3を配設しで
ある。これらの誘電体突部3は、誘電体ペーストをスク
リーン印刷形成したもので、その厚さはスルーホール突
部2Aの高さにほぼ等しい。
Further, on the back side of the mother circuit board 1, a through hole protrusion 2A is provided.
A dielectric protrusion 3 is provided at each lattice intersection except for . These dielectric protrusions 3 are formed by screen printing dielectric paste, and their thickness is approximately equal to the height of the through-hole protrusions 2A.

また、母回路基板1の裏面の4隅には、導体ペーストを
スクリーン印刷形成した、円形のガイド金属膜4を設け
である。このガイド金属膜4の膜厚も、スルーホール突
部2Aの高さにほぼ等しく30μm程度である。
Further, at the four corners of the back surface of the mother circuit board 1, circular guide metal films 4 formed by screen printing a conductive paste are provided. The thickness of this guide metal film 4 is also approximately 30 μm, which is approximately equal to the height of the through-hole protrusion 2A.

11.21は例えば厚さが50μm程度の、母回路基板
1の形状に等しい角形のポリイミドフィルムで、その耐
熱温度は300℃以上である。
Reference numeral 11.21 is a rectangular polyimide film having a thickness of, for example, about 50 μm and having the same shape as the mother circuit board 1, and has a heat resistance temperature of 300° C. or more.

ポリイミドフィルム11には、所定の格子寸法の格子交
点のそれぞれに、−辺が導体パターンの幅にほぼ等しい
角形の窓12を穿設しである。またポリイミドフィルム
21には、格子交点に、窓12と同形の窓22を設けで
ある。
The polyimide film 11 is provided with rectangular windows 12 whose negative side is approximately equal to the width of the conductor pattern at each grid intersection point of a predetermined grid size. Further, the polyimide film 21 is provided with windows 22 having the same shape as the windows 12 at grid intersections.

ポリイミドフィルム31の裏面のそれぞれのY軸格子上
に、例えば、幅が30μmで厚さが70μmのw4箔よ
りなるY軸溝体パターン15を設けである。
On each Y-axis grating on the back surface of the polyimide film 31, a Y-axis groove pattern 15 made of W4 foil having a width of 30 μm and a thickness of 70 μm, for example, is provided.

このY軸溝体パターン15は、ポリイミドフィルム11
に貼着しだ銅箔をエツチングすることにより、容易に得
られる。
This Y-axis groove pattern 15 is made of polyimide film 11.
It can be easily obtained by etching a copper foil adhered to the surface.

また、ポリイミドフィルム11の4隅にガイド孔13を
配設し、それぞれのガイド孔13に対応するポリイミド
フィルム11の裏面側に、銅箔等よりなる金属箔14を
設けである。
Further, guide holes 13 are provided at the four corners of the polyimide film 11, and a metal foil 14 made of copper foil or the like is provided on the back side of the polyimide film 11 corresponding to each guide hole 13.

Y軸溝体パターン15及び金属箔14の表面を含むポリ
イミドフィルム11の裏面には、30μm程度の薄い膜
厚の、例えばポリウレタン樹脂等のような低耐熱温度性
(耐熱温度が80℃〜90℃)の絶縁膜16を張着しで
ある。また、ポリイミドフィルム11の表面にも、同様
に低耐熱温度性の絶縁膜17を張着しである。
The back side of the polyimide film 11, including the surfaces of the Y-axis groove pattern 15 and the metal foil 14, is made of a material having a thin film thickness of about 30 μm and having low heat resistance and temperature resistance such as polyurethane resin (with a heat resistance temperature of 80°C to 90°C). ) is pasted onto the insulating film 16. Further, an insulating film 17 having a low heat resistance is similarly pasted on the surface of the polyimide film 11.

したがって、母回路基板lのガイド金属膜4゜スルーホ
ール突部2八、誘電体突部3に対応するガイド孔13.
窓12部分の絶縁膜17は、他の部分よりも凹んで、金
属箔14又はY軸溝体パターン15に直接付着している
Therefore, the guide metal film 4 of the mother circuit board l has the guide hole 13 corresponding to the through-hole protrusion 28 and the dielectric protrusion 3.
The insulating film 17 at the window 12 portion is recessed more than the other portions and directly adheres to the metal foil 14 or the Y-axis groove pattern 15.

即ちY軸パターン層10は、窓12を有するポリイミド
フィルム11.平行した多数のY軸溝体パターン15、
及び両面の絶縁膜16.17とが密着し一体化されたフ
ィルムである。
That is, the Y-axis pattern layer 10 is a polyimide film 11. having windows 12. A large number of parallel Y-axis groove patterns 15,
This is a film in which the insulating films 16 and 17 on both sides are closely adhered and integrated.

ポリイミドフィルム21の裏面のそれぞれのX軸格子上
に、例えば、幅が30μ−で厚さが70μmの銅箔より
なるX軸溝体パターン25を設けである。
On each X-axis grating on the back surface of the polyimide film 21, an X-axis groove pattern 25 made of copper foil and having a width of 30 μm and a thickness of 70 μm, for example, is provided.

また、ガイド孔13に対応して、4隅にガイド孔23を
配設し、それぞれのガイド孔23に対応するポリイミド
フィルム21の裏面側に、銅箔等よりなる金属箔24を
設けである。
Further, guide holes 23 are provided at the four corners corresponding to the guide holes 13, and metal foils 24 made of copper foil or the like are provided on the back side of the polyimide film 21 corresponding to the respective guide holes 23.

X軸溝体パターン25及び金属箔24の表面を含むポリ
イミドフィルム21の裏面には、30IIm程度の薄い
膜厚の低耐熱温度性の絶縁膜26を張着しである。また
、ポリイミドフィルム21の表面にも、同様に低耐熱温
度性の絶縁膜27を張着しである。
On the back surface of the polyimide film 21 including the surfaces of the X-axis groove pattern 25 and the metal foil 24, an insulating film 26 having a thin film thickness of about 30 IIm and having low heat resistance is pasted. Furthermore, an insulating film 27 having low heat resistance is similarly pasted on the surface of the polyimide film 21.

したがって、母回路基板1のガイド金属膜4゜スルーホ
ール突部2A、誘電体突部3に対応するガイド孔23.
窓22部分の絶縁膜27は、他の部分よりも凹んで、金
属箔24又はX軸溝体パターン25に直接付着している
Therefore, the guide metal film 4 of the mother circuit board 1 has guide holes 23 corresponding to the through-hole protrusions 2A and the dielectric protrusions 3.
The insulating film 27 at the window 22 portion is recessed more than the other portions and directly adheres to the metal foil 24 or the X-axis groove pattern 25.

即ちX軸パターン層20は、窓22を有するポリイミド
フィルム21、平行した多数のX軸溝体パターン25、
及び両面の絶縁膜26.27とが密着し一体化されたフ
ィルムである。
That is, the X-axis pattern layer 20 includes a polyimide film 21 having windows 22, a large number of parallel X-axis groove patterns 25,
This is a film in which the insulating films 26 and 27 on both sides are in close contact and integrated.

上述のように構成したY軸パターン層10及びX軸パタ
ーン層20を、母回路基板lの裏面に積層し、ガイド金
属膜4にガイド孔13を、ガイド孔13の裏面に突出し
た金属箔14にガイド孔23をそれぞれ挿入し、位置合
わせした後に、X軸パターン層20の金属箔24部分を
熱圧着電極を用いて加熱押圧する。
The Y-axis pattern layer 10 and the X-axis pattern layer 20 configured as described above are laminated on the back surface of the mother circuit board l, the guide hole 13 is formed in the guide metal film 4, and the metal foil 14 protrudes from the back surface of the guide hole 13. After inserting the guide holes 23 into each and aligning the positions, the metal foil 24 portion of the X-axis pattern layer 20 is heated and pressed using a thermocompression bonding electrode.

その後、スルーホール2、及び選択した誘電体突部3部
分を、加熱押圧して所望の位置に設けたスルーホール間
を接続する。
Thereafter, the through holes 2 and the selected portions of the dielectric protrusions 3 are heated and pressed to connect the through holes provided at desired positions.

詳述すると、Y軸パターンjiJ10. X軸パターン
層20は、母回路基板lの裏面にガイド孔により位置合
わせされているので、母回路基板1.Y軸パターン層1
0.及びX軸パターン層20は格子が一致した状態で重
層している。
In detail, the Y-axis pattern jiJ10. Since the X-axis pattern layer 20 is aligned with the back surface of the mother circuit board l by the guide hole, the X-axis pattern layer 20 is aligned with the back surface of the mother circuit board l. Y-axis pattern layer 1
0. and the X-axis pattern layer 20 are overlaid with matching lattices.

したがって、母回路基板を裏返して図示した第2図(a
lに示すように、母回路基板lの裏面に突出したスルー
ホール突部2への直上に、Y軸パターン層IOの窓12
、及びX軸パターン層20の窓22が位置している。そ
して窓12内には、上下の両面が絶縁膜16.17で挟
まれたY軸溝体パターン15が走行し、窓22内には、
上下の両面が絶縁膜26.27で挟まれたX軸溝体パタ
ーン25が走行している。
Therefore, FIG. 2 (a) shows the mother circuit board upside down.
As shown in FIG. 1, a window 12 of the Y-axis pattern layer IO is placed directly above the through-hole protrusion 2 protruding from the back surface of the mother circuit board l.
, and the windows 22 of the X-axis pattern layer 20 are located. Inside the window 12, a Y-axis groove pattern 15 whose upper and lower surfaces are sandwiched between insulating films 16 and 17 runs, and inside the window 22,
An X-axis groove pattern 25, whose upper and lower surfaces are sandwiched between insulating films 26 and 27, runs.

よって、第2図中)の如くに、熱圧着電極30を用いて
、スルーホール2に対応する窓22部分を押圧すると、
窓22.12部分の絶縁膜27.26.17.16がそ
れぞれ熔融し除去され、スルーホール突部2A、 Y軸
溝体パターン15.X軸溝体パターン25が熱圧着して
、一体化し導通ずる。
Therefore, as shown in FIG. 2), if the thermocompression electrode 30 is used to press the window 22 portion corresponding to the through hole 2,
The insulating films 27, 26, 17, and 16 in the window 22.12 portion are melted and removed, respectively, and the through-hole protrusion 2A and the Y-axis groove pattern 15. The X-axis groove pattern 25 is bonded by thermocompression to become integrated and electrically conductive.

また、図示してないが選択した格子交点、即ち選択した
誘電体突部3に対応するの窓22部分を熱圧着電極30
で押圧すると、窓22.12部分の絶縁膜27.26.
17.16がそれぞれ熔融し除去され、Y軸溝体パター
ン15とX軸溝体パターン25とが熱圧着して導通する
Further, although not shown, the selected lattice intersection point, that is, the window 22 portion corresponding to the selected dielectric protrusion 3 is connected to the thermocompression bonded electrode 30.
When pressed, the insulating film 27, 26 .
17 and 16 are respectively melted and removed, and the Y-axis groove pattern 15 and the X-axis groove pattern 25 are thermocompressed and electrically connected.

上記の如くして得られた、多層回路基板の回路の一例を
第3図に示す。
An example of the circuit of the multilayer circuit board obtained as described above is shown in FIG.

第3図において、ガイド金属膜4.金属箔14.24を
熱圧着して、母回路基板1の裏面にY軸パターン層10
が密着させ、Y軸パターン層10の上にX軸パターン1
!20が密着させである。
In FIG. 3, the guide metal film 4. A Y-axis pattern layer 10 is formed on the back surface of the mother circuit board 1 by thermocompression-bonding metal foils 14 and 24.
The X-axis pattern 1 is placed on the Y-axis pattern layer 10.
! 20 means close contact.

母回路基板lの上′部の互いに異なる格子上にあるスル
ーホール2−1とスルーホール2−2と全接続するため
に、それぞれのスルーホール2−1 、2−2部分を熱
圧着してスルーホール導体、Y軸溝体パターン15及び
X軸溝体パターン25を接続している。
In order to fully connect the through holes 2-1 and 2-2 on different grids on the upper part of the mother circuit board l, the through holes 2-1 and 2-2 are bonded by thermocompression. The through-hole conductor, the Y-axis groove pattern 15 and the X-axis groove pattern 25 are connected.

そして、スルーホール2−1を通過するX軸格子と、ス
ルーホール2−2を通過するY軸格子との格子交点3−
1を熱圧着して、Y軸溝体パターン15とX軸溝体パタ
ーン25とを接続している。
Then, a lattice intersection 3- between the X-axis lattice passing through the through hole 2-1 and the Y-axis lattice passing through the through hole 2-2.
1 is thermocompressed to connect the Y-axis groove pattern 15 and the X-axis groove pattern 25.

また、母回路基板1の左下部の互いに異なる格子上にあ
るスルーホール2−3とスルーホール2−4とを接続す
るために、それぞれのスルーホール2−3.2−4部分
を熱圧着してスルーホール導体、Y軸溝体パターン15
及びX軸溝体パターン25を接続し、スルーホール2−
3を通過するY軸格子と、スルーホール2−4を通過す
るX軸格子との格子交点3−3を熱圧着して、Y軸溝体
パターン15とX軸溝体パターン25とを接続している
In addition, in order to connect the through holes 2-3 and 2-4 located on different grids at the lower left of the mother circuit board 1, the respective through holes 2-3 and 2-4 were bonded by thermocompression. Through-hole conductor, Y-axis groove pattern 15
and the X-axis groove pattern 25, and through-hole 2-
The Y-axis groove pattern 15 and the X-axis groove pattern 25 are connected by thermocompression bonding the lattice intersection point 3-3 between the Y-axis grating passing through the through hole 2-4 and the X-axis grating passing through the through hole 2-4. ing.

さらにまた、スルーホール2−3と同一のX軸導体パタ
ーン25上にあるスルーホール2−5と他のスルーホー
ル2−6とを接続するために、それぞれのスルーホール
2−5.2−6部分を熱圧着してスルーホール導体、Y
軸導体パターン15及びX軸溝体パターン25を接続し
、スルーホール2−5を通過するX軸格子と、スルーホ
ール2−6を通過するY軸格子との格子交点3−5を熱
圧着して、Y軸導体パターン15とX軸溝体パターン2
5とを接続している。
Furthermore, in order to connect the through hole 2-5 and the other through hole 2-6 on the same X-axis conductor pattern 25 as the through hole 2-3, each through hole 2-5, 2-6 Heat-bond the parts and make a through-hole conductor, Y
The axial conductor pattern 15 and the X-axis groove pattern 25 are connected, and the lattice intersection points 3-5 of the X-axis lattice passing through the through-hole 2-5 and the Y-axis lattice passing through the through-hole 2-6 are bonded by thermocompression. Then, the Y-axis conductor pattern 15 and the X-axis groove pattern 2
5 is connected.

なお、スルーホール2−3とスルーホール2−5とは、
同一のX軸導体パターン25上にあるので、スルーホー
ル2−3とスルーホール2−5との間にカット部40を
設けて、Y軸パターン層10及びX軸パターン層20を
切断し、スルーホール2−3と2−5とが導通しないよ
うにしている。
In addition, through hole 2-3 and through hole 2-5 are as follows.
Since they are on the same X-axis conductor pattern 25, a cut portion 40 is provided between the through hole 2-3 and the through hole 2-5, and the Y-axis pattern layer 10 and the X-axis pattern layer 20 are cut. The holes 2-3 and 2-5 are prevented from being electrically connected.

実施例に示す誘電体突部は、必ずしも必要のものではな
いが、誘電体突部を設けた方が、熱圧着作業の信卸度が
高い。
Although the dielectric protrusions shown in the embodiments are not necessarily necessary, providing the dielectric protrusions increases the reliability of thermocompression bonding work.

なお、図示例は、母回路基板1の表面のみに回路パター
ンIAを設けたものであるが、母回路基板1の表裏の両
面に回路パターンが形成されたものに適用できることは
いうまでもない。
In the illustrated example, the circuit pattern IA is provided only on the front surface of the mother circuit board 1, but it goes without saying that the present invention can be applied to a mother circuit board 1 in which circuit patterns are formed on both the front and back surfaces.

また、母回路基板は、セラミック基板に限らずl樹脂銅
張積層板に適用できるものである。
Further, the mother circuit board is not limited to a ceramic board, but can be applied to a resin copper-clad laminate.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、母回路基板の裏面にY軸
パターン層とX軸パターン層とを積層した多層回路基板
であって、回路変更が容易にできるばかりでなく、汎用
性あって低コストである等、実用上で優れた効果がある
As explained above, the present invention is a multilayer circuit board in which a Y-axis pattern layer and an It has excellent practical effects such as low cost.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例を分離した形で示す斜視図、 第2図(al、 (b)は本発明の熱圧着工程の断面図
、第3図は本発明の実施例の図で、 (a)は裏面視の平面図。 (b)は断面図である。 図において、 lは母回路基板、 2.2−1.2−2.2−3.2−4.2−5.2−6
はスルーホール、2Aはスルーホール突部、 3は誘電体突部、 4はガイド金属膜、 10はY軸パターン層、 20はX軸パターン層、 11、21はポリイミドフィルム、 12、22は窓、 13、23はガイド孔、 14、24は金属箔、 15はY軸導体パターン、 25はX軸導体パターン、 16、1?、 26.27は絶縁膜を示す。 辺ノ (b) ホ俗明必需升箋丁程の断面口 ′#2 口
FIG. 1 is a perspective view showing an embodiment of the present invention in separated form, FIG. 2 (al) and (b) are cross-sectional views of the thermocompression bonding process of the present invention, and FIG. (a) is a plan view as viewed from the back. (b) is a cross-sectional view. In the figure, l is a mother circuit board, 2.2-1.2-2.2-3.2-4.2- 5.2-6
2A is a through hole, 2A is a through hole protrusion, 3 is a dielectric protrusion, 4 is a guide metal film, 10 is a Y-axis pattern layer, 20 is an X-axis pattern layer, 11 and 21 are polyimide films, 12 and 22 are windows , 13 and 23 are guide holes, 14 and 24 are metal foils, 15 is a Y-axis conductor pattern, 25 is an X-axis conductor pattern, 16, 1? , 26.27 indicates an insulating film. Side (b) Cross-sectional opening of the necessary square paper '#2 Mouth

Claims (1)

【特許請求の範囲】  格子交点にそれぞれ窓(12)を配設したポリイミド
フィルム(11)、該ポリイミドフィルム(11)の裏
面のY軸格子上に配設したY軸導体パターン(15)、
及び該Y軸導体パターン(15)の表面を含む該ポリイ
ミドフィルム(11)の両面の全面に密着した、低耐熱
温度性の絶縁膜(16,17)と、よりなるY軸パター
ン層(10)と、 格子交点にそれぞれ窓(22)を配設したポリイミドフ
ィルム(21)、該ポリイミドフィルム(21)の裏面
のX軸格子上に配設したX軸導体パターン(25)、及
び該X軸導体パターン(25)の表面を含む該ポリイミ
ドフィルム(21)の両面に密着した、低耐熱温度性の
絶縁膜(26,27)と、よりなるX軸パターン層(2
0)とが、 格子交点の所望の位置にスルーホール(2)を有する、
母回路基板(1)の裏面に積層されてなり、選択した格
子交点、及び該スルーホール(2)に対応する格子交点
が加熱押圧されて、該Y軸導体パターン(15)と該X
軸導体パターン(25)、又は該Y軸導体パターン(1
5),該X軸導体パターン(25)及び該スルーホール
(2)とが、熱圧着されてなることを特徴とする多層回
路基板。
[Scope of Claims] A polyimide film (11) with windows (12) arranged at each grid intersection point, a Y-axis conductor pattern (15) arranged on the Y-axis grid on the back side of the polyimide film (11),
and a Y-axis pattern layer (10) consisting of a low temperature-resistant insulating film (16, 17) that is in close contact with the entire surface of both surfaces of the polyimide film (11), including the surface of the Y-axis conductor pattern (15). and a polyimide film (21) with windows (22) arranged at each grid intersection, an X-axis conductor pattern (25) arranged on the X-axis grid on the back side of the polyimide film (21), and the X-axis conductor. An X-axis pattern layer (2) consisting of low temperature resistant insulating films (26, 27) closely adhered to both surfaces of the polyimide film (21) including the surface of the pattern (25).
0) has a through hole (2) at the desired position of the grid intersection point,
The Y-axis conductor pattern (15) and the
The axial conductor pattern (25) or the Y-axis conductor pattern (1
5) A multilayer circuit board characterized in that the X-axis conductor pattern (25) and the through hole (2) are bonded together by thermocompression.
JP63027872A 1988-02-09 1988-02-09 Multilayer circuit board Pending JPH01202898A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63027872A JPH01202898A (en) 1988-02-09 1988-02-09 Multilayer circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63027872A JPH01202898A (en) 1988-02-09 1988-02-09 Multilayer circuit board

Publications (1)

Publication Number Publication Date
JPH01202898A true JPH01202898A (en) 1989-08-15

Family

ID=12232991

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63027872A Pending JPH01202898A (en) 1988-02-09 1988-02-09 Multilayer circuit board

Country Status (1)

Country Link
JP (1) JPH01202898A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6812060B1 (en) 1999-10-18 2004-11-02 Sony Chemicals Corporation Multilayer flexible wiring boards and processes for manufacturing multilayer flexible wiring boards

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6812060B1 (en) 1999-10-18 2004-11-02 Sony Chemicals Corporation Multilayer flexible wiring boards and processes for manufacturing multilayer flexible wiring boards

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