JPH01197886A - Picture signal processor - Google Patents

Abstract

PURPOSE:To prevent the deterioration of a picture and the reduction of data compressibility by referring to all or a part of picture patterns in mXn matrix where (m) and (n) are integers to represent the circumference of the matrix, (m)>=3, and (n)>=4, respectively, and outputting a binarization signal from which notches and isolated points are eliminated. CONSTITUTION:A locally expanded area is enlarged to an 4X4 matrix area, 12 picture elements on the circumference of an object picture element are extracted out of the area, and the binarization signal corresponding to the extracted pattern is outputted. Consequently, the pattern of the object picture element can be recognized more, and notch eliminating accuracy and duplex isolated point eliminating accuracy can be improved. Thus, reading picture quality can be improved, and at a picture information filing device, where the binarization signal is supplied, the data compressibility can be improved.

Description

[Detailed Description of the Invention] [Object of the Invention] (Industrial Application Field) The present invention is used, for example, in a document reading device that two-dimensionally reads a document to be filed in an image information filing device. The present invention relates to an image signal processing device that binarizes a read image signal.

(Prior Art) Conventionally, an image signal processing device used in a document reading device in an image information file device is configured to binarize image information of a document, such as characters, using a binarization means.

However, when a character portion of a document is to be binarized, isolated points are removed using image data of a 3×3 matrix surrounding the target pixel. For this reason, processing for notches is not performed, which may cause image quality deterioration during reading, and furthermore, the data compression rate of the image information file device that outputs the reading results may be reduced. There was a problem.

That is, the above-mentioned notch, as shown in FIG. 6(a),
In the case of digital reading, it is an unevenness that occurs at the border between white and black in an image, and isolated points are irregularities that occur at the border between white and black in the image, and isolated points are irregularities that occur at the border between white and black in the image. ,
One pixel among the black pixels is in a white state.

The image information filer to which the document reading device is connected compresses the supplied image signal as a read signal and records it on an optical disk or the like. Since this data compression captures and encodes a single change in black and white, the presence of notches, isolated points, etc. reduces the data compression rate and reduces the capacity of the optical disc. Furthermore, notches and isolated points also lead to a deterioration in the quality of the read image.

However, in conventional local area expansion within a 3x3 matrix range, isolated points can be removed; however,
There were cases in which double isolated points and notches were not removed.

For example, as shown in FIG.
When notch removal processing is performed by local expansion of area 3, image pattern B is obtained in which the target pixel at the center of the matrix is reversed from a white pixel to a black pixel, and 3X of image pattern C is obtained.
When notch removal processing is performed by local expansion of area 3, an image pattern D is obtained in which the target pixel at the center of the matrix is reversed from a black pixel to a white pixel, and the 3×
When the isolated point removal process is performed in the local expansion of area 3, an image pattern F is obtained in which the target pixel at the center of the matrix is reversed from a white pixel to a black pixel.

However, when continuous notches as shown in Figure 8(a) occur, even if notch removal processing is performed, the image pattern after processing will have black and white protrusions as shown in Figure 8(b). The situation is simply reversed, and as a result, the notch is not removed.

Therefore, it is impossible to reliably remove notches and isolated points, resulting in deterioration of the read image and a reduction in the data compression rate.

(Problems to be Solved by the Invention) As mentioned above, it is possible to eliminate the drawback that notches and isolated points cannot be reliably removed, which may cause deterioration of read images and reduction in data compression rate. It is an object of the present invention to provide an image signal processing device that can reliably remove notches and isolated points, prevent image deterioration, and prevent reduction in data compression rate.

[Structure of the Invention] (Means for Solving the Problem) The image signal processing device of the present invention includes a first output means for outputting an image signal, and a target pixel supplied from the first output means. , with reference to all or part of the image pattern in an m×n matrix where m is an integer of 3 or more and n is an integer of 4 or more around the notch,
and second output means for removing isolated points and outputting a binary signal.

(Operation) This invention outputs an image signal by the first output means, and for a target pixel supplied from the first output means; m× which is an integer greater than or equal to
This system outputs a binarized signal from which notches and isolated points have been removed by referring to all or part of the image pattern in the n matrix.

(Example) Hereinafter, an example of the present invention will be described with reference to the drawings.

FIG. 1 schematically shows a document reading device according to the present invention. That is, a document table (transparent glass) 1 that supports a document O is fixed to the upper surface of the main body (not shown). The document O placed on the document table 1 is illuminated by a fluorescent light (exposure lamp) 2, a light focusing lens 3, a line image sensor (
An optical system 8 consisting of a CCD (CCD) 4, an amplifier 5, an A/D converter 6, and a fluorescent light source 7 reciprocates in the direction of arrow e along the lower surface of the document table 1, and exposure scanning is performed during the reciprocation. It looks like this. The light reflected from the original O by the scanning of the optical system 8, that is, the light reflected from the original 0 by the light irradiation of the fluorescent lamp 2, passes through the light focusing lens 3 and is guided to the line image sensor 4, where the image of the original O is reflected. is imaged on the line image sensor 4.

The line image sensor 4 converts the formed image into an electrical signal and outputs it to an A/D conversion circuit 6 via an amplifier 5. This A/D conversion circuit 6 includes an amplifier 5
The signal supplied from the line image sensor 4 is converted into a digital signal and output to the black level correction circuit 9. The black level correction circuit 9 corrects the black level of the supplied digital signal and outputs it to the shading correction circuit 10. That is, the black level correction circuit 9 detects the deviation of the black level by the line image sensor 4 using excess light due to leakage light, etc., and adjusts the actual black level according to the detection result before starting reading scanning of the original. It is designed to correct the black level when scanning originals.

The shading correction circuit 10 performs shading correction on the supplied digital signal (and outputs it to the binarization pre-processing circuit 11).

The binarization pre-processing circuit 11 emphasizes edge components (high frequency components) using a high frequency emphasis circuit (not shown) and cuts high frequencies using a low pass filter (not shown) for the signal supplied from the shading correction circuit 10. This circuit performs processing in parallel and outputs it to the selector 12. Further, the binarization pre-processing circuit 11 converts the signal supplied from the shading correction circuit 10 into a text/photo automatic discrimination circuit 1.
3 and the white peak hold circuit 14.

The character/photo automatic discrimination circuit 13 determines whether a plurality of supplied signals, that is, a signal in a predetermined area, is a text portion or a photo portion based on the state of the signal in a predetermined area, for example, the manner and degree of change in signal level in a 3×3 matrix expansion. A selection signal as a result of this discrimination is output to the selector 12. The selector 12 outputs a high-frequency cut signal when the selection signal from the automatic text/photo discrimination circuit 13 is for a text portion, and outputs a signal with edge components emphasized when the selection signal is for a photo portion. The output is output to the binarization circuit 15.

The white peak hold circuit 14 holds the peak value of the signal (white signal) from the binarization preprocessing circuit 11, and is composed of, for example, a latch circuit, a comparator, etc. (not shown). . The output of this white peak hold circuit 14 is output to a binarization threshold generation circuit 16.

The binarization threshold generation circuit 16 receives a density setting signal, a gradation setting signal, a reading mode signal for character reading or photo reading, a peak value from the white peak hold circuit 14, and a gradation setting signal supplied from the CPU 20, which will be described later. A binarized signal fed back from the binarization circuit 15 (binarized signal of the previous pixel), a binarized signal of a specific pixel fed back from the binarization post-processing circuit 17 (described one line before), The binarization threshold is set by the binarization circuit (the binarization signal of the pixel in the previous line) and the dither binary threshold corresponding to the gradation. 1 output means) 15.

For example, in the case of character reading, the density setting signal supplied from the CPU 20, the peak value from the white peak hold circuit 14, the binarization circuit 15 and the binarization post-processing circuit (second output means) 17 A simple binary threshold corresponding to the binary signal fed back from the CPU 20 is output, and in the case of photo reading, a dither binary threshold corresponding to the density setting signal and gradation setting signal supplied from the CPU 20 is output. It looks like this.

The binarization circuit 15 compares the image signal supplied from the selector 12 with a threshold value (simple binary threshold value or dithered binary threshold value) supplied from the binarization threshold generation circuit 16. This is a circuit that performs binarization by doing this. For example, the white signal is set to "1" and the black signal is set to "0". The output of the binarization circuit 15 is supplied to a binarization post-processing circuit 17.

This binarization post-processing circuit (output means) 17 is a C
When the PU 20 specifies photo reading, the binary signal supplied from the binarization circuit 15 is output as is, and when the text reading is specified, the binarization circuit 15 outputs the binary signal supplied from the binarization circuit 15 as is.
This is to output a binary signal after removing isolated points and notches from the binary signal supplied from the converter.

The binarization post-processing circuit 17 also includes a CPU 2 which will be described later.
"Normal J (200ppi)" as reading density from 0
is specified, a signal obtained by performing the 2-pixel OR of the binarized signal is output, and the reading density is set to ``Fine J (4
00ppL), a signal that does not perform the two-pixel OR of the binarized signal is output.

As shown in FIG. 2, the binarization post-processing circuit 17 includes four
A local expansion unit 31 outputs a binary signal of 12 pixels in a 4-line line, that is, a 4×4 area (4 lines in the same column), and a pattern and reading of the 12-pixel binary signal locally expanded in this local expansion unit 31. a filtering unit (for example, composed of a ROM) 32 that outputs data obtained by removing notches and isolated points from the target pixel according to the density, and outputs the binarized signal of the target pixel as it is; The data selection section 33 selects data from the CPU 20 according to the reading mode and reading density supplied from the CPU 20 and outputs the selected data to a serial/parallel conversion circuit 18, which will be described later.

As shown in FIG. ,1
2, 13, 14, 15) are expanded locally.

When the reading mode is text, the data selection section 33 selects a notch or a
Select and output the signal that has undergone isolated point removal processing,
When the reading mode is a photograph, the signal passed through the filtering section 32 is selected and output.

The local expansion unit 31 includes delay circuits 41.42.43.4
4.45.46.47.4B, 49.50.51.52
．． 53, 54, buffers 61, 62, and 63, and line buffers 65, 66, and 67 that store one line of image signals (binarized signals).

That is, the binarized signal supplied from the binarization circuit 15 is supplied to the delay circuit 44 and line buffer 65 via the delay circuit 41 and buffer 61. The output of the delay circuit 41 is sent to the delay circuit 43 via the delay circuit 42.
is supplied to The output of the delay circuit 44 is
5, and is supplied to the delay circuit 48 and line buffer 66 via the buffer 62. The output of the delay circuit 44 is supplied to a delay circuit 47 via delay circuits 45 and 46. The output of the delay circuit 48 is transmitted via the delay circuit 49 and the buffer 63 to the delay circuit 52 and the line buffer 6.
7. The output of the delay circuit 48 is supplied to the delay circuit 51 via delay circuits 49 and 50. The output of the delay circuit 52 is transmitted to the delay circuit 5 through a delay circuit 53.
4.

As a result, the binarized signal supplied from the binarization circuit 15 corresponds to pixel "1", the output of the delay circuit 41 corresponds to pixel "5", and the output of the delay circuit 42 corresponds to pixel "9". , the output of the delay circuit 43 corresponds to pixel "13", the output of the delay circuit 44 corresponds to pixel "2", and the output of the delay circuit 45 corresponds to pixel "2".
The output of the delay circuit 46 corresponds to the pixel "6", the output of the delay circuit 46 corresponds to the pixel "rlOJ" (target pixel), the output of the delay circuit 47 corresponds to the pixel "14", and the output of the delay circuit 48 corresponds to the pixel "14".
3", the output of the delay circuit 49 corresponds to pixel "7", the output of delay circuit 50 corresponds to pixel "11", the output of delay circuit 51 corresponds to pixel "15", and the output of delay circuit 49 corresponds to pixel "15".
The output of the delay circuit 52 corresponds to pixel "4", the output of the delay circuit 52 corresponds to pixel "8", and the output of the delay circuit 53 corresponds to pixel "12".
Correspondingly, the output of the delay circuit 54 corresponds to pixel "16".

The binarized signal from the binarization post-processing circuit 17, that is, the data selection section 33, is output to the serial/parallel conversion circuit 18.

The signal converted into a parallel signal by the serial/parallel conversion circuit 18 is outputted to a control unit (not shown) of a host computer, such as an image information file device (not shown), via an interface circuit 19. .

Further, the CPU 20 as a control section controls the entire system according to a line synchronization signal (LSYNC) from the master timing circuit 21. That is, driver 22
By controlling the above, the pulse motor 23 that moves the upper optical system 8 is driven, and by controlling the fluorescent light power source 7, the fluorescent light 2 is turned on. Further, the CPU 20 outputs a density designation signal corresponding to the density set by the operator panel 26 to the binarization threshold generation circuit 16, and also outputs the reading mode and reading density for photographs and characters set by the operator panel 26. Above 2
The signal is output to a digitization threshold generation circuit 16 and a binarization post-processing circuit 17.

Further, the CPU 20 controls the memory in the memory backup circuit 25 to preset parameters for the entire circuit and manage the history of the device over time.

Next, the operation in the above configuration will be explained. That is, the operator selects a photo, character mode, density, resolution (reading density), gradation, etc. using the operator panel 28, and places the original O on the original table 1.

Then, the CPU of the external image information file device
When a 15th order signal to start document reading is supplied to the CPU 20 via the interface circuit 19 (not shown), the CPU 20 controls the driver 22 to move the optical system 8 and also controls the fluorescent light power source 7. By turning on the fluorescent lamp 2, the light from the fluorescent lamp 2 is irradiated onto the original O'', and the reflected light from the original O is guided to the line image sensor 4 via the light converging lens 3.

Then, the line image sensor 4 converts the image formed by the guided light into a corresponding electrical signal, and outputs it to the A/D conversion circuit 6 via the amplifier 5. This A/D
The conversion circuit 6 converts the signal supplied from the line image sensor A via the amplifier 5 into a digital signal, and outputs the digital signal to the black level correction circuit 9. The black level correction circuit 9 corrects the black level of the supplied digital signal and outputs it to the shading correction circuit 10.

This shading correction circuit 10 disturbs the shading correction for the supplied digital signal and outputs it to the binarization pre-processing circuit 11. Then, the binarization preprocessing circuit 11 outputs to the selector 12 a signal in which the edge components of the supplied signal are emphasized and a signal in which only a predetermined frequency component is passed.

Further, the binarization pre-processing circuit 11 converts the signal supplied from the shading correction circuit 10 into a character/photo judgment circuit 11.
3' and output to the white peak hold circuit 14.

As a result, the white peak hold circuit 14 holds the peak value of the signal (white signal) from the binarization preprocessing circuit 11, and this output is output to the binarization threshold generation circuit 16. Further, the automatic character/photo discrimination circuit 13 determines whether the area is a character portion or a photograph portion based on the manner and degree of change in signal level in matrix expansion of a predetermined area, and outputs a selection signal as a result of this determination to the selector 12. be done. Then, the selector 12 selects the character/photo automatic discrimination circuit 13.
When the selection signal from the text part is a text part, the high frequency cut processed signal is output to the binarization circuit 15, and when the selection signal is a photograph part, the edge component emphasized signal is output to the 2fie.
It is output to the f conversion circuit 15.

The binarization threshold generation circuit 16 receives a density setting signal, a gradation setting signal, a reading mode signal for character reading or photo reading, which is supplied from the CPU 20, and the white peak hold circuit 14.
, a binary signal fed back from the binarization circuit 15 (binarized signal of the previous pixel),
The binarized signal of the specific pixel fed back from the binarization post-processing circuit 17 (the binarized signal of the pixel one line before and the binarized signal of the pixel immediately before one line) and the gradation level. The binarization threshold value is output to the binarization circuit 15 in accordance with the dither binary threshold value corresponding to the gender.

Thereby, the binarization circuit 15 compares the image signal supplied from the selector 12 with the threshold (simple binary threshold or dithered binary threshold) supplied from the binarization threshold generation circuit 16 ( From this, it is binarized, and the result of this binarization is output to the binarization post-processing circuit 17.

As a result, the binarization post-processing circuit 17 outputs the binarized signal supplied from the binarization circuit 15 as it is when photo reading is specified by the CPU 20, and when text reading is specified , after removing isolated points and notches from the binarized signal supplied from the binarizing circuit 15.
A value signal is output in accordance with the reading density.

That is, the binarized signal supplied from the binarization circuit 15 is passed through the delay circuit 41 and buffer 61 in the local expansion section 31 to the delay circuit 44 and the line buffer 6.
5. At this time, line buffer 65.66
．． 67 stores the binarized signals of one line before, two lines before, and three lines before, respectively.

As a result, the local expansion unit 31, as shown in FIG.
The binarized signal supplied from the binarization circuit 15 is transmitted to the pixel "
1", the output of the delay circuit 41 corresponds to pixel "5", the output of delay circuit 42 corresponds to pixel "9", the output of delay circuit 43 corresponds to pixel "13", and the output of delay circuit 41 corresponds to pixel "13". The output of delay circuit 44 corresponds to pixel "2", the output of delay circuit 45 corresponds to pixel "6", and the output of delay circuit 46 corresponds to pixel "10" (
corresponding to the target pixel), the output of the delay circuit 47 corresponds to the pixel “14
'', the output of the delay circuit 48 corresponds to pixel "3", the output of delay circuit 49 corresponds to pixel "7", the output of delay circuit 50 corresponds to pixel "11", and the output of delay circuit 51 corresponds to pixel "11". The output of the buffer 63 corresponds to pixel "15", the output of the buffer 63 corresponds to pixel "4", the output of the delay circuit 52 corresponds to pixel "8", and the output of the delay circuit 53 corresponds to pixel "12". However, the output of the delay circuit 54 corresponds to the pixel "16", and the output of the delay circuit 54 corresponds to the pixel "2.3.5.6.7.9" of 12 pixels including the target pixel "10".
．． 10.11.12.13.14.15'' is output to the filtering section 32 as a result of local expansion. - This filtering section 32 outputs data in which notches and isolated points have been removed from the target pixel based on the pattern of the 12-pixel binarized signal locally developed by the local development section 31 and the reading density. , the binary signal of the target pixel is sent directly to the data selection unit 33
The output will be displayed. When the reading mode is text and the reading density is "normal", the data selection section 33 selects a signal (C
2) is selected and output, and when the reading mode is text and the reading density is "fine", the signal (C4) that has been processed to remove notches and one isolated point by the filtering section 32 is selected and output; When the reading mode is photo, the filtering section 32
The signal (P4) passing through is selected and output.

For example, when notch removal processing is performed by local expansion on an image pattern as shown in Figure 4(a), a white signal is output to the target pixel (black pixel) in the matrix, and as shown in Figure 4(b). When a notch removal process is performed by local expansion on an image pattern as shown in FIG. 1, a white signal is output to the target pixel (white pixel) in the matrix.

As a result, as shown in FIG.
Even if the protrusion, that is, the black pixel, is the target pixel, a white signal is output, so the image pattern after processing is as shown in the figure (
As shown in b), the black and white protrusion is removed, resulting in the removal of the notch.

Therefore, notches and isolated points can be reliably removed.

The binarized signal from the binarization post-processing circuit 17 is sent to the serial/parallel converter circuit 18 and the interface circuit 1.
9 to the image information file device.

As described above, the area of local expansion is expanded to a 4×4 matrix area, 12 pixels around the target pixel are extracted from this area, and a binarized signal corresponding to this extracted pattern is output. As a result, the pattern of the target pixel can be better understood than in the conventional method, and the accuracy of notch removal and the removal accuracy of double isolated points can be improved. As a result, the read image quality can be improved, and the data compression rate of the image information file device to which the binarized signal is supplied is improved. - In the above embodiment, 12 pixels of the 4×4 matrix were used as reference pixels, but the present invention is not limited to this, and the entire matrix may be used as reference pixels.

Furthermore, although the case of a 4x4 matrix has been described as an mxn matrix, the present invention is not limited to this, and is not limited to this.
A matrix of n may also be used.

[Effects of the Invention] As detailed above, according to the present invention, notches and isolated points can be reliably removed, image deterioration can be prevented, and data compression ratio can be prevented from decreasing. It is possible to provide a capable image signal processing device.

[Brief explanation of the drawing]

FIG. 1 to FIG. 5 show an embodiment of this invention.
Figure 1 is a diagram schematically showing the overall configuration, Figure 2 is a diagram showing the configuration of the binarization post-processing circuit, Figure 3 is a diagram for explaining an example of local expansion, and Figure 4 is notch removal. Figure 5 is a diagram for explaining the process, and Figure 5 is a diagram for explaining the image pattern before and after the notch removal process, and Figures 6 to 8 are for explaining the conventional example. So, Fig. 6 is a diagram for explaining notches and isolated points, and Fig. 7 is a diagram for explaining notches and isolated points.
FIG. 8 is a diagram for explaining the isolated point removal process, and FIG. 8 is a diagram for explaining the image pattern before and after the notch removal process. 0... Original, 1... Original table, 4... Line image sensor, 15... Binarization circuit (first output means),
17... Binarization post-processing circuit (second output means), 20
...CPU, 26...Operation panel. Applicant's agent Patent attorney Takehiko Suzue (a) Figure 4] Part (a) (b) Figure 5 (a) Figure 6

Claims (1)

[Claims] A first output means for outputting an image signal; and a target pixel supplied from the first output means,
A binarized signal obtained by removing notches and isolated points by referring to all or part of the image pattern in an m×n matrix where m is an integer of 3 or more and n is an integer of 4 or more. An image signal processing device comprising: second output means for outputting;