JPH0119594Y2 - - Google Patents

Description

[Detailed explanation of the invention] (1) Field of the invention This invention is based on the following:
The present invention relates to a reset circuit for a power supply device that stably outputs a reset signal without being affected by the rise and fall characteristics of a DC power supply voltage.

(2) Prior art and its problems Conventionally, as a reset circuit for this type of power supply device, for example, the one shown in FIG. 1 is known. In the figure, an AC power supply 1 is connected to the primary side of the transformer T via a power switch 2, and a power supply circuit 3 that supplies DC power supply voltage Vcc to various circuits and a power supply circuit 3 that supplies DC power supply voltage Vcc to various circuits is connected to the secondary side of the transformer T. A reset circuit 4 that outputs a reset signal RST is formed.

The power supply circuit 3 includes a bridge circuit 5 that converts alternating current into direct current, and a constant voltage circuit 6 that stabilizes the direct current output of the bridge circuit 5 and outputs the direct current power supply voltage Vcc, which is a constant voltage. Figure 2 A, B
As shown in , the DC power supply voltage Vcc is
The rising part a that reaches the establishment of the rising voltage after a certain time delay with respect to the rise of the AC input when the switch 2 is turned on, and the rising part a of the AC input when the switch 2 is turned off.
With respect to the fall of the input, the voltage is established for a time t due to the influence of the capacitor of the constant voltage circuit 6, and then there is a fall portion b where the voltage gradually drops.

The reset circuit 4 detects the on/off state of the switch 2 based on the rise and fall of the rectifier circuit 7 and the output DC power supply of the rectifier circuit 7, and when the switch 2 is turned on, the reset circuit 4 detects the on/off state of the switch 2 for a certain period of time t ₂ immediately after the switch 2 is turned on. When turned off, almost simultaneously the on command signal c
and a timer circuit 9 that outputs the voltage Vcc to the transistor 8.
is given, and in response to the ON command signal c, the reset signal RST shown in FIG. 2C is output. In other words, this reset signal RST has a voltage Vcc with respect to the rise of the AC input when switch 2 is turned on.
The ground level is held at _t1 for a certain period of time until the voltage is sufficiently established, and during this time various circuits are set to their initial states. Also, when switch 2 is turned off,
When the AC input falls, it drops to the ground level almost simultaneously, and the time t during which the voltage Vcc is established.
During this period, necessary processing such as returning various circuits to their initial states is performed.

Therefore, this reset signal RST must be stably held at the ground level during the period when it is at the ground level.

However, in a conventional reset circuit, even if the transistor 8 is set to a conductive state by the ON command signal c, the conductive state is not maintained during the rising portion a and the falling portion b of the DC power supply voltage Vcc. Because of this instability, the reset signal RST is not stably maintained at the ground level in this part, causing the problem that various circuits cannot be reliably set to their initial states.

(3) Purpose of the invention The purpose of this invention is to reset a power supply device that can reliably maintain the reset signal at the ground level when the AC power input is turned on or off, without being affected by the rise and fall characteristics of the DC power supply voltage. The purpose is to provide circuits.

(4) Structure and effect of the invention In order to achieve the above object, this invention makes the transistor conductive for a certain period of time after the power is turned on, and immediately after the power is turned off, and brings the reset signal output terminal to the ground level. In the reset circuit of the power supply device to be maintained, a normally closed relay contact is interposed between the above output terminal of the transistor and the ground, and the normally closed relay is operated from a time smaller than the above fixed time after the power is turned on until immediately after the power is turned off. It is characterized by the provision of a timer that energizes the drive coil of the contact.

According to this configuration, when the power is turned on, the normally closed relay contact is closed immediately after the transistor is set to the conductive state, so the output terminal of the transistor is set to the ground level regardless of the conductive state. In other words, even if the transistor exhibits an unstable conduction state when the DC power supply voltage rises, the reset signal does not become unstable as in the conventional case and is reliably maintained at the ground level. Then, at the timing when the normally closed relay contact is opened, the conduction state of the transistor is stabilized and completed, so that the output terminal continues to be held at the ground level.

In addition, when the power is turned off, the DC power supply voltage is established for a certain period of time immediately after, so the transistor becomes completely conductive, and even if the normally closed relay contact becomes unstable when it closes, the output terminal remains unchanged. held at earth level. Furthermore, since the normally closed relay contact is reliably closed at the timing of the falling part when the DC power supply voltage drops from the established state, even if the conduction state of the transistor becomes unstable during this falling part, the output The terminals are held securely at earth level by normally closed relay contacts.

(5) Description of Embodiment FIG. 3 shows an embodiment of this invention. Note that the same parts as in FIG. 1 are designated by the same reference numerals and their explanations will be omitted.

In the figure, the reset circuit according to this embodiment includes a normally closed contact 30a connected between the collector of a transistor 8 and the ground, and a drive coil 30a thereof.
The on/off state of the switch 2 is detected from the rise and fall of the output DC power supply of the rectifier circuit 7 and the relay 30 consisting of a relay 30 consisting of the rectifier circuit 7 _.
(t ₂ < t ₁ ) During the period from when the switch 2 is turned off, the drive coil 30 is
and a timer circuit 31 that supplies power to b.

With this configuration, as shown in FIG. 4D, when the switch 2 is turned on, the normally closed contact 30a is closed for a time _t2 , which is shorter than the above time _t1 , and during this time the reset signal RST is not applied. Make sure to keep it at ground level. Moreover, this normally closed contact 30a is
When switch 2 is turned off, it immediately changes from open to closed, and the unstable operation during this closed transition is due to the voltage
It disappears in the falling part b of Vcc, and the reset signal at the timing of this falling part b
Ensure RST is held at ground level.

Thus, according to this invention, the reset signal
RST is reliably held at the ground level when the AC power input is on or off, without being affected by the rise and fall characteristics of the DC power supply voltage Vcc.

[Brief explanation of the drawing]

1 and 2 are electrical configuration diagrams and time charts showing a reset circuit of a conventional power supply device, and FIGS. 3 and 4 are electrical diagrams showing a reset circuit of a power supply device according to an embodiment of the present invention. This is a block diagram and time chart. 1...AC power supply, 2...power switch, 7...
... Rectifier circuit, 8 ... Transistor, 9 ... Timer circuit, 30a ... Normally closed relay contact, 30b ... Drive coil, 32 ... Timer circuit, RST ... Reset signal.

Claims (1)

[Scope of utility model registration request] In the reset circuit of a power supply device, which maintains the reset signal output terminal at ground level by turning on the transistor for a certain period of time after the power is turned on, or immediately after the power is turned off, the circuit is normally closed between the output terminal of the transistor and the ground. A reset of a power supply device, characterized in that a timer is provided with a relay contact interposed therebetween, which energizes the drive coil of the normally closed relay contact from after a time shorter than the predetermined time has elapsed after the power is turned on until immediately after the power is turned off. circuit.