JPH01192266A - Picture processor - Google Patents

Abstract

PURPOSE:To attain object picture processing without deteriorating picture quality by applying magnification/reduction processing being conversion processing of picture element density after color separation and before mutli-value processing. CONSTITUTION:Digital, picture signals VR, VC subject to shading correction are applied to a color discrimination circuit 35 to discriminate into plural chrominance signals. Then the result is fed to a color ghost correction means 300 of the next stage, where color ghost in the main scanning direction (horizontal scanning direction) and in the subscanning direction (drum rotating direction) is corrected. Then the signal passes through a magnification reduction circuit 1, where magnification/reduction processing is applied as required. The picture data after magnification is subject to next resolution correction (MTF correction). Thus, the picture processing attended with picture quality deterioration such as rugged slant lines is hot applied at magnification of picture.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a simple electrophotographic method that separates image information into a plurality of colors, performs image processing, and then records it as a monochrome image. The present invention relates to an image processing device that is applied to a copying machine or the like to obtain a suitable image, and particularly relates to an image processing device that has an enlargement/reduction function.

[Background of the Invention] In a simple electrophotographic copying machine, whether the original is black and white or color, regardless of the presence or absence of a multicolor original, it performs monochrome processing from the beginning and then copies the original. I try to do that.

The 109th copy machine makes color copies of multicolor originals.
An image processing apparatus configured as shown in the figure is known.

In the figure, color image information is separated into white and cyan, and each color is separated into white and cyan by an image sensor 100 such as a COD.
．． 105 and photoelectrically converted.

The white and cyan color signals are supplied to a subtracter 2, from which the red signal is color-discriminated, and these color signals are respectively sent to the AG.
After the gain is adjusted in the C circuits 3 and 4.5, the signals are binarized in the binarization circuits 6 and 7.8. The binary output is reconverted into, for example, red and black color signals in the arithmetic circuit 9, and these are sent to the color copying device W (output device with a rotating drum).
A color image is reproduced by being supplied as an image signal to.

[Problems to be Solved by the Invention] Incidentally, in the image processing apparatus shown in FIG. 109, since color discrimination is performed after the image signal is binarized, various image processing after color discrimination is performed as follows. It is unavoidable to use this binarized signal.

Therefore, compared to monochrome imaging signals, the content of image processing is poor.

Furthermore, since it is binary information, the image quality also deteriorates.

Furthermore, since each color has an independent channel, the circuit scale increases, leading to an increase in the cost of the device.

Therefore, a desirable image processing device is one that eliminates these problems and reproduces monochrome images while also being able to: ・Perform appropriate image processing for each color for multiple colors.

・Processing such as color erasure is possible.

・Ability to use multilevel recording to achieve high image quality.

・It must be low priced.

It is desired that an image processing device that meets these requirements be developed as soon as possible.

Among the above-mentioned processes, if processing such as color erasure becomes possible, for example, it will be possible to write colored characters in places on a black and white document,
This is very convenient because it allows you to erase colored ink stains and the like even if you leave them intact when copying.

However, conventional devices such as those described above have not been able to meet these requirements.

Further, in the above-described configuration, various image processing is attempted to be performed from an image signal with a small amount of image information, resulting in deterioration of image quality.

In particular, when the pixel density is converted to perform enlargement/reduction processing, an inconvenient problem arises in the enlargement processing.

This is because, as is well known, enlarging processing increases pixel density through interpolation processing, so if enlarging processing is performed based on binary information, the unevenness of the diagonal lines becomes noticeable.

Therefore, the present invention proposes an image processing apparatus for monochrome recording that solves these conventional problems with a simple structure and that does not cause deterioration in image quality even when performing enlargement/reduction processing.

[Means for Solving the Problems] In order to solve the above-mentioned problems, an image processing device according to the present invention includes: color separation means for capturing image information of a document and separating it into a plurality of colors; A means for photoelectrically converting color-separated image information, a color separation means for performing color separation based on the photoelectrically converted image signal, and a pixel density for performing processing to convert the pixel density of the image data after color separation. The image forming apparatus is characterized by comprising a converting means and a means for visualizing the image using a smaller number of colors than the color separation means, based on the signal after the pixel density conversion process.

[Function] The image information of the document that has been optically imaged is separated into multiple colors. The color-separated image information is photoelectrically converted by a reading means such as a CCD.

The photoelectrically converted image signal is converted into an image signal having color information and density information of the image. Image processing such as color ghost correction is performed on the color information.

Pixel density conversion processing is performed on that density information, that is, enlargement and
Reduction processing (scaling processing) is executed.

Since the image data to be subjected to the enlargement/reduction processing is density information of about 6 bits, the enlargement/reduction processing is performed based on the image data having a sufficient amount of information.

Therefore, especially when enlarging an image, image processing that causes image quality deterioration such as diagonal lines becoming jagged is not performed.

In addition to enlarging/reducing processing, processing such as resolution processing is also performed, and then specifying whether to copy a black and white image for a gold color or a black and white image for a specific color image. will be done.

At the stage where such image processing is completed, multivalue processing is executed. It can be visualized based on the multivalued signal.

Therefore, the image is visualized using fewer colors than the color separation means, and this is developed.

Since the valid color of the image is specified externally, it is possible to copy the image with only a specific color erased.

Since image processing is performed before multi-value conversion, there is no risk of image quality deterioration even if enlargement/reduction processing is performed.

[Embodiment 1] Hereinafter, an example of an image processing apparatus according to the present invention will be explained in detail with reference to FIG. 1 and subsequent figures.

FIG. 1 shows a schematic configuration of an image processing apparatus according to the present invention.

The color image information (optical image) of the original 52 is separated into 2' color separated images by the dichroic mirror 55. In this example, the image is separated into a red R color separation image and a cyan cy color separation image. Therefore, the cutoff of the dichroic mirror 55 used is about 540 to 600 nm. As a result, the red component becomes transmitted light, and the cyan component becomes reflected light.

The color separated images of red R and cyan cy are supplied to an image RR reading means, for example, a CCD 104, 105, and image signals of only the red component R and cyan component cy are output from each.

The image signals R and Cy are supplied to A/D converters W60A and 60B, and are converted into digital signals having a predetermined number of bits, 6 bits in this example. Shading correction is performed simultaneously with A/D conversion. 15A and 15B indicate shading correction data creation circuits. Details of the shading correction will be described later.

The digital image signal subjected to the shading correction is extracted by the area extraction circuit 30 for only the signal corresponding to the maximum original size, and is supplied to the color discrimination circuit 35 at the next stage. When the maximum document width to be handled is 84 size, a size 43 B4 generated by a timing signal generating means (not shown) of the system is used as a gate signal.

Here, if the digital image signals subjected to shedding correction are VR and VC, respectively, these image signals VR.

VC is fully supplied to the color discrimination circuit 35 and discriminated into a plurality of color signals.

In this example, a case is illustrated in which the signal is configured to be separated into three color signals: red, blue, and black.

That is, no matter what color the original is, each pixel is assigned to one of red, blue, and black. When this process is performed, each part of the document is recognized as a red, helmet, or black color part. Note that this color discrimination process also includes changing red, blue, and black to other colors, or in general, using four or more colors.

Each discriminated color signal is composed of color code data (3-bit data) indicating its color information and its density data (6-bit data). The data for each of these color signals is stored, for example, in a color discrimination map in a ROM configuration.

The color-discriminated image data is transferred to a color image processing step.

First, it is supplied to the next-stage color ghost correction means 300, where color ghosts in the main scanning direction (horizontal scanning direction) and sub-scanning direction (drum rotation direction) are corrected.

This is because unnecessary color ghosts occur during color discrimination, especially around black characters.

Depending on the configuration of the color separation map, red or blue color appears around the edges of black characters. Image quality is improved by removing color ghosts. Color ghost processing applies only to color code data.

Even when copying in monochrome, for example, if the function is to erase colored parts and copy, a color ghost correction circuit is required as in this example.

300A indicates a color ghost correction circuit in the main scanning direction, and 300B indicates a color ghost correction circuit in the sub-scanning direction.

When performing color ghost correction using image data for 7 bits in the horizontal direction and 7 lines in the vertical direction, a 7-bit shift register 301 and a memory 310 for 7 or 8 lines are used, respectively, as shown in the figure. will be done.

In addition to color ghost correction, image processing includes specific area extraction/erasing/filling means 4201, enlargement/reduction processing means (variable magnification means) 1, and resolution correction means 4 including hollow processing.
50, a hatching processing means 440, an inversion means 460, and a multi-value conversion means 600 for multi-value conversion.

Extraction/erasing/filling processing of a specific area is performed based on color code data, but other image processing is performed only using density data.

An example of region extraction will be described next. The area extraction circuit 500 is for detecting an original image area marked with a color marker on a document or the like.

The area extraction circuit 500 outputs a signal (area signal) indicating the area surrounded by the color marker, and this signal enters the extraction/erasing/filling circuit 420.

Here, a signal for extraction, erasure, and filling is created according to the signal from which the region has been extracted.

At this time, this signal creation is performed according to instructions for inside/outside the marker area.

Next, this signal passes through the enlarging/reducing circuit 1 and undergoes enlarging/reducing processing as necessary.

Since the data necessary for the enlargement/reduction process has been obtained by the processing means 420, it is only necessary to process this output data.

The enlargement/reduction circuit 1 can be set with a magnification instruction by the CPU. Enlargement/reduction processing is performed in the main scanning direction by electrical processing, and in the sub-scanning direction by controlling the scanning speed of the optical system.

The image data after scaling is then subjected to resolution correction (MTF correction) processing.

The reason for performing MTF correction is that the aperture size of the CCD 104°/105 may become larger in the sub-scanning direction, as well as the deterioration of sharpness in transmission systems such as lenses, and the integration of optical signals in the sub-scanning direction. This is because the MTF deterioration in the sub-scanning direction is more significant than in the main-scanning direction in order to obtain a signal in the sub-scanning direction.

Therefore, skipping and blurring of characters can be corrected.

On the other hand, as described later, this MTF correction uses a 3×3 convolution filter, but by switching this filter coefficient to differentiation (edge detection),
It is possible to extract data only from the edges. This is called middle cutting.

After performing these processes on the necessary areas, the image data is input to the shading circuit 440. Here, the required area is shaded.

Next, the image data is input to an inversion circuit 460, and only necessary areas can be inverted. After that, the multi-value conversion means 60
At 0, the image data is multivalued.

On the other hand, the threshold value for this multi-value conversion is determined in real time by automatic threshold value setting means (EE means) 600B.

The image data multivalued by the multivalue conversion means 600A is supplied to the output device 70 via the interface circuit 40.

As will be described later, the interface circuit 40 has first and second interfaces 41 and 42, and the second interface circuit 42 is for receiving batch image data and the like used for controlling toner density. be.

As the output device 70, a laser recording device or the like can be used. When a laser recording device is used, a multivalued image is converted into a predetermined optical signal, and this is converted into a predetermined optical signal based on the multivalued data. It is modulated by

As the developing device, an electrophotographic copying machine is used. In this example, two-component development and reversal development are employed. In this example, in order to reduce the size of the device, a black body is developed on an OPC photoreceptor (drum) for image formation in one rotation of the drum, transfer is performed once after development, and the image is printed on recording paper such as plain paper. The image is transferred as a monochrome image.

Therefore, according to the image processing apparatus shown in FIG. 1, appropriate image processing can be performed for each color for multiple colors, processing such as color erasure is possible, multi-value recording, etc. can be used, A device with features such as high image quality and low cost can be realized.

Next, the configuration of each part of the image processing apparatus according to the present invention configured as described above will be explained in detail.

First, a simplified copying machine suitable for application to the present invention will be explained with reference to FIG. 2 and subsequent figures.

A simple copying machine separates color information into about three types of color information and then records this as a monochrome image.

In this example, black BK is used as the three types of color information to be separated.
, red R and blue B are illustrated.

By turning on the copy button on the device, the document reading section A
is driven.

First, a document on document table 81 is optically scanned by an optical system.

This optical system consists of a carriage 84. ■It is composed of mirrors 89 and 89°.

A halogen lamp is used as a light source. However, it is also possible to use commercially available warm white fluorescent lamps, and in this case, these fluorescent lamps are turned on and driven by a high frequency power source of about 40 kHz to prevent flickering. In addition, in order to maintain a constant temperature of the tube wall or to promote warm-up, it is necessary to use a heater using a POSISTOR.

A standard white plate 97 is placed on the upper surface side of the left end of the platen glass 81.
is provided. This is because the image signal is normalized to white color No. 43 by optically scanning the standard white plate 97.

The carriage 84 and the V-mirror 89, 89' are caused to travel on a slide rail (not shown) at a predetermined speed in a predetermined direction by a stepping motor 90.

Optical information (image information) obtained by irradiating the original with the light source 85' is guided to the optical information conversion unit 100 via the reflecting mirror 87 and the mirror 89.

The optical information conversion unit 100 is composed of a lens 801, a prism 802, a dichroic mirror 55, a CCD 104 on which a red color-separated image is projected, and a CCD 105 on which a cyan color-separated image is projected. .

An optical signal obtained from the optical system is focused by a lens 801, and separated into red optical information and cyan optical information by a dichroic mirror 55 provided in the prism 802 described above.

Each color separation image is converted into an electrical signal (image signal) by being formed on the light receiving surface of each CCD 104, 105. The image signal is output to the writing section B after being subjected to the various signal processing described above in the signal processing system.

The writing section B has a deflector 935. As the deflector 935, in addition to a galvanometer mirror or a rotating polygon mirror, a deflector made of an optical deflector using crystal or the like may be used.

The laser beam modulated by the image signal passes through this deflector 9.
35 for deflection scanning.

When deflection scanning is started, beam scanning is detected by a laser beam index sensor (not shown), and beam modulation using an image signal is started.

The modulated beam is scanned by a charger 121 over an image forming member (photosensitive drum) 110 which is charged with a negative charge.

Here, the main scanning by the laser beam 1, the image forming body 11
By the sub-scanning by the zero rotation, an electrostatic image corresponding to the image signal is formed on the image forming body 110.

This electrostatic image is developed by a developer 123 containing black toner. A predetermined bias voltage from a high voltage source is applied to the developing device 123.

A black and white image is formed by development.

Toner replenishment of the developing device 123 is performed by controlling a toner replenishing means (not shown) based on a command signal from a system control CPU (not shown), thereby replenishing toner when necessary.

On the other hand, the recording paper P fed from the paper feeding device 141 via the feed roll 142 and the timing roll 143 is
It is conveyed onto the surface of the image forming body 110 while being timed with the rotation of the image forming body 110. Then, by the transfer tTs 130 to which a high voltage is applied from the high voltage power supply, the multicolor toner image is completely transferred onto the recording paper P and separated by the separation pole 131.

The separated recording paper P is conveyed to the fixing device 132, where it undergoes a fixing process and a color image is obtained.

The image forming body 110 after the transfer is transferred to a cleaning device 126
is cleaned and prepared for the next imaging process.

In the cleaning device 126, a predetermined DC voltage is applied to a metal roll 128 provided on the blade 127 in order to facilitate recovery of the toner cleaned by the blade 127. This metal roll 128 is the image forming body 1
100 surface in a non-contact manner.

After the cleaning is completed, the blade 127 is released from the pressure bond, but in order to remove unnecessary toner that remains behind when the blade 127 is released, an auxiliary cleaning roller 129 is further provided, and this roller 129 is rotated in the opposite direction to the image forming body 110. By pressing, unnecessary toner is sufficiently cleaned and removed.

The transmittance characteristics of the dichroic mirror 55 described above are
Figure 4 shows the emission spectrum of the combination of a light source and an infrared (IR) cut filter, and CCD104,1.
The spectral sensitivity characteristics of 05 are shown in FIG.

The reason why shading correction is required is as follows.

One is for the optical system, and the other is for the CCD PRNU (Pho).
to Re5ponse Won Uniformit
y) This is because correction is necessary.

The second problem is the CCD, which usually has a structure in which the number of pixels is arranged in a line, ranging from about 2,048 to 5,000 pixels. It is generally difficult to make the characteristics of each pixel of this large number uniform. Normally there is ±10% as PRNU,
This is because it is necessary to correct this sensitivity unevenness in order to achieve high image quality.

If there is shading, even if the same white document is imaged, only a white signal with a lower output level around the shading will be obtained as shown in FIG. 6A.

Therefore, in order to perform the shading correction, the optical system first operates, and before starting the main scan, scans the white reference plate 97 to obtain a white signal (FIG. 6B), which is used as a reference signal during A/D conversion. If used as a reference signal, the quantization step during A/D conversion is modulated by this reference signal. That is, as shown in FIG. 6A, the quantization step is controlled so that the increments are small at the edges of the image and large at the center.

As a result, when A/D conversion is performed while modulating the reference signal in this manner, the output (analog output) becomes a constant output level as shown in FIG. 6C, and shading distortion is corrected. In this way, the white signal captured before the main scan is used as a reference signal for shading correction.

FIG. 7 shows an example of the shading correction data creation circuit 15A.

In this example, the white reference plate 97 is imaged over two lines and used as a reference signal, and the two lines wJ of the first buffer 16 are
The switching signal that can be supplied only to rjJ (Fig. 8B)
) is controlled to the active state by tl, and as a result, the A/D converted white signal is transferred to the memory 1 via this first buffer 16.
It is stored in 9.

When the normal image reading operation mode is entered, the image signal shown in FIG. 8 is output, and this is digitized by the A/D converter 60A. When the image reading operation mode is reached, the memory 19 is restricted to the read mode and the second
The buffer 17 is controlled to be active, and the reference signal (white signal) read out from the memory 19 is converted into an analog signal by the D/A converter 2o, which is then sent to the A/D converter 6.
Used as a reference signal for 0A.

The A/D converter 60A is a parallel type A/D converter as shown in FIG.
A D converter is used, and the above-mentioned reference signal can be applied to each of the comparators 61 arranged in parallel. Furthermore, this A/D
In the converter 60A, 62 is a reference signal forming means composed of a plurality of bleeder resistors, 63 is an encoder, and 64
is a latch circuit.

In order to control the second buffer 17 to be active only during the operation period, the OR output 0R1 (FIG. 8E) of the switching signal and the image valid signal is supplied via the OR circuit 21.

In this example, a third buffer 18 is provided, and A/D conversion is performed using a reference signal at a predetermined level (high level) during the horizontal blanking period.

Therefore, the inverter 22 outputs the
An output 0R2 (F in the figure) obtained by inverting the phase of RI is supplied.

Therefore, since the reference signal for the comparator 61 is modulated by the reference signal shown in G in the figure, when the A/D-converted image data is converted into analog data, it becomes as shown in H in the figure.

Note that if the white signals of all pixels of the CCD are stored in the memory 19, the PRNU can be corrected at the same time.

Shading correction is performed independently for each red and cyan channel. For example, if the white signal on the red side is used to correct the cyan side signal, the PRNU of the red copper CCD is different from that on the cyan side, so the white signal on the cyan side after correction is output. This is because there is a possibility that a problem may arise in which the variation in the values becomes large.

In FIG. 7, the horizontal blanking period HBLK is also subjected to A/D conversion using a reference signal having a predetermined reference level, and this is based on the following reason.

During shading correction, especially for A/D conversion operations outside the image valid period, the shading correction data stored in the 1-line memory is directly used at the reference terminal 62a of the A/D converter 60A.
(FIG. 9), the A/D conversion range of the A/D converter 60A becomes approximately 0, and the input signal and the reference signal for shieding correction have roughly the same potential.

Furthermore, this input signal contains quite a bit of noise N (FIG. 10A).

Since the A/D converter 60A sequentially performs determination based on the voltage fluctuations of the input image signal and the reference signal, the conversion range is approximately 0, so the determination result is either the maximum value of the output (high level) or The minimum value (low level) is determined.

If this fluctuation in output value occurs over a relatively short period of time due to the influence of noise, etc., the comparator of the A/D converter repeats on and off almost simultaneously, causing a large change in current as the A/D converter. occurs.

This change in current has a relatively high frequency and does not exist in the signal waveform, so it is highly likely that it will affect the input signal as noise. Because a relatively large amount of current flows through the source, the impedance is low, and there is a high possibility that it will enter the power supply line or ground line as more noise than usual.

Noise generated due to the values of the input signal of the A/D converter and the reference signal for shading correction (Figure 10B) mixes into the input signal black level, which causes the black level to fluctuate greatly ( Figure C).

Therefore, in this example, the conversion range is prevented from becoming 0 at least during the black level period outside the image non-effective period to prevent noise from being mixed in.

In the embodiment, the voltage values set outside the image validity period are as follows:
The full scale value of the A/D is used to prevent the change range from becoming OV and preventing the shading correction signal from becoming the same voltage as the shading correction signal.

Through the above processing, A/D conversion and shading correction can be performed simultaneously. In such a correction method,
If the white power signal is 30 to 40% or more of the full scale of the A/D, correction is almost possible (FIG. 11A).

However, if a low white signal that exceeds this limit comes (for example, due to blackening or a decrease in light intensity due to long-term lighting), it is possible to correct it, but the image signal will be in the form of a large amount of noise superimposed, and it will remain as it is. The words used in the form are practically difficult (
Figure 11B).

Next, color discrimination or color separation (multi-bit image data) is performed using the red and cyan output signals subjected to shading correction as described above. Here, an example will be shown for three colors: black, red, and blue.

If a method is adopted in which the image signal is binarized and then color separated as in the conventional example, the data after color separation is a binary signal, which is inappropriate in view of performing various types of processing.

Here, the colors are separated before being converted into z-values. A map as shown in FIG. 12A is prepared for color separation. The color separation map is a ROM (bipolar ROM). In this case, 6-bit image data V having halftone levels
A 3-bit color code (specifying five colors: red, blue, black, red marker, and blue marker) and density information are stored at the addresses given by R and vc. In other words, 1 image information = color code + density information.

For example, the concentration value is 30 levels (XXXO
I 1110) pixel is blue = OO1011110 = 05E black = OOOO11110 = OLE white = 011011110 = ODE For white, DE or CO may be used, but DE is selected due to the continuity of density.

The above data is stored in each address as shown in FIG.

The reason why the R marker and B marker areas are included in the map in the same figure is because image processing is performed on specific areas, so it is necessary to detect the color markers written on the manuscript separately from other image data. Although there is.

Of course, as shown in FIG. 12B, it is also possible to map color markers without distinguishing them from other color data.

Here, an example of the color code is shown in FIG.

Color codes include white, red, blue, black, white, red marker,
Since there are 6 colors of black markers, 3 bits are used, but it is clear that as the number of colors increases, the number of bits can be increased accordingly. Further, the density information is also 6 bits here, but 4 bits is practically sufficient for characters only. Therefore, it is clear that the number of bits may be changed depending on the target image.

The boundaries of color separation as shown in FIG. 12 must be determined by taking into consideration output fluctuations at the edge portions of lines.

Otherwise, unnecessary colors called color ghosts, which are a type of color error, will occur at the edges of black characters and the like.

Since the color separation boundary is generally fixed, the color changes greatly depending on the setting of the boundary line. In particular, when performing color separation (multi-color), the effect is particularly large, and in order to prevent variations in the results, (a) Preventing fluctuations in the emission spectrum of the light source (b) Preventing chromatic aberration of the lens (iii) Preventing variations in the cutoff wavelength of the dichroic prism is particularly necessary.

(A) is not a big problem with halogen lamps, but
In the case of fluorescent lamps, +Ar spectrum may appear at low temperatures, and it is important to prevent this.

(b) will be discussed later.

Although (c) usually results in the problem of controlling film variations, it is preferable to keep it within ±15 nm, preferably within ±10 nm, with respect to the set cutoff wavelength. If this is not done, the boundary color between red and black or blue and black in the original image will vary greatly due to variations in the cutoff wavelength of the prism.

In this example, the color separation method is performed using two signals, VR and VC, but instead of using such a method, different color separation axes f 1 (VR, VC) and f 2 (VR) are used.

VC) may also be used. When using the color separation axis in calculations, etc., depending on the calculation formula, if noise is superimposed on VR and VC, the addresses will be different compared to when there is no noise.
Care must be taken because isolated noise of different colors is likely to occur.

On the other hand, in practical use, there are cases where it is desired to extract a specific color, or to extract colors other than red, helmets, and fish gear. For these cases, a color separation map different from this example is prepared, and one of the plurality of color separation maps is selected according to the request. Or make the color separation ROM removable,
The necessary ROM (actually in the form of a ROM pack) may be replaced.

The map for three colors is shown in FIGS. 13A and B, and the map for four colors is shown in FIG. 13C.

Next, as described above, color division lil! The color ghost correction means 300 that removes color ghosts from faded image data will be described.

There are many causes of color ghosts, but the main ones are: 1. Pixel misalignment between the two CCDs (installation accuracy, changes over time) 2. Cyan and red image magnification mismatch 3. Cyan and red outputs caused by lens chromatic aberration Level difference 4, noise. This will be explained below.

FIG. 15 shows an example of appearance of color ghosts.

The figure shows the color ghost that appears after color separation of the black kanji ``sexuality''.

As you can see from this example, as a color ghost,
As shown in FIGS. 16A to 16C, red and blue appear at the edge of the black line, black appears at the edge of the blue line, and black appears at the edge of the red line.

It is clear that color ghosts appear differently in other color combinations.

The reason why such a phenomenon occurs will be explained using the above example.

Dream of Dream (See Figures 17 and 18) □ As shown in Figure 17, if the COD alignment is not performed strictly, the edges of black will be mixed with red as shown in Figure 18 during color separation. Black ghosts will appear at blue and red edges, and black ghosts will appear at blue edges.

Therefore, in order to prevent this, it is necessary to precisely align the two CCDs. Normally, it is necessary to perform alignment within one pixel, preferably within 1/4 pixel.

In this example, this is achieved by aligning the two CCDs on a jig and then fixing them with adhesive.

An example is shown in FIG. 19 and below.

The lens barrel 801 is attached to a holding member 8 as shown in FIG.
The 7-shaped receiver, which opens at right angles toward the top of 01a, is housed in a section and fixed with a fastener 801c, and then attached to a predetermined position on the device board 810.

The front part 8 of the prism 802 is attached to the rear side of the holding member 801a.
The mounting into which the prism 802b can be dropped is provided with a surface, and the prism 802 held by the mounting member 802a can be pressed against the surface and fixed by screwing.

Since the mounting surface is formed by a simple machining process, the distance to the lens barrel 801 and the perpendicularity to the optical axis are extremely accurate, and the above-mentioned CCD 104 is mounted through the prism 802 mounted thereon. ．． C.C.
A predetermined light image can be accurately formed on the light receiving surface of the D105.

The amount of deviation in the perpendicularity between the plane 801b of the lens fil1801 perpendicular to the optical axis and the surface 802b of the prism 802 facing the lens (the inclination tffl of the perpendicularity of the dichroic surface with respect to the lens optical axis) is determined using a white background. The resolution MTF obtained from the signal output of the white line part and the black line part for The decrease was around 30% (9%), and the angle was further reduced by 30%.
It is important to maintain the surface accuracy during this period, as this can cause a drop of more than 50% (15%) per minute, and cause problems in extracting black and white discrimination signals (in this case, the prism surface at the end of the lens barrel ).

The CCDs 104 and 105 are fixedly attached to the prism 802 via members 804 and 806 with an adhesive.

FIG. 21 shows an embodiment showing a cross section of the main part, and the light splitting members are fixed symmetrically with adhesive on both sides of the prism 802. Members 804a and 804b (806a, 806b)
The CCDs 104 and 105 are fixed to the imaging section via adhesive.

As for the material of the mounting member, it is desirable to use a material with a small coefficient of linear expansion for two reasons. One is to prevent pixel misalignment due to temperature fluctuations, and the other is to prevent pixel misalignment from occurring due to temperature fluctuations.The other is to prevent pixel misalignment from occurring due to temperature fluctuations, and the other is to prevent the prism from cracking due to internal distortion due to the difference in linear expansion coefficient between the components. This is to prevent this from occurring.

To reduce pixel misalignment due to temperature fluctuations, pixel misalignment between CCDs can be reduced by making sure that the mounting conditions for each CCD are exactly the same with the components, but it is also necessary to have a small coefficient of linear expansion. There is.

Usually, what is the coefficient of linear expansion of a prism? , 4X10-6 (optical glass BK-7) is small, so glass and ceramic materials (7°0 to 8.4X10-6) are used for installation.
6) and low #8 expansion alloys (e.g. Invar alloy (1~3°
x10-6), Nijirest cast iron (4~10X 10-6)
) ) etc. are suitable, and aluminum material (25X 10-6
) is not very appropriate.

In the above embodiment, the prism and the mounting member were used, and the mounting member and the CCD were fixed using adhesive, and the relative position of each CCD was adjusted for the divided optical image, and the example shown in FIG. 21 was used. We decided to fix it tightly using adhesive as shown in the figure below.

In particular, in Fig. 21, even if iron (12X10-6) with a large coefficient of linear expansion is used as the mounting member, the dimension in the C direction is short in practical terms, so the elongation due to heat is not affected much.
Also, since the d direction is the direction in which the line sensors are arranged, and the prism material and the line sensor package material are ceramic materials, their linear expansion coefficients are the same, and with this configuration, no pixel misalignment occurred. .

The adhesive is a two-component type adhesive or a photocurable adhesive, and an ultraviolet curable adhesive is particularly preferred.

In particular, photo-curable adhesives can speed up the curing time of the adhesive simply by changing the intensity of light, improving workability, reducing costs, and stabilizing the product. Among photo-curable adhesives, ultraviolet-curable adhesives in particular exhibit almost no thermal change even when exposed to ultraviolet rays, and can be stably cured.

Three Bond TB3060B (product name), Denka 1045K (product name), Norland 65 as light-curing adhesives
(trade name), etc., and irradiated with ultraviolet rays using a high-pressure mercury lamp, we were able to obtain good results in environmental tests, etc., which will be described later.

Also UV-curable urethane-based ThreeBond 3062
When B (trade name), LT350 (trade name), etc. were used, it was possible to obtain an adhesive that was even more effective in moisture resistance and had strength compensation.

What is the overall positional deviation of the CCD using the above method, assuming 1 pixel is 7μ? It became possible to suppress it within /4=1.75μ.

17, , standing ・
- When targeting color originals, there are effects such as chromatic aberration of the lens. This is because when the wavelength range of light is divided into two, cyan and red, as shown in Fig. 22, the image formation position F on the cyan side and the image formation position E on the red copper are different, especially in the image height. This is a phenomenon that is noticeable at high altitudes. Depending on the lens, a shift amount of about one pixel may occur.

, 7. If no design is done to improve lens chromatic aberration, the MTF values for cyan and red may differ greatly due to lens chromatic aberration. This is COD
The output is due to the difference in level.

When a black line is imaged, the cyan and red output signal levels at the center or edge of the line are quantized with 6 bits, and IVr-Vat≦10 (level), preferably IVr-Vcl≦6 (level). It is preferable to take this into account when installing the CCD.

Although it is possible to reduce color ghosts to some extent through the measures described above, it is difficult to completely eliminate them in practice, considering the variations in lens performance during mass production and the variations in accuracy of CCD mounting. .

For this reason, color ghost correction is also performed electrically using the color code after color separation.

Color ghost removal is performed using the color pattern method.

This is because the color ghost color that appears is determined for the original color, such as original black → red, blue ghost original red, helmet → black ghost. In the case of the color pattern method, the color of the original image can be identified by examining the appearance (pattern) of the colors of the pixel of interest and its surrounding pixels to determine the color of the pixel of interest.

As an example, FIG. 23 shows the pixel of interest, the surrounding color pattern, and the determination of the five colors of the pixel of interest determined at that time.

In the first example, since both sides of the pixel of interest are white and black, the blue color of the pixel of interest can be determined to be a color ghost appearing at the black edge. Red in the third example is also determined to be a color ghost of black. Therefore, in both the first and third examples, the pixel of interest is changed to black.

On the other hand, in the second and fourth examples, it is not determined that a color ghost has appeared, and the color of the pixel of interest is output as is.

This type of processing is difficult to implement with an arithmetic circuit, so in this example, it is implemented in ROM and LUT (lookup table).
It is used in the format. One-dimensional and two-dimensional systems are conceivable as color patterns, but if the number of colors is N1 and the number of surrounding pixels including the pixel of interest is M, then the number of color patterns is NM. Therefore, if a two-dimensional pattern is used, the number of M will suddenly increase, making it impractical.

In other words, although a two-dimensional pattern cannot have a large number of peripheral pixels in each dimension (main scanning direction/sub scanning direction), the number of patterns increases. FIG. 24 shows the relationship between size and number of color patterns.

In this example, the size is 1×7 in one dimension (that is, N
=4. M=7) color pattern is used, and color ghost removal is performed independently in the main scanning direction and the sub-scanning direction.

Here, if color markers are included, the number of colors is 6, that is, N = 6, but when performing color ghost correction, the marker color is
The red marker is corrected using the same process as the red marker, and the blue marker is corrected using the same process as the blue marker. Therefore, N=4.

For this purpose, the lower two bits of the red and blue marker color codes are set to be common to the lower two bits of the red and blue color codes.

At this time, since there is no difference in the appearance of color ghosts in the image between the main scanning direction and the sub-scanning direction, the same color pattern is used in the main scanning direction and the sub-scanning direction in this example.

The color pattern size is 1 x 7, but if the degree of color ghost appearance is small, 1 x 7 is selected.
It is also possible to use a smaller size color pattern, such as x5. Color ghosts of up to 1 pixel can be removed with a color pattern of size I×5, and color ghosts of up to 2 pixels can be removed with a color pattern of size ×7.

When a 1×7 color pattern is used, the lower two bits of the color code are used as the ROM address. For example, in the color pattern below, the lower 2 bits of the color code are white: white:
Blue; Blue: Black: Black: Black 11:1 l:01:01:00:00:00, and the address is D40. Also, at this address, the lower two bits of the black color code are stored as shown in Figure 23. Stored. The LUT is executed using the above method.

In reality, a 1x7 pattern requires a 14-bit address line, and a bipolar ROM with a 14-bit address input and a 2-bit color code output is sufficient, but such a large-capacity, high-speed ROM are not widely available on the market and are expensive.

In the embodiment, the ROM is selected using the first pixel, and LUT is performed using the codes of the remaining six pixels. In other words, two ROMs are used; the first ROM has a black head and a helmet, and the second ROM has a red and white head.

Start code Black (00), Blue (01) Address content 00000000000000 (black black black black black black black) 00
111111111111 (black white white white white white white) 0100
0000000000 (blue black black black black black black) 011111
Start code of 11111111 (armor, white, white, white, white, white) Red (10), white (11) Address content 10000000000000 (red, black, black, black, black, black) 10
111111111111 (red white white white white white white) 1100
0000000000 (black and white black black black black black) 111111
11111111 (white, white, white, white, white) In the color pattern shown in FIG. 23, the first ROM is white, so the second ROM is selected.

If a high-speed ROM (large capacity) is available, all color patterns can be stored in the same ROM. The LUT may be performed by using four ROMs and switching the ROMs depending on the color of the first pixel.

Examples of high-capacity, high-speed bipolar ROMs include Fujitsu Bag MB7143/7144.

When using a low-speed, large-capacity EPROM, it is also possible to transfer data to a plurality of SRAMs or the like before operation and perform color ghost correction using these SRAMs.

FIG. 25 shows an example of the color ghost correction means 300. Color ghost processing is performed in the main scanning direction (horizontal scanning direction)
This is performed in the sub-scanning direction (vertical scanning direction).

In this example, horizontal and vertical ghosts are removed using image data for 7 pixels in the horizontal direction and 7 lines in the vertical direction.

Color ghost processing applies only to the lower two bits of the color code of the image data.

Therefore, the color code read from the color separation ROM is first supplied to the ghost correction @path 300A in the main scanning direction. Therefore, the color code data is sequentially supplied to a 7-bit shift register 301 and parallelized. The parallel color code data for seven pixels is supplied to the horizontal ghost removal ROM 302, and ghost removal processing is performed for each pixel. An example of how the ROM 302 is used is as described above. When the ghost processing is completed, it is latched at latch #303.

On the other hand, the density data output from the color ROM is supplied to a latch circuit 306 via a shift register 305 (7-bit configuration) for timing adjustment, and the density data is serially transferred following the color code data. Data transfer conditions are determined so that the

The serially processed color code data and density data are supplied to a line memory section 310 provided in the color ghost correction circuit 300B.

The line memory unit 310 is provided to remove vertical color ghosts using seven lines of image data.

Although the line memory is used for a total of 8 lines, this represents one means of real-time processing; of course, real-time processing is possible even for 7 lines.

The color code data and density data for eight lines can be separated in the subsequent gate circuit group 320. In the gate circuit group 320, gate circuits 321-328 are provided corresponding to the line memories 311-318, respectively.

The output data of the 8 line memories synchronized in the line memory section 310 is divided into color code data and density data in the gate circuit group 320, and the output data is divided into color code data and density data.
The color code data thus obtained is supplied to a selection circuit 330, and out of a total of eight line memories, the color code data of seven line memories necessary for color ghost processing is selected. In this case, when line memories 311 to 317 are selected, the selected line memories are sequentially shifted such that line memories 312 to 318 are selected at the next processing timing.

The selected and synchronized 7-line memory worth of color code data is sent to the next vertical ghost removal ROM.
335 to remove vertical color ghosts.

Thereafter, it is latched by the latch circuit 356.

On the other hand, the density data separated by the gate circuit group 320 is directly supplied to the latch circuit 357, and is output after timing adjustment with the color code data. The upper 1 bit of the color code is also stored in memory 319.
After being stored in the data, the timing is adjusted with the lower two bits and output in the same manner, and these data are combined to create one complete image information.

The image processing example to be described next is region extraction processing.

Region extraction processing is a process for extracting a designated region so that various image processing can be performed on an image (black image) within or outside an arbitrary region designated by a color marker. be.

Conventionally, a position is specified using a digitizer or the like, and then an original image is placed and scanning processing is started, and a switch for inputting position data is operated each time the position is specified. Further, the position specification is in a rectangular shape such as a square or a rectangle, and it is not possible to specify an arbitrary area.

In the marker area extraction process described below, an arbitrary area written with a marker is detected, and the image can be processed and copied within/outside the area designated by the marker.

For example, as shown in FIG. 26, if you specify the area a with a blue marker, this area a will be automatically detected and this area a
The contents will be copied. Areas outside area a are not copied. A red marker may be used as the color marker.

In order to copy the image inside/outside the area a specified in this way, as shown in FIG.
R'' needs to be detected respectively.

Therefore, as shown in FIG.
is provided.

FIG. 28 shows a specific example of this, in which each bit of color code data obtained by scanning a color marker is supplied to a color marker detection circuit 501 to detect the presence or absence of a specific color marker.

In the example, since two types of markers, red and helmet markers, are applied, two markers No. 48 BP are used.

RP will be detected.

Each marker signal RP, BP is provided by a preprocessing circuit 502.50, respectively.
3, and is preprocessed to become a marker signal faithful to the designated area. Preprocessing is a type of signal waveform shaping process, and in the embodiment, the blur correction circuit 504.50
7. Preprocessing circuits 502 and 503 are composed of noise correction circuits 505 + 508 (both in the main scanning direction) and marker cutout correction circuits 506 and 509 in the sub-scanning direction.

Color marker blur correction corrects blur within 16 dots/mm, and noise correction corrects data loss within 8 dots/am.

It is also possible to remove these processes by changing the thickness of the marker.

The waveform-shaped marker signals RP and BP are supplied to the area extraction section 520 together with the color code data, and a gate signal S for extracting density data formed based on the area signal indicating the inside of the specified area a is applied to each scanning line. output every time.

These more specific configurations will be explained below.

FIG. 29 shows an example of the color marker detection circuit 501. By scanning the color marker, the color of the marker itself can be detected.

The lower two bits of the blue color code data are “01”
”, and the lower two bits of the red color code data are '10''.

Therefore, as shown in the figure, the lower 1 bit data and the middle 1 bit are phase inverted by an inverter 511 and are supplied to an AND circuit 513.

Similarly, the lower 1 bit whose phase is inverted by the inverter 512 and the middle 1 bit itself are supplied to the AND circuit 514.

Then, the AND output of the vertical valid area signal V-VALID and the size signal B4 obtained from the AND circuit 515 is supplied to the AND circuit 518 together with the upper 1 bit of the color code, and the color marker is determined.

The judgment data is used as a gate signal for each AND circuit 513.
, 514.

As a result, when the color marker is a helmet, the blue marker signal B has a pulse width corresponding to the thickness of the outline of the marker.
P can be output from terminal 516.

Similarly, when the color marker is red, the red marker signal RP is output to the other terminal 517. An example of the marker signal is shown in FIG. 27.

An example of the area extraction section 520 is shown in FIG.

The area extraction unit 520 includes first and second area extraction units 520A.
, 520B, each of which is a data storage circuit 521A.
and area calculation circuit 522A, and data storage circuit 521B.
and a region calculation circuit 522B. First and second area extraction units 520A.

520B both have a function of extracting a red marker area in addition to a function of extracting a helmet marker area. For convenience of explanation, region extraction of the blue marker will be explained.

When forming the area signal of the helmet, the area signal of the current scanning line is calculated and formed from the area signal obtained by scanning immediately before and the marker signal obtained by scanning the current scanning line.

For this purpose, it is necessary to perform arithmetic processing using a period of at least three lines. Therefore, the first data storage circuit 521A has the function of storing the area signal, which is the final data of the immediately preceding scanning line, over one line, and also from the marker signal BP obtained by scanning this area signal and the current scanning line. The formed first and second area signals (
In reality, it must have a function to memorize the NAND output) and a function to roughly memorize the area signals of the current scanning line obtained by processing the = sign.

Furthermore, in the embodiment, the second area signal is formed by reading the memory from the reverse direction, so the number of memories required to realize these memory functions is:
There will be 16 pieces in total. Roughly speaking, it is necessary to detect the red marker, so 32 line memories are required in total.

Therefore, the first data storage circuit 521A has 8
A pair of memories 525.5 consisting of line memories
It has 26. In order to switch and use these for each line, a pair of Schmitt trigger circuits 523, 5
24, a pair of data selectors 527 and 528 and a latch circuit 529 are provided.

In addition to the blue marker signal BP, the first data storage circuit 521A has a blue marker signal BP as an input signal, as well as a blue first area calculation circuit 530.
The three signals obtained at B can be supplied.

In the first area calculation circuit 530B, the immediately previous area.

An area signal QB' of the blue marker on the current scanning line n is formed from the signal QB and the marker signal BP on the current scanning line.

For convenience of explanation, considering the scanning line n shown in FIG. 27, the relationship between the area signal QB (this is the area (number 8) of the scanning line (n-1)) and the marker signal BP is as shown in FIG. 31B. , C. These signals are stored in the memory 525
is stored line by line.

In the next scanning line (n+1), these signals are read out via the data selector 527 and latch circuit 529 (E in the figure).

The pair of signals QB and BP are fully supplied to the NAND circuit 531,
The NAND output FBI (F in the figure) is fully supplied to the preset terminal PR of the D-type flip-flop 532, and the immediately preceding area signal QB is supplied to its clear terminal CL. the result,
A first NAND output (first contour signal) BNO as shown in G in the figure is obtained.

The first NAND output BNO and marker signal BP are stored in memory 526 sequentially. Therefore, scanning line (n+4
), the Schmitt trigger circuit 524 is controlled to be active.

A similar processing operation is also executed at the same timing in the second area extraction unit 520B. However, the addresses of the memories provided therein are controlled so that writing is performed in the forward direction and reading is performed in the reverse direction.

Therefore, the output timing of the marker signal BP and the immediately preceding area signal QB is Wl for the n line, whereas it is (n+
1) If it is a line, it becomes W2 and can be read out a little faster (H and I in the figure). As a result, the second NAND output B
NI will be as shown in the same figure. The marker signal BP and the second NAND output BN1 can be stored again in the data storage circuit 521B.

In the next scan line (n+2), the first NAND output B
No, the marker signal BP and the second NAND output BNI are read out (L to 0 in the figure).

Here, as described above, the memory provided in the second area extracting unit 520B is capable of writing in the forward direction and reading in the reverse direction, so in this example, the first NAND output BNI and the second
Read timing of NAND output BN2 W3. W4 matches.

Both are supplied to the AND circuit 533, and the AND output AB and the marker signal BP (N, 0 in the figure) are supplied to the OR circuit 'l5534, whereby an OR output QB' as shown in P in the figure is obtained.

This OR output QB' is nothing but a signal indicating the inside of the outline of the blue marker drawn on the current scanning line n. In other words, this OR output becomes the area signal QB' of the current scanning line.

Since the area signal QB' is used as the immediately previous area signal QB on the next scanning line, the data storage circuit 521A
, 521B is easily understood.

Thus, a pair of NAND outputs BNO obtained by reversing the memory read direction.

By using BNI, marker areas can be detected accurately.

Since the detection of the red marker is exactly the same, the area calculation circuit 5
Description of 30R will be omitted. However, 535 is a NAND circuit, 536 is a D-type flip-flop, 537 is an AND circuit, and 538 is an OR circuit.

QR'' indicates a red marker area signal.

Schmitt trigger circuits 523, 524, memory 525.
The reason why a pair of data selectors 526 and data selectors 527 and 528 are prepared is to take into consideration the case where a blue marker and a red marker exist at the same time. Therefore, these lines can be alternately switched and used on a line-by-line basis by a two-line cycle switching signal supplied to terminals A and B.

The area signals QB', QR'' obtained at the output terminals are supplied to an area determination circuit 540 shown in FIG. 32.

When specifying a marker as shown in FIG. 33A, the area determination circuit 540 performs control so that, for example, only the area of the designated red marker is recorded as a black image, as shown in FIG. 33B. It is a means.

The area determination circuit 540 includes four flip-flops 541 to
544, and front-stage flip-flops 541 and 542
area signal QB” latched at

QR= is supplied to the corresponding NAND circuits 545 to 549, and the area signals QB" and QR" latched by the flip-flops 543 and 544 at the subsequent stage are supplied to the corresponding NAND circuit 54.
5-549. And each NAND circuit 5
Color code data CC indicating black can be supplied to 45 to 549 via an AND circuit 554. A CLR signal indicating image processing designation is supplied to the switching circuit 553.

Now, when considering the signal relationship on scanning line n shown in FIG. 33A, it becomes as shown in FIGS. 34 and 35.

Fig. 34 shows what kind of FF outputs, Ql, Q2 (H,
This shows whether L) is obtained.

Therefore, by the signals shown in FIG. 35A-C, the first NAND circuit 545 outputs the first NAND output M1 shown in the same figure.
is obtained. Similarly, the second NAND circuit 546 has 5j
Based on the input signals shown in Fig. J, the second signal shown in Fig.
A NAND output M2 is obtained. As a result, the first AND circuit 551 outputs the gate signal S1 related to the section Ill shown in H in the figure.

Similarly, the third NAND output M3 in the figure is obtained from the input signal I- in the figure, and the fourth NAND output M4 in the figure 0 is obtained from the input signals M and N in the figure.

As a result, the second AND circuit 552 outputs the gate signal S2 (P in the figure) related to sections II and IV.

Then, in response to the input signal Q-S in the figure, the fifth NAND circuit 549 outputs the gate signal S3 (T in the figure) corresponding to the sections I and ■.

The gate signals 81 to S3 can be selected in the switching circuit 553 according to the CLR signal indicating image processing designation.

Therefore, when using the blue marker, the gate signal s1 can be selected, thereby forming an area signal with the blue marker.

Similarly, when using the red marker, gate 45
When the marker S2 is in the black-only recording mode, the gate signal s3 can be selected, and when both red and blue markers are used, the gate signals Sl, S2. All S3 are selected. Therefore, when there are two colors of red/black, St.

S3 is selected, and the black image inside/outside the red marker will be processed and recorded. Selection of the other two colors is done in the same way.

Gate signal 81 output from switching circuit 553
-S3 are all used as area signals S.

Furthermore, whether to use the inside or outside of this region signal S is selected by a marker inside/outside designation signal supplied to the terminal 558.

Therefore, the area signal S is directly supplied to the gate circuit 555 and is also supplied to the gate circuit 555 via the inverter 556.
When the signal S7 is completely supplied and the inside of the marker is designated, the gate circuit 555 opens and the area signal S itself is output.

On the other hand, when the outside of the marker is specified, the other gate circuit 557 is opened and an inverted signal of the area signal S is output.

Other examples of area extraction processing are shown below.

This processing simply refers to the detection of a specified area and the processing of image data or colors within the specified area, so extraction, erasure, inversion, filling, and any combination of these processes of partial areas are also applicable. It can be handled using a similar way of thinking.

It is also possible to predetermine the processing content for each color marker and perform the pre-booked processing on the detected area.

Although the background color of the original is white, it may be any other color.

As the color marker, red-based colors (orange, pink) and blue-based colors are suitable.

If it is not possible to write color markers directly on the original, the same effect can be achieved by marking on a transparent sheet.

Note that the area may be specified by filling out the necessary area as shown in FIG.

In the processing means 420, processing (extraction/erasing/filling processing) can be selected according to a processing designation signal designated from the outside.

FIG. 37 is an example of the means 420.

This means 420 receives, in addition to the image data that has passed through the color ghost correction means 300, the region signal S created in the region extraction means 5°O through corresponding input terminals 651 and 65.
2.

When the document is in color, the image information of which color is to be subjected to processing such as extraction and erasure is specified from the outside.

For this purpose, a match circuit 655 is first provided, to which achromatic designation data is supplied together with the color code (lower two bits). Therefore, when the achromatic designating data and the color code match, the input image data is blocked by the gate circuit 656.

FIG. 39 shows what kind of processing is finally executed by specifying the achromatic degree. Here, when the achromatic designation code is "°' o o o", no achromatic processing is performed and all image information of the document is recorded as a black and white image.Similarly, "001°°" By specifying , only the blue image is erased, and recording processing is performed on other input images.

In order to perform such processing, the matching circuit 655 is designed to provide an output P as shown in FIG. Figure 40 shows the output P only for some achromatic modes.
An example of the relationship between

The image data gated by the gate circuit 656 is supplied to a multiplexer 657 and converted into image data corresponding to processing specification No. 48.

If °°extraction°° processing is specified as the processing designation signal, image data will be output only while this is being obtained, and the same goes for "deletion".

During processing, the output of image data is blocked during that time, and °°
When specifying the filling process, a signal of °°1" (predetermined DC voltage) can be output as image data instead of the input image data.

Therefore, the multiplexer 657 is supplied with +B power in addition to image data.

For image data that has not undergone the conversion process corresponding to the processing designation signal, only the area roughly related to the area signal S is extracted.

Therefore, first, a converted signal for extraction or filling is supplied to the gate circuit 661 via the NOR circuit 660, thereby controlling the output state of the area signal S.

The image data is coarsely gated by the gated area signal S. 658 is a gate circuit for that purpose.

The image data output from this gate circuit 658 becomes the final output from the means 420.

FIG. 38 shows an example of a multiplexer 657, which can be composed of a plurality of gates 663 to 665 as shown.

In the case of filling processing, the gate circuit 663 is turned on and a predetermined DC level is output as image data of "°1°°."

Since the extraction and erasing processes are opposite processing operations, the gate circuit 664 is opened so that image data is output in the case of extraction, and the opposite operation occurs in the case of erasing.

Conversion processing such as extraction and deletion is performed according to external specifications.

FIG. 41 shows an example of this conversion process control signal generation circuit 670. A conversion process designation signal is supplied to terminals a and b, which is decoded by a decoder 671 and converted into three signals. Its output is AND circuit 672
~674, and the conversion processing control signal (extraction, erasure, filling) can be obtained only for the necessary area.

An example of the decoder 671 is shown in FIG. For example, when the conversion processing designation signal is °' o o '', the outputs c + d and e of the decoder 671 become '100°', which causes only the AND circuit 672 to be in an open state. This is the conversion processing control signal.

The signals obtained by each AND circuit 672-674 are supplied to the corresponding terminals in FIG. 37.

The image data for which conversion processing such as extraction and erasure has been completed is then supplied to pixel density conversion means, that is, enlarging/reducing means 1, where scaling processing according to a specified magnification is executed.

That is, this enlargement/reduction processing is performed on 6-bit image information.

In this example, 1.0% between 0.5x and 2.0x
This is a case where the image can be enlarged or reduced in increments.

Here, also in this invention, in principle, the enlargement process increases the image data, and the reduction process is an interpolation process that thins out the image data. The enlargement/reduction processing in the main scanning direction shown in FIG. While the exposure time of the element is kept constant, the movement speed of the photoelectric conversion element or the sub-scanning direction is changed.

Slowing down the movement speed in the sub-scanning direction enlarges the original image,
If you speed it up, it will shrink.

An example of an enlarged/reduced image is shown in FIG.

FIG. 45 shows a specific example of the enlargement/reduction circuit 1.

In the figure, a timing signal generation circuit 10 is used to obtain timing signals for controlling the processing timing of the entire enlargement/reduction circuit 2, and includes a CCD 10.
Similarly to 4,105, the synchronous clock CLKI,
Horizontal valid area signal H-VALID.

Vertical valid area signal V-VALID and horizontal synchronization signal H-S
YNC is supplied.

The timing signal generation circuit 10 first outputs a synchronization clock CLK2 that is output only during the period of the horizontal valid area signal H-VALID. This is the same frequency as the synchronization clock CLKI.

In general, memory control signals lN5EL and 01lTSEL are output to the memories provided in the input buffer sofa 400 and the output buffer 350, respectively.

Image data D having 64 gradation levels is input to the input capacitor 4.
00.

The input capa sofa 400 is provided based on the following reasons.

Firstly, since the number of image data used during enlargement processing increases compared to before processing, it is possible to effectively increase the processing speed after data increase without increasing the frequency of the basic clock. This is to do so.

Second, this is to ensure that an enlarged image during enlargement processing is recorded with the center as a reference.

Therefore, in order to satisfy the first condition during the enlargement process, the read clock RDC supplied to the capa sofa 400 of this person
The frequency of LK is lowered than the normal frequency. In order to satisfy the second condition, the read start address can be set according to the magnification. The details will be described later.

Image data D output according to the specified magnification/reduction ratio
are supplied to two cascade-connected latch circuits 11 and 12, and image data Dl of two adjacent pixels of image data D having a 6-bit configuration and thus output with a halftone level.

DO is latched at the timing of latch clock DLCK. The latch clock DLCK is the synchronous clock CLKI
It has the same frequency as .

Image data Do latched by latch circuits 11 and 12,
DI is a memory for interpolation data (ROM is used, hereinafter referred to as interpolation R).
(referred to as OM) 13.

The interpolation ROM 13 is an interpolation data table in which image data having a new halftone level referenced from two adjacent image data (hereinafter, this image data will be referred to as interpolation data SS) is stored.

As address data of the interpolation ROM 13, in addition to the above-mentioned pair of latch data Do and DI, interpolation selection data S
D is used.

700 is an interpolation data selection means that stores interpolation selection data SD and the like. As will be described in detail later, the interpolation selection data SD is used as address data for determining which data is to be used as interpolation data from among the data table group selected by the pair of latch data Do and DI.

The interpolation selection data SD is determined by the set magnification for enlargement/reduction, as will be described later.

FIG. 46 shows an example of interpolation data SS selected by latch data Do, DI and interpolation selection data SD. In the embodiment, interpolated data is obtained by linearly interpolating Do and DI data.

In Fig. 46, SS is interpolated data (6 bits) output as 0 with 64 gradation levels, and since the image data Do and DI used as latch data each have 64 gradation levels, the interpolated data As SS, 64
X64=4096 data blocks are included.

The figure shows the theoretical value (5 decimal places) obtained by linear interpolation at each step when DO=O1DI=F, and the value of the interpolation data ss actually stored in the memory, for each case of positive slope and negative slope. Show about.

Then, the interpolated data SS output from the interpolation ROM 13 is latched by the latch circuit 14, and then transferred to the output buffer 35.
0. The output buffer 350 is provided to process invalid data caused by a reduction in image data during image reduction. Roughly speaking, this is to ensure that the reduced image is recorded with the center of the recording paper P as a reference when reducing the image.

The final 6-bit data obtained from output buffer 350 is sent to MTF correction circuit 450.

FIG. 47 shows an example of the input buffer 400.

The input buffer 400 includes a pair of line memories 401.4.
02 are provided, and one line of image data D is supplied to each. The reason for providing the pair of line memories 401 and 402 is to alternately supply image data for one line so that writing and reading of image data can be processed in real time.

The line memories 401 and 402 have a capacity of 4096×8 bits. This capacity increases the resolution to 16
This is the value when dots/am and the maximum original size is 84 plates (horizontal length is 256 mm).

When writing data to the line memory, the write clock CL K2 is used, and when reading data, the read clock RDCLK is used. The response counters 405 and 406 are fully supplied.

The read 0 check RDCLK is set to a frequency different from the normal frequency when specifying the enlargement magnification. The frequency to be set differs depending on the specified magnification.

The first and second switches 403 and 404 are complementary controlled so that when one line memory is in the write mode, the other line memory is in the read mode. The switch control signal for this purpose is the control signal lN5 generated by the timing signal generation circuit 10.
EL is used.

In this case, one of the signals is supplied with its phase inverted by the inverter 409. The control signal lN5EL is a rectangular wave signal with one period being two horizontal periods (see Figure 63).
.

Here, even when enlarging an image, the enlarged image is
In order to record data based on the center of the image, the writing start timing is controlled during the enlargement process according to the enlargement magnification. Therefore, the clock CL K2 is a clock output f! composed of a gate circuit, etc. II control circuit 4
10 to the first and second switches 403 and 404.

The control circuit 410 can be supplied with preset data Po for controlling the write start timing.

This control port 1410 is configured to output the clock CLK2 from the time when the clock CLK2 is counted and its value matches the preset data PO. This limits the amount of data written to the input buffer 400, a detailed explanation of which will be given later.

The output from the line memories 401 and 402 is selected by the third switch 407, and then the latch circuit 11
is supplied to The above-mentioned control signal IN5EL is used as the switching signal.

FIG. 48 shows an example of the output buffer 350.

Its configuration is almost the same as that of the input buffer 400, but since image data after enlargement/reduction is stored, the line memories 351 and 352 have 4096×8 bits which are fully used.

Further, 353, 354, and 357 are first to third switches, 355 and 356 are address counters, and 359 is an inverter.

The control signal for switch selection is the signal 0UTSEL (63rd signal) generated by the timing signal generation circuit 10.
(see figure) is used.

The frequency of the clock L CK2 is changed only when the reduction magnification is specified. Clock PCLK is a synchronous clock for output device 70.

Address counters 355 and 356 are supplied with addressing data for setting their initial addresses. Therefore, as shown in the figure, the write start address data and the read start address data are sent to the respective counters 355 and 3 through the fourth and fifth switches 361 and 362.
56.

In this case, the switch control signal QUTSEL can control the write start address data and the read start address data to be supplied alternately for each line. The read start address is always designated as the O address, and the write start address is automatically changed according to the magnification so that the reduced image is always recorded with the center as the reference. Details will be described later.

Both the write start address data and the read start address data are supplied from a system control circuit (not shown).

Here, the processing operations of the input buffer 400 and the output buffer 350 will be explained with reference to FIGS. 49 to 51.

FIG. 49 shows the processing operation at the same magnification, and the frequency of the read clock RDCLK supplied to the input buffer 400 with respect to the synchronous clock CLKI in A of the same figure is the same as the frequency of the synchronous clock CLKI (B ). As a result, image data D shown in FIG.

As a result, interpolated data SS as shown in the figure is obtained.

This interpolated data SS is finally sent to the output buffer 350.
is supplied to and temporarily stored.

In this case, the frequency of the write clock LCK2 supplied to the output buffer 350 is the same as the frequency of the synchronous clock CLKI.

On the other hand, FIG. 50 shows the processing operation when the magnification is set to 2 times.

When the magnification is set to 1x or higher, the input buffer 40
Only the frequency of the read clock RDCLK to 0 is changed according to the set magnification.

When the magnification is set to 2, the frequency of the read clock RDCLK supplied to the input buffer y400 is reduced to 1/2 of the A synchronous clock CLKI in the figure (B in the figure). As a result, image data D shown in FIG.
It can be supplied as address data of OM13. As a result, one piece of interpolated data SS is obtained for one cycle of the synchronous clock CLKI, as shown in the figure. This interpolated data SS is supplied to the output buffer 350 and temporarily stored.

In this case, the frequency of the write clock LCK2 supplied to the output buffer 350 is the same as the frequency of the synchronous clock CLKI (see E in the figure).

In this way, even if a magnification of 1x or more is selected, the enlargement process is performed by lowering the frequency of the read clock RDCLK, so all clocks other than the clock RDCLK supplied to the input buffer 400 remain as the basic clocks. A processing operation is performed.

Therefore, as the enlargement/reduction circuit 1, it is not necessary to use circuit elements with high operating speed.

Of course, since the clock frequency of the input buffer 400 is lower than the clock frequency at the same time,
All circuit elements do not need to operate at high speed.

At the time of reduction, for example, when reducing an image by 0.5 times, as shown in FIG. The frequency of the write clock LCK2 is reduced to 1/2. As a result, the writing timing of the interpolated data SS becomes once every two cycles, so that excess image data is thinned out and stored in the output buffer 350.

Note that details of the enlargement/reduction processing operation will be described later.

Now, the interpolation data selection means 700 shown in FIG. 45 is composed of a data selection signal write circuit 710 and a data selection memory 720. Data selection signal write circuit 7
10 includes interpolation selection data SD determined by the magnification and a processing timing signal TD for controlling such that the interpolation selection data SD is output at a timing corresponding to the magnification.
are stored in each block.

Since the interpolation selection data SD has a large capacity, a large capacity ROM is used for its write circuit 710. In this case, a dedicated ROM can be used, but the ROM for the control program provided in the system control circuit is
M may also be used.

The data selection memory 720 stores data SD and T corresponding to the magnification designation among the interpolation selection data SD and the processing timing signal TD stored in the interpolation selection data writing circuit 710.
Used to write D.

Therefore, the interpolation selection data SD during actual image processing
The interpolation selection data written in this data selection memory 720 is used.

For this reason, as the data selection memory 720, a static RAM or the like that can be written and read at high speed is used.

The magnification designation data and the magnification set pulse DS are each supplied to the write circuit 710.

On the other hand, interpolation selection data SD to data selection memory 720
, when writing the processing timing signal TD, the write circuit 7
The clock 5ETCLK on the 10 side is used. Therefore, as shown in FIG. 45, a clock selection circuit 730 is provided on the data selection memory 720 side to select between the synchronous clock CL K2 and the write clock 5ETCL from the write circuit 710.

The selected clock is counted by the counter 74-0, and its output is sent to the 12-bit address terminals AO to All in the data selection memory 720 as address data.
is supplied to

Here, the counter 740 can be configured to generate a carry pulse when counting 4096 clocks (therefore, data for 4096 pixels).

The carry pulse is the transfer end signal (write end signal) C3
(Figure 53B).

FIG. 52 shows an example of the write circuit 710.

In the figure, 711 is a data ROM, which stores interpolation selection data SD and processing timing signal TD as shown in FIGS. 54 and 55.

Here, prior to image reading, interpolation selection data SD etc. stored in the write circuit 710 are data set based on a data set pulse (magnification set pulse) DS (FIG. 53A) after a magnification is specified from outside. ROM71
1 data is transferred to data selection memory 720.

The data set pulse DS is supplied to a control circuit 712 shown in FIG. 52 to generate a write enable control signal ES shown in FIG. 53C.

The control signal ES is supplied to the counter 713,
Clock 5ET from oscillation circuit 714 supplied to this
The count state of CL is controlled (Figure 53, E)
. Control signal ES is °゛O°.

During the period, the interpolation selection data SD corresponding to the addresses AO to 〇 by the counter 713 and the addresses A7 to A13 according to the specified magnification, and the processing timing signal TD are repeated in block units (Fig. 54 and Fig. 55 - dot-dashed line area). Thus, 4096 pieces of data corresponding to one line are written into the data selection memory.

Here, as shown in FIGS. 53F and 53H, when the magnification is 160%, 160 clocks (data for 160 pixels) are used, and when the magnification is 80%, 100 clocks (data for 160 pixels) are used.
00 pixels worth of data) will be repeated.

Furthermore, since the data ROM 711 has a slow access time, it is read out using a clock having a lower frequency than the normal reading speed. The write timing is synchronized with data transfer lock 5ETCL.

Note that the buffer circuit 715 receives the signal from the data ROM 711 in the image reading state from the data selection memory 7.
20 and the synchronization circuit 750 side to be described later, and the control signal ES is 0°.

It is active only during the period of .

The control signal ES is also applied to the data selection memory 720.
It is also used as an enable signal for writing to (see FIG. 45).

When writing of the data (4096 pieces of data) to the data selection memory 720 is completed, a transfer end signal C3 is output from the counter 740, thereby ending the data writing period (see FIG. 53).

Thereafter, the normal image processing mode is entered, and the interpolation selection data SD and processing timing signal T are stored in the data selection memory 720.
D is read out and supplied to the synchronization circuit 750 at the subsequent stage.

The counter 713 is cleared by a clear signal CLR (F in the figure), but this clearing timing differs depending on the magnification.

Note that when the reduction magnification is used, the image becomes as shown in H in FIG. 53. G and H in the same figure are counter 7 when the magnification is 80%.
13 shows the relationship between the address data No. 13 and the clear signal CLR supplied thereto.

The processing timing signal TD is the interpolated data S as described above.
When S exists, it is selected as °l l II, and when it does not exist or when data is to be thinned out, it is selected as °0゛°.

FIG. 56 shows an example of the synchronization circuit 750 in FIG. 45.

The synchronous circuit 750 includes a plurality of latch circuits 7 as shown in the figure.
51 to 755 and a plurality of AND gates 361 to 364, and the interpolation selection data SD is stored in the latch circuit 751.7.
52 and 755 in sequence.

On the other hand, data of bit 1 of the processing timing signal TD is sequentially latched by latch circuits 751 to 754. On the other hand, the data of bit O is stored in latch circuits 751 and 752.
It is latched with.

The synchronous clock CLK2 is applied to the latch circuits 751 to 754, and the remaining latch circuits 755 and AND gates 761 to 7
64 is supplied with a phase-inverted synchronization clock CL K2 as a latch clock.

On the other hand, the latched processing timing signal TD is supplied to the plurality of AND gates 761 to 764. And゛,
The output of the AND gate 761 is supplied as the read clock RDCLK of the input buffer 400, and the output of the AND gate 762 is supplied as the latch clock DLCK of the latch circuits 11.12.

Similarly, the output of the AND gate 764 is sent to the output buffer 35.
It is supplied as the write clock LCK2 of 0, and the output of the AND gate 763 is supplied as the latch clock LCKI of the latch circuit 14.

Here, the AND gates 761 to 764 are open when the processing timing signal TD is °°1°, and are closed when the processing timing signal TD is °0°.

By configuring the synchronization circuit 750 in this way, it is possible to generate read and write clocks having a frequency corresponding to the specified magnification. A specific example will be explained below.

FIG. 57 shows a timing chart when a magnification of 160% is selected.

First, as shown in FIG. 59, 4 bits of the data output from the data selection memory 720 are interpolation selection data SD, and of the remaining 4 bits, bit 0 is the read clock for the input buffer 400. R.D.
CLK and is used as data for the latch clock DLCK for the latch circuits 11 and 11.

Further, bit 1 is used as a write clock LCK2 to the output buffer 350 and a latch clock LCKI to the latch circuit 14. Bit 2 is data ROM7
It is used as a clear signal CLR for the repetition number 8 to 11 and the counter 714. Bit 3 is an unused bit in this example.

When the magnification is 160%, the interpolation selection data SD shown in FIG. 57B is output from the data selection memory 720, and the data shown in FIG. Output.

Both B and C in the same figure show interpolation selection data SD.
C shows the timing before latching by the latch circuit 751, and C shows the timing after latching.

Therefore, the latch circuit 752 at the next stage outputs each signal delayed by one cycle as shown in F to H in the figure. Since the interpolation selection data SD can be further latched by the latch circuit 755, it is delayed by approximately one cycle, so that the result is as shown in FIG. The interpolation selection data SD shown in (2) in the figure is supplied to the interpolation ROM 13 as address data.

In the same figure, the AND gates 761 and 762 are supplied with the processing timing signal TD of bit 0 indicated by G.
If these are ANDed with the synchronization clock CLK2 having the opposite phase, the read clock RDCLK and latch clock DLCK shown in J and K in the same figure are obtained.

Furthermore, since the processing timing signal TD of bit 1 is latched in the latch circuits 753 and 754 (M in the figure), the signal from the AND gates 763 and 764 is N in the figure.
, O, lock 1-CKI and LCK2 are output. These clocks LCKI and LCK2 are clocks with opposite phases to each other, but their frequency is the same as that of the synchronous clock C.
Same as LKI.

In this manner, when the enlargement factor is selected, only the frequency of the read clock RDCLK supplied to the input buffer 400 is changed.

FIG. 58 is a timing chart when reducing the size to 80%.

In this case, the data selection memory 720 outputs the interpolation selection data SD shown in FIG. 3B, and the data shown in FIG.

Read clock RD supplied to input buffer 400
CLK and latch clock D to latch circuit 11.12
The LCK will be as shown in Figure J. That is, these frequencies do not change.

On the other hand, since the latch circuits 753 and 754 can output the latch clock shown as M in the same figure, the latch clock LCKI shown as N in the figure can be obtained from the AND gate 763. And the other AND gate 76
4, the write clock LCK2 shown in O in the figure is obtained.

In this way, when reducing an image, only the frequency of the write clock to the output buffer 350 is changed according to the set magnification.

Then, as mentioned at the beginning, C9, which records the enlarged/reduced image with reference to the center line a of the recording paper P, controls the writing start timing of the input buffer 400 or the reading start timing of the output buffer 350. All you have to do is move out. The reason for this will be explained next.

As mentioned above, the maximum image reading size of CCD104.105 is 84 format, and its resolution is 16 dots/
If it is assumed to be mm, the memory capacity for one line is 4096 bits. Therefore, line memory 401,
402 and 351.352 need only have a capacity of 4096 bits.

At the same magnification, line data with a capacity of 4096 pits is supplied as is to the output buffer 350 side, and then output to the output device 7.
It will be supplied to 0.

On the other hand, when enlarging an image, the amount of image data in the input buffer 4°O increases according to the magnification, and the increased image data is supplied to the output buffer 350.
If left as is, the image data will overflow and not only will it be impossible to store the required image data in the output buffer 350 without giving up, but also it will not be possible to record the image with the center as the reference.

When the original image is enlarged twice, the amount of image data becomes twice the original image data due to interpolation processing. Therefore, the amount of data written to the input buffer 400 is limited to 1/2 in advance.

On the other hand, the 2048th bit of the image data is 1/2 c'' of the capacity (4096 pits) of an effective horizontal line (effective length) in 84 format, and this corresponds exactly to the center a of the recorded image.

For this reason, a total of 2048 bits from the 1024th bit to the 3072nd bit of the input image data are transferred to the output of the input cover sofa 400 as shown in FIG. 60A.
By writing sequentially from the address, even if the amount of data is doubled by interpolation processing, all of the image data can be written to the output buffer 350 (FIG. 3B).

In this case, as shown in FIG. 60B, the image data after the interpolation processing is data that has been enlarged around the center a of the image, so that a part of the necessary image may be missing and recorded. Nothing happens.

Therefore, when enlarging, if the write start address of the input buffer 400 is controlled according to the set magnification, it is possible to record the image on the recording paper P with the center of the image as the center, as shown in FIG. 61B. can.

Therefore, the preset data Po for enlargement is set as follows.

Preset data PO = (4096x enlargement magnification - 4096) / 2
FIG. 61C shows an example of recording at the same magnification.

During the reduction process, as shown in FIG. 60C, the input buffer 4
Writing and reading data to 00 is the same as when the data is at the same magnification, and data is written from the 0 address and read from the O address.

Then, when the image is reduced by 0.5 times, the image data for one line is reduced to 1/2 by interpolation processing,
This image data is written into the output buffer 350.

If the read image data is written as is to the output buffer 350, the image data will be written from the O address of the output buffer 350 as shown in Figure E, and the image data from this O address will be recorded. paper P
Since the images will be recorded sequentially from one side of the
It will be recorded only as shown in Figure 4A.

To avoid this, the write start address should be set to the 1024th address (D in the figure).

Then, if the read start address is set to the O address, empty data (corresponding to white) will be recorded up to the 1024th bit, so the recorded image will be the 61st bit.
As shown in FIG. A, a reduced image is recorded around the center island of the recording paper P. The read start address is set by preset data Po.

Therefore, the write start address of the output buffer 350 is set as follows: Write start address=(4096-4096x reduction magnification)/2.

For this reason, if the write start timing (preset data Po) of the input buffer 400 and the write start address of the output buffer 350 are appropriately selected according to the enlargement/reduction magnification, a line memory with a capacity of one line can be created. It is also possible to realize central reference recording processing.

FIG. 62 shows an example of setting the write start address data and preset data Po.

FIG. 63 shows an example of the processing operation described above.

As shown in D-G in the same figure, both the preset data PO and the write start address
Set in synchronization with HC.

The write and read timing for the input buffer 400 is shown in E in the same figure. Similarly, output buffer 35
The write and read timing for 0 is shown in Figure F,
Shown in G.

As described above, the control signals 1N5EL and 0UTSEL are rectangular wave signals whose period is two horizontal periods.

A timing chart of signals in each part during interpolation processing is shown in FIG. 64.

The original image data obtained from the CCDs 104 and 105 are converted into Do(0), DI(F), D2(F)
, D3(0), D4(0) (the gradation level of each image data is shown in parentheses).

When the read clock RDCLK is completely supplied to the input buffer 400, image data D is output after access time tl (Fig. 64A, B), and this is the latch clock D.
It is latched by LCK (C in the same figure).

In synchronization with the latch clock, latch circuits 11 to 01 (F
) is output, the latch circuit 12 outputs D O
(0) is output (E in the same figure).

Note that the latch clock DLCK is the synchronous clock CLKI.
It is only one cycle behind.

On the other hand, according to the magnification signal set externally, the interpolation selection data SD is O;28;10;38;... (64th
Figure F) can be output.

As a result, from the interpolation ROM 13, image data Do, D
The interpolation data table is referred to by I and the interpolation selection data SD, and necessary interpolation data SS (G in the figure) is output. Therefore, the interpolated data SS are 0 (So), 9 (S+), F (S2)
, F (S3).

8 (S4), O (Ss), ...

The read interpolation data SS is sequentially sent to the latch circuit 14 (H and I in the figure). Binarized interpolated data SS
is the output buffer 35 by the write clock LCK2.
0 (J in the same figure).

K).

In FIG. 64, t2 is the access time of the interpolation ROM 13, and t3 is the access time of the output buffer 7350.

Next, the reduction process will be explained. FIG. 65 shows a timing chart of signals when the reduction rate is 80%.

It is assumed that the gradation level of the image data is the same as in the case of the enlargement process described above.

Then, two adjacent image data (for example, image data D1.Do) are supplied from the latch circuits 11 and 12 as address signals to the interpolation ROM 13, and the externally set reduction magnification (80%) is used to write the data selection signal. What is supplied to the circuit 710 is also the same as in the case of the enlargement process described above.

In the case of reduction processing, both the read clock RDCLK and the latch clock DLCK have the same frequency as the synchronization clock CLK1, and are transferred from the input buffer 400 to the interpolation ROM 13.
The relationship between the signals up to this point is as shown in FIGS. 65A to 65F.

On the other hand, since the latch clock LCKI is as shown in G in the figure, the latch output becomes as shown in H in the figure.

Here, the write clock LCK2 is also the latch clock L.
Since the frequency is the same as that of CKI, data as shown in (3) in the figure is written into the output buffer 350.

In the embodiment described above, if the magnification of enlargement or reduction is changed, the interpolation selection data SD output from the selection memory 720 for interpolation data changes, and the interpolation ROM 13 is addressed accordingly and the corresponding interpolation data SS is changed. It is clear that it will be output.

Incidentally, in the above description, the invention is applied to an image processing apparatus that reads an image based on the center of the document and records the image based on the center of the recording paper, but the present invention can also be applied to other image processing apparatuses. can do.

Firstly, both image reading and image recording can be done based on one side of the document (recording paper).
Image reading start position of CCD 104, 105 and recording start position (light scanning start position, in laser printer,
Since the recording beam start position of the laser beam is the same, the present invention can be applied without any problems.

Second, in an image processing apparatus of the type in which image reading is performed based on the center line of the document and image recording is processed based on one side of the recording paper, the readout start address of the input buffer 400 is as follows. become.

In this case, the preset data Po of the output buffer 350
is always 0. On the other hand, the read start address cannot be determined only by the magnification signal. It varies depending on the size of the manuscript.

Therefore, in this type of image processing apparatus, the readout start address is determined from the specified magnification indicating the document size.

As shown in FIG. 66, the case where the size of the document 52 to be read is A4 size will be described below.

As mentioned above, when the width is 16 dots/11 m, the number of bits in the width of A4 size is 210 mm x 16 ots/mm = 3360 bits, so if the maximum readable document size is 84 size, the width Y in Fig. 66 is The value obtained by multiplying by the magnification becomes the read start address for the input buffer 400.

Therefore, the read start address is (4096-3360)/2=368 bits.

FIG. 68 shows the values of the write start address and preset data Po at any magnification.

However, the original size is A4 size.

The reason why the write start address and preset data Po are constant regardless of the magnification is because the image is recorded with one side as the reference.

Thirdly, as shown in FIG. The preset data PO and the write start address of the output buffer 350 are determined as follows.

That is, in the case of 4096>3360X magnification, the write start address address can be set, and in the opposite case, the preset data Po is set.

Therefore, when 4096>3360x magnification, the write start address is: Write start address = (4096-3360x magnification)/2 At this time, the preset data Po of the input capacitor sofa 400 is set to O.

On the other hand, when 4096<3360X magnification, preset data Po is preset data P.

= (3360-4096/magnification)/2. The write start address of the output buffer 350 at this time is O.

As a result, the write start address and preset data Po at any magnification have values as shown in FIG. 69.

In this way, the writing start address or preset data Po can be changed depending on the document reading or writing criteria.

The image data for which the enlargement/reduction processing has been completed is then supplied to resolution correction means 450, where resolution (MTF) correction is performed.

Since MTF correction is contour correction, if only this contour is left and the data inside it is erased, a hollow image will be obtained.

In this example, hollow processing is also illustrated as a special example of this MTF correction.

This resolution correction is processed after color separation.

First, this will be explained.

Conventionally, as described above, since the processing step is generally to perform color separation after binarizing image data, it has been necessary to perform resolution correction before the binarizing process. Therefore, in a device that uses a plurality of CODs to capture a color-separated image of a document, resolution correction must be performed corresponding to each CCD output. In other words, it was necessary to prepare multiple circuits for resolution.

Moreover, since the MTF of the optical lens differs for each of the plurality of color separations, there is also a drawback that the parameters for MTF correction differ depending on the respective resolution correction circuits.

If resolution correction processing is performed after color separation and before multi-value processing as in this invention, since only one piece of information is handled, practical applications such as reduction of circuit scale and simplification of determination of correction parameters can be achieved. This will have the above advantages.

In general, the causes of MTF deterioration until an image is recorded and reproduced include problems in 1. the optical system 2, the optical travel system 3, the processing circuit 4, and the recording system, as shown below.

Regarding 1, the MTF of the lens (variation with respect to 11 height by wavelength range, allowable width of imaging position, processing accuracy), accuracy of prism surface, accuracy of COD mounting, warpage of COD chip,
This is because the performance of the optical system fluctuates due to spectral fluctuations of the light source.

In the optical travel system (2), vibrations of optical mirrors and fluctuations in moving speed can be cited.

Regarding the processing circuit No. 3, there is distortion of the signal waveform due to capacitance components in the analog circuit, especially signal distortion caused by passing through a transmission line or the like.

The following points can be enumerated as the recording system problems mentioned in item 4.

・Beam diameter and beam shape of the laser beam ・Toner development characteristics on the photoreceptor drum (toner adhesion amount, toner concentration, toner particle size, toner color, etc.) ・Transfer characteristics (transfer rate, transfer characteristics to transfer paper, etc.) -Fixing characteristics (such as fluctuations in toner diameter before and after toner fixation) Among these factors, the optical system and its running system directly affect resolution deterioration.

FIG. 70 shows MTF values (before correction) in the main scanning direction and the sub-scanning direction when the optical system is driven. This characteristic is 2 to 16
These are the measured values when scanning a black and white pattern with a spatial frequency up to dots/m.

The MTF in this case was defined and used as MTF=(W-BK)/(W+BK)(%). Here, W is a white signal and BK is a black signal.

As is clear from FIG. 70, the deterioration of MTF is more remarkable in the sub-scanning direction. In order to correct to the same extent, the amount of correction in the sub-scanning direction may be set to 2 to 4 times that in the main scanning direction.

It is said that an MTF value of 30% or more is required to improve the reproducibility of fine line portions of images.

Therefore, when the resolution correction means 450 is configured by adding weights to the pixel of interest and its surrounding pixels,
In order to correct the above-mentioned main scanning direction and sub-scanning direction to the same extent and to prevent the reproducibility of fine line parts from deteriorating, the resolution correction means 450 is a component that uses image data of 3 x 3 pixels. You can use a solution filter.

If we write the filter elements on the left and the corresponding pixel positions (i, j) on the right, we get the following.

Focusing on the density I(ij) of the pixel (i, j), eight pixels around it are focused. At this time, (1-LJ-1) ~
For (i+1.j+'l), set the new density value to I(ij
)', I (ij)'=HI (i+Δ, j+Δ)XC(f+
Δ, j+Δ) Here, C(ij) is a filter coefficient, and C(ij)'' a + k) + C+...
It is i.

An example of filter coefficients for realizing the above-mentioned correction contents is shown below.

When it is desired to increase the amount of correction, the filter coefficients may be appropriately set accordingly.

FIG. 71 shows the correction results by the convolution filter using the correction coefficients in the above formula.

FIG. 72 is a circuit configuration diagram showing an example of resolution correction means 450 using this convolution filter.

Since a 3×3 matrix is used, two line memories 451 * 452 and seven latch circuits 453 are required.
457 is used, and the first adder 470 performs addition processing of the image data in the 1st row, 2nd column and the 3rd row, 3rd column, and then a multiplier (bit shift circuit) 471 performs multiplication processing by a predetermined coefficient. be done.

The second adder 473 performs addition of the image data in the 2nd row, 1st column and the 2nd row, 2nd column, and then a multiplier 476 performs multiplication by a predetermined coefficient. This multiplication output and the multiplication output from the multiplier 471 are multiplied by an adder 474.

Additionally, a multiplier 472 composed of 1 and 3 bit shift circuits
The image data of the second row and second column is supplied to perform multiplication processing, and this and the addition output from the adder 474 are sent to the subtracter 4.
At 75, subtraction processing is performed.

Thereafter, the level is reduced to 1/2 by a divider 477 and normalized.

Modifications of the resolution correction means 450 are listed below.

A ROM or the like may be used instead of multiplication or addition/subtraction processing.

Resolution correction is performed after color ghost processing, but
The processing position does not matter as long as it is after color separation and before multivalue processing.

The line memory may be configured so that the line memory used for color ghost correction is commonly used.

The power of the laser beam for image recording may be controlled simultaneously with the resolution correction. This improves the reproducibility, especially in fine line portions.

By the way, a control signal for hollowing is supplied to the terminal 478, and when this is supplied, each coefficient of the multipliers 471, 472 and 476, and the divider 477 is changed.

By changing this coefficient, only the changing points (only the contour parts) of the image are detected.

Therefore, when this MTF correction output is copied, an image is recorded in a hollow state.

To obtain a hollow image, the detection filter coefficients are convolved with 3×3 edges.

If image data is I (ij), new data I (
ij)゛ is I (ij)'=HI (i+Δ, ,DΔ) X C
(i+Δ, j*Δ) edge detection filter first
As explained in the F correction, detection is made stronger in the sub-scanning direction. However, if you make it too strong, noise components will also be detected, so you need to be careful.

For example, if detection is performed on a level signal that is higher than the unevenness of the background level, it will be difficult to detect at least the unevenness of the background, and good results can be obtained.

On the other hand, if the hollow processing is performed as is, the amount of change is small, and unless the threshold value for multilevel conversion is set to a low value, data will be skipped and that portion will not be recorded. Therefore, for hollow data, it is necessary to select a value that simultaneously lowers the threshold value for multilevel conversion.

As mentioned above, MTF correction and hollow processing basically differ only in the correction coefficient, so they can be configured as shown in Figure 72, or they can be configured as independent circuits as shown in Figure 73. , it is also possible to have a configuration in which these are selected as appropriate.

In FIG. 73, reference numeral 780 indicates hollowing means, and their outputs are selected by gate circuits 781 and 782. Therefore, the region signal S is supplied to the gate circuit 781 via the inverter 783, and the inverted region signal S and the hollow designation signal are supplied to the AND circuit 784, and the AND output is supplied to the other gate circuit 782 as a gate signal. Supplied.

Therefore, when the area signal S as shown in FIG. 74 is obtained, the other gate circuit 782 is turned on in the processing section, and only the image data subjected to the hollow processing is output.

Next, shading will be explained.

A specific example of the shading will be described later, but this shading means 44
0 is configured as shown in FIG.

The shading means 440 has a pattern ROM 441 for shading, and data for necessary shading processing is read out by referring to its column address and row address.

Therefore, a column counter 442 and a row counter 443 are provided, and the column address of the ROM 441 is specified by the counter output incremented by the line signal SH, and the row address of the ROM 441 is specified by the counter output incremented by the clock CK synchronized with 1 bell. Address is specified.

The mesh pattern data obtained by addressing is calculated with image data in an arithmetic circuit 444. The image data after processing will be shaded data.

The calculation is (63-
Image data)+(63-image data)=A, and 63-A=B The value is used as the image data after the arithmetic processing.

When the calculation result becomes a negative value, it is clamped to 0.

The arithmetic circuit 444 may be implemented using a ROM or the like.

In this case, if the pattern is created using a 4x4 matrix, the input is 6 bits for 16 values (4 pits), so 6 bits of data can be stored in a 10 bit address (1024 addresses). An 8-bit ROMIK is sufficient.

Output image data for shading and normal image data are selected by gate circuits 445 and 446, respectively.

Therefore, the area signal S is supplied to the gate circuit 445 via the inverter 447, and this inverted area signal and the shading designation signal are supplied to the AND circuit 448, and the gate circuit 446 can be controlled by its output.

As a result, as shown in FIG. 76, when a shading designation signal is obtained, the other gate circuit 446 is opened during that designated area, and image data for shading is selectively output. A shaded image will be recorded.

Note that the repetition of addressing to the ROM 441 is determined by the repetition period of the network pattern.

In this example, a 4×4 network pattern as shown in FIG. 77 is used, so the corresponding address designation is repeated. Therefore, the counters 442 and 443 are also quaternary counters.

FIG. 78 shows waveforms of original image data and pattern data before halftone processing, and an example of the output image at that time.

When this is shaded, it becomes as shown in FIG. 79.

The mesh pattern is not limited to the example shown in FIG.
It is also possible to prepare a plurality of ROMs and select one of them.

Next, the inversion processing means 460 will be explained with reference to FIG.

The inversion operation is performed by subtracting data as it is necessary to perform multi-value recording.

If we take four-value recording (generally even-value recording) as an example of multi-value recording, 2 bits is sufficient. Therefore, 00
White 11 Black 01
Light ash reversal 10 manufacturing method 10 manufacturing method →
01 Light gray 11 Black 00 White However, when performing three-value recording (generally, odd value recording), the bits are inverted after multi-value recording. . white 11
Black 01 Gray Inverted 10 (?) 11
Black → 00 becomes white,
It becomes difficult to process gray data. Therefore, in the example, even value recording is illustrated.

As shown in FIG. 80, a subtracter 461 is provided, and the inversion process can be completed by this subtraction process.

Through this inversion process, inverted image data as shown in FIG. 82 is obtained.

To select normal image data or inverted image data,
A pair of gate circuits 462 and 463 are provided, and the area signal S inverted by an inverter 464 causes the gate circuit to
62 is controlled. Then, as shown in FIG. 81, the inversion region signal S and the inversion processing signal are supplied to a gate circuit 465, and the other gate circuit 463 is controlled by its output.

Therefore, within the designated inversion area, the other gate circuit 463 is opened and only inverted image data is output.

Next, automatic threshold value adjustment will be explained as image processing.

Conventionally, in order to set the threshold value of a recorded image, the threshold value was determined by operating a level selection button provided on an operation unit.

However, in determining these levels, it is often difficult for those who are not experienced in operating copying machines to set an appropriate level in a single operation. In other words, in the past, there were often unnecessary trial firings.

An automatic density method has been devised to overcome these drawbacks. In this method, before the main scanning of the original document, Briscan is executed to obtain density information, and based on this density information, the threshold value of the original document is determined.

The drawback of this method is that the density information of the document is detected by bliscanning. As a result, the initial copying time when copying is lengthened, and the productivity of copying is not significantly improved. Therefore, it is necessary to develop a method for setting in real time.

When attempting to set the density of a document in real time, it is conceivable to create a density histogram of the document.

Now, when a density histogram as shown in Figure $83 is obtained from the density information, a threshold value for multileveling is calculated from a level that gives a peak frequency in this density histogram. Therefore, when this means is adopted, the frequency at each density level must be counted, which tends to increase the circuit scale.

The following description will exemplify the threshold value determining means 600B that is capable of setting the optimum document density in real time without blisscanning and without increasing the circuit scale.

This threshold value determining means 600B is provided in association with the multi-value converting circuit 600A.

The key point is that the threshold value is determined for each line from the maximum value DH and minimum value DL of the density data in each scanning line. For color originals, because the three colors of blue, red, and black are separated, density data of pixels corresponding to the color currently being recorded is sampled.
The maximum and minimum values are calculated for each color.

An example of a formula for calculating the threshold value T is shown.

T+=to+(DHDL)+α++D Lhere,
i = blue, red, black j; multivalue level = coefficient of 0.1 to 0.8, preferably 0.2 to 0.6 α = correction value 1 The value of α is different for each color. However, it is clear that the difference also depends on the value of the density data stored in the above-mentioned color separation map.

For example, k is 1/2 to 1/3 for black and 1/3 for red and blue.
It is about 2. α is -10 for black, 2 ~ for red and blue
It is about 6. Therefore, the multi-value threshold value is obtained by changing it for each multi-value level according to the value of DI(-DL or DL).

In the process of calculating the maximum or minimum value, it is possible that noise etc. may be mixed in, but as a countermeasure in such a case, if the concentration data changes suddenly, use the previous concentration data without sampling, or Alternatively, it is possible to use the average value of the concentration data before and after. Further, in order to avoid a sudden change in the calculated threshold value, the average value of the already determined threshold values for a plurality of lines may be used as the threshold value for the current line.

It is also clear that in the case of multi-value conversion, it is sufficient to select α as a coefficient corresponding to each threshold value.

The reason for obtaining it in the above manner is as follows.

When copying an original image in a single color, the coefficient α is different for each color. In other words, in the original picture, there are characters that mainly feature horses, and colored characters are present less frequently than this. Therefore, if the threshold value is determined according to black characters, the colored characters in the reproduced image will tend to jump out for red or blue. When matched with colored text, the black text becomes a bit crushed.

A specific example of the automatic threshold value determining means 600B will be explained next.

The example shown in FIG. 84 is a case where a ROM is prepared in which threshold values are stored for each color determined by the threshold value calculation formula described above, and the threshold value data is selected from the maximum and minimum values of the line.

In the figure, 611 indicates a ROM in which such multi-value threshold values are stored for each color. The density data is simultaneously supplied to a maximum value calculation circuit 612 and a minimum value calculation circuit 616.

Since these are the same in content, the maximum value calculation circuit 61
The second configuration will be explained.

The density data of the current pixel and the density data of the previous pixel latched by the latch circuit 614 are supplied to the switching circuit 613. Then, the density data of the current pixel and the density data of the previous pixel are fully supplied to the comparator 615 for comparing their magnitude, and the levels can be compared, and the comparison output is used to compare the density data of the current pixel and
Any of the density data in front of the pixel is selected. When the density data of the original pixel is larger, the density data of the current pixel is selected based on the comparison output as shown in the figure.

Such a magnitude comparison operation is performed for all pixels of the line, and the maximum value DH of the line is detected.

Similarly, in the minimum value calculation circuit 616, the minimum value DL of the line is detected from the comparison output indicating the minimum value obtained by the comparator 619.

Maximum and minimum values DH obtained at the end of one line,
The threshold ROM 611 is addressed by DL. The threshold value for which color is selected is determined by this threshold value ROM611.
determined by the color designation signal supplied to the.

The threshold value ROM 611 is a ROM 621-+-6 which stores the threshold value data independently for each color as shown in FIG.
23 may be prepared and configured such that they can be selected. In this case, an encoder 624 is required to encode the color designation signal.

The threshold value may be calculated by sequentially calculating the above-mentioned calculation formula in real time. FIG. 86 is an example.

Maximum and minimum values DH, DL detected as described above
is calculated by the subtracter 625 as (DH-DL),
This is supplied as a coefficient to the first ROM 626 storing , and multiplication processing with the coefficient selected by the color designation signal is executed. Multiplication processed output ki (DH-DL)
and the initial value DL are added together in an adder 627.

On the other hand, the data in the coefficient ROM 628 in which α1 is stored is selected by the color designation signal, and this and the addition output are supplied to the second adder 629, whereby the final threshold value T
+ is obtained.

Note that as a noise countermeasure, a preprocessing circuit such as an averaging circuit for density data may be provided. A post-processing circuit that averages the calculated threshold T1 may be provided.

In the case of this device, all threshold values are calculated automatically. The density of the line portion can be controlled by the development pressure (Iasumi pressure).Therefore, a switch (not shown) for controlling the Iasumi pressure is provided.

When converting a photographic image into a multivalued image, a dither matrix such as 4X4, 8X8, etc. is prepared as the threshold value ROM 611, and the row, row, etc.
A counter output that specifies a column can be used. In this example, 4
It is converted into four values using three ×4 Mado-no-kusu.

The 4-valued image signal is supplied to the output device 70 via the interface circuit 40. Next, the configuration and operation of this interface circuit 40 will be explained with reference to FIG. 87.

The interface circuit 40 is composed of a first interface 41 that receives 4-value data, and a second interface 42 that receives 4-value data sent from the first interface 41.

The first interface 41 includes a timing circuit 43
from horizontal and vertical effective area signals H-VA1. ID.

At the same time that V-VALID is supplied, a clock of a predetermined frequency (6ML in this example) can be supplied from the counter clock circuit 44.

As a result, the four-level data is sent to the second interface 42 in synchronization with the CCD drive clock only during the period when the horizontal and vertical effective area signals are generated.

The counter clock circuit 44 generates a timing clock on the main scanning side that is synchronized with the optical index signal.

The second interface 42 is an interface for selecting the four-level data sent from the first interface 41 and other image data and sending it to the output device 70 side.

Other image data refers to image data such as thorns.

First, test pattern image data obtained from the test pattern generation circuit 46, and second, the patch circuit 47.
The third is control data obtained from the printer control circuit 45.

The test pattern image data is used when inspecting image processing, and the patch image data for toner density detection is used during batch processing.

Both the test pattern generation circuit 46 and the patch circuit 47 are driven based on the clock of the counter clock circuit 44, thereby adjusting the timing with the four-value data sent from the first interface 41.

The four-level data output from the second interface 42 is used by the output device 70 as a modulation signal for the laser beam.

FIG. 88 shows a specific example of the first interface 41, in which a pair of line memories 901 and 902 are used. This is to process four-value data in real time.

A pair of line memories 901 and 902 are supplied with an enable signal having two lines as one cycle, and are also supplied with predetermined address data from address counters 903 and 904, respectively. CK indicates a clock for the address counter (FIG. 89B).

The enable signal forming circuit 910 is provided with a first AND circuit 911 as shown in the figure, which includes the above-mentioned clock CK and a size signal B4 that can be handled by this device.
(In this example, the maximum size is 84.
) is supplied to form the first AND output At (C in the figure).

On the other hand, a D-type flip-flop 912 is provided, and as its clock, a line signal SH (D in the figure) is output once per line in synchronization with the deflection timing of a deflector 935 provided in the output device 70. applied. As a result, it is assumed that outputs (indicated as Q and 'Q) having the polarities shown in E and F in the figure are obtained from the Q and mouth terminals.

The mouth output and the first AND output A1 are the first NAND circuit 91
3, and the Q output and the first AND output A1 are supplied to the second
The first and second NAND outputs N1 and N2 are supplied to the NAND circuit 914 and output from each other (G, H in the same figure).
is supplied as an enable signal to line memories 901 and 902.

Therefore, each line memory 901, 902 is alternately set to the write enable state for each line.

The output state of each line memory 901, 902 is regulated by gate circuits 905, 906 having a three-state configuration. A gate signal forming circuit 920 is provided for this purpose.

This forming circuit 920 consists of a pair of AND circuits 921 and 922.
and NAND circuits 923 and 924, and the Q and output and the horizontal effective area signal H-VALID (I in the same figure) are supplied to second and third AND circuits 921 and 922,
AND outputs A2 and A3 shown in J and K of the figure are formed.

Third and fourth NAND circuits 9 provided at the next stage
23.924 has these AND outputs A2. In addition to A3,
The vertical valid area signal V-VALID (L in the same figure) is commonly supplied, the third NAND output N3 (M in the same figure) is supplied to the gate circuit 905, and the fourth NAND output N4 (N in the same figure) is supplied to the other gate. It is supplied at #906.

As a result, in this case as well, the gate state is controlled alternately for each line, and the four-level image data of each line is sequentially and alternately read out from the first interface 41.

Horizontal valid area signal H-VALID and vertical valid area signal V-V
The effective width in the horizontal and vertical directions is determined by ALID. Clock CK, horizontal valid area signal H-VAL
Both the ID and the vertical valid area signal V-VALID are supplied from the output device 70 side.

FIG. 90 shows a peripheral circuit of the output device 70. A semiconductor laser 931 is provided with a drive circuit 932, and the above-mentioned four-value data is supplied to this drive circuit 932 as a modulation signal. The laser beam is internally modulated. The timing circuit 93 is configured so that the laser drive circuit 932 is driven only in the horizontal and vertical effective area sections.
Ai+ is controlled by the control signal from 3. Further, a signal indicating the amount of light of the laser beam is fed back to the laser drive circuit 932, and the driving of the laser is controlled so that the amount of light of the beam is constant.

The scanning start point of the laser beam deflected by the octahedral polygon 935 is detected by the index sensor 936, and the index signal is converted into a voltage signal by the I/V amplifier 937, and then this index signal is sent to the counter clock circuit. 44, etc., to form a line signal SH and adjust the timing of optical main scanning.

Note that 934 is a polygon motor drive circuit, and its on/off signals are supplied from a timing circuit 933.

The image exposure means shown in FIG. 91 uses a laser beam scanner (light scanning device).

The laser beam scanner 940 has a laser 931 such as a semiconductor laser, and the laser 931 generates a color separated image (for example, 2
On/off control is performed based on the value data). laser 9
The laser beam emitted from 31 passes through mirrors 942 and 94.
Polygon 935 consisting of an octahedral rotating polygon mirror through 3
incident on .

The laser beam is deflected by this polygon 935,
This passes through the image forming f-θ lens 944 to the image forming body 1.
10 surfaces are irradiated.

945 and 946 are cylindrical lenses for correcting inclination angles.

The polygon 935 directs the laser beam to the image forming body 110.
The surface of the image is scanned at a constant speed in a predetermined direction a, and such scanning results in image exposure corresponding to the color separation image.

Note that the f-θ lens 944 is used to adjust the beam diameter on the image forming body 110 to a predetermined diameter.

As the polygon 935, a galvanometer mirror 1 optical crystal polarizer or the like can be used instead of a rotating polygon mirror.

The latent image created as described above is
A primary image is formed on the photoreceptor by positive reversal development. This situation is shown in FIG.

The electrostatic latent image formed on the image forming body 110 is developed by the developer attached to the image forming body 110.

Note that during development, the development bias signal is applied to the development sleeve (
(not shown). The developing bias signal consists of a DC component selected to have approximately the same potential as the potential of the non-exposed portion of the image forming body 110.

As a result, only the toner of the developer on the developing sleeve selectively transfers to the surface of the image forming member 1100, which has been made into a latent image, and is deposited on the surface of the image forming member 1100, thereby performing the development process.

FIG. 92 shows changes in the surface potential of the image forming body 110, taking as an example the case where the charging polarity is positive. P.H.
is the exposed area of the imaging pair, DA is the unexposed area of the imaging pair, DU
P indicates an increase in potential caused by the adhesion of positively charged toner T1 to the exposed area PH during the first development.

The image forming body 110 is uniformly charged by a charger, and
A constant positive surface potential E is obtained.

Image exposure using a laser as an exposure source is applied, and the potential of the exposed portion PH decreases in accordance with the amount of light.

The electrostatic latent image thus formed is developed by a developing device to which a positive bias approximately equal to the surface potential E of the unexposed area is applied. As a result, the positively charged toner adheres to the exposed portion PH, which has a relatively low potential, and a first toner image is formed.

In the area where this toner image is formed, the potential increases by DUP due to the adhesion of the positively charged toner T1, but normally it does not have the same potential as the unexposed area DA.

Next, the image data is transferred onto a transfer paper P and roughly heated or pressurized to fix it, thereby obtaining recorded image data. In this case, the toner and charges remaining on the surface of the image forming body are cleaned and used for the next image forming body.

In addition to electrophotography, methods for forming latent images for image formation include methods in which charges are directly injected onto the image forming body using a multi-needle electrode, etc., and methods in which electrostatic latent images are formed by directly injecting charges onto the image forming body using a magnetic head. A method of forming an image, etc. can be used.

In this device, a two-component developer consisting of a non-magnetic toner and a magnetic carrier is preferred because it has the characteristics of easy control of triboelectric charging of the toner, excellent developability, and the ability to impart any color to the toner. used.

The various devices or circuits described above are all controlled by first and second control sections 200 and 250, as shown in FIG. 93. The explanation will start from the second control unit 250.

The second control unit 250 mainly controls the image reading system and its peripheral equipment, and 251 is a microcomputer (second microcomputer) for controlling the optical drive, and a microcomputer for controlling the main body. Various information signals are exchanged with the microcomputer (first microcomputer) 201 through serial communication. Further, the optical scanning start signal sent from the first microcomputer 201 is directly supplied to the interrupt terminal of the second microcomputer 251.

The second microcomputer 251 generates various command signals in synchronization with a clock of a predetermined frequency (12 MHz) obtained from the reference clock generator 254.

The second microcomputer 251 outputs a color designation signal and the like for color processing.

The second microcomputer 251 outputs the following control signals.

First, a control signal for turning on and off the drive circuits of the CCDs 104 and 105 is supplied to their power supply control circuits (not shown). Second, a predetermined control signal is supplied to the lighting control circuit W1253 for the light source 85 for irradiating the original 52 with necessary light.

Thirdly, the carriage 8 provided on the image reading section A side
A control signal is also supplied to a drive circuit 252 that drives a stepping motor 90 for moving the 4 and V mirror units 89, 89''.

Data indicating the home position is input to the second microcomputer 251.

The first microcomputer 201 is mainly used to control the copying machine. FIG. 94 shows an example of an input system and an output system from a copying machine.

The operation/display unit 202 receives various input data such as magnification designation, recording position designation, and recording color designation, and displays the contents thereof.

As the display means, an element such as an LED is used.

The paper size detection circuit 203 is used to detect and display the size of the cassette paper loaded in the tray, or to automatically select the paper size according to the size of the document.

The cassette zero sheet detection sensor 220 detects whether there are no sheets in the cassette. Similarly, the manual feed zero sheet detection sensor 222 detects the presence or absence of paper for manual feed in the manual feed mode.

The toner density detection sensor 221 detects the density of toner on the drum 110 or after fixing.

Further, the remaining toner amount detection sensor 223 can individually detect the remaining amount of toner in each developing device, and when toner replenishment is necessary, the toner replenishment display element provided on the operation unit is controlled to light up. .

- The time stop sensor 224 is for detecting whether or not paper is correctly fed from the cassette to the second paper feed roller (not shown) during use of the copying machine.

Contrary to the above, the paper ejection sensor 225 is used to determine whether or not the fixed paper is correctly ejected to the outside.

The manual feed sensor 226 is used to detect whether a manual feed tray is set. If it is set, it will automatically switch to manual feed mode.

The sensor output obtained from each sensor as described above is taken into the first microcomputer 201, and necessary data is displayed on the operation/display unit 202, and the driving state of the copying machine is controlled as desired. .

In the case of copying, a developing motor 227 is provided, and these are all controlled by command signals from the first microcomputer 201. Similarly,.

The driving state of the main motor (drum motor) 204 is controlled by a drive circuit 205 having a PLL configuration, and the driving state of this drive circuit 205 can also be controlled by a control signal from the first microcomputer 201. .

During development, it is necessary to apply a predetermined high voltage to a developing device or the like during development. Therefore, high voltage power supply 2 for charging
28, a high-voltage power source 229 for development, a high-voltage power source 23o1 for transfer and separation, and a high-voltage power source 231 for the toner receiver are provided, and a predetermined high voltage is applied to them when necessary. Become.

Note that 233 is a cleaning roller drive unit, 234 is a first paper feed roller drive unit, 235 is a second paper feed roller drive unit, and 232 is a cleaning pressure release motor. Roughly speaking, 236 is a drive section for the separation claw.

The second paper feed roller is used to feed the paper conveyed by the first paper feed roller to the surface of the electrostatic latent image completely formed on the drum 110.

The fixing heater 208 is controlled by a fixing heater on/off circuit 207 according to a control signal from the first microcomputer 201 .

The fixing temperature is read by the thermistor 209, and the first microcomputer 2
Controlled by 01.

206 is a clock circuit (approximately 12 MHz).

A nonvolatile memory 210 provided along with the first microcomputer 201 is used to store data that should be preserved even when the power is turned off. for example,
This includes total counter data and initial setting values.

In this way, the first and second microcomputers 20
1.251, various controls necessary for image formation are executed according to a predetermined sequence.

FIG. 95 is a timing chart schematically showing when recording an image.

Next, the operation/display section 202 of this device will be explained with reference to FIG. 96.

A is a copy switch, and by pressing this switch, a copying operation is performed in the above-described sequence.

Further, there is an LED below this switch, and when the red LED is lit, it indicates the warming up time, and when the green LED is lit, it becomes ready.

The opening is a display section that displays the number of copies, a self-diagnosis mode, or an abnormal state and its location. It is composed of 7-segment LEDs, and its contents can be displayed numerically.

C is a group of keys for setting the number of copies, etc., instructing the self-diagnosis mode operation, interrupting the copying operation, clearing the set number of copies, etc. For example, by pressing number keys 4 and 7 and turning on the power switch, it is possible to enter self-diagnosis mode, and by inputting a specific number at this time,
For example, it is possible to independently rotate the motor of the developing device.

From this mode, it is possible to return to normal mode by inputting a specific number, or by turning the power off and then turning it on without pressing any keys.

In the normal mode, normal copying operations are possible, but by combining the numeric keys and the P button, operations such as printing out data and printing out test patterns are also possible. For example, the second interface 42
Connect the print controller to °'52P"
If you input this and turn on the copy button, the printer controller data will be output.

Similarly, by setting "53P", it is possible to print out a test pattern. If the stop/clear key is pressed during the copy operation, the process moves to a post-rotation process operation, and after this operation is completed, the initial state is returned. The same holds true when making multiple copies.

The second key is the EE mode release key. Press this key
With the E mode canceled, the threshold value can be manually adjusted by operating the keys.

When the E key is pressed, the threshold level of the entire image becomes the low threshold. By pressing the button once, the threshold value changes discretely from the normal threshold value to the next threshold value among the seven levels. At this time, the LED lights up.

The key does the opposite.

も is a key that instructs to perform partial area detection.
By pressing this key, the marker area on the document is detected. Designation of inside/outside the marker area is performed using the N key.

On the other hand, the key group in the table is a key group for specifying processing.

Using the functions described above, it is possible to perform various types of image processing as described below.

LE is a key that specifies color erasure, and is one of red, blue, and black.
It is possible to specify two colors.

In addition, this key can be used by combining the Chi and Nu keys.
It is possible to erase the color inside/outside the area specified by the color marker.

O is a key to set the fixed magnification, and by pressing this key, the L of each magnification displayed above this key will be displayed.
The ED is turned on and off, and the designated fixed magnification is set.

On the other hand, when setting an arbitrary magnification to change the zoom magnification, press the W key and use the Power, Yo, and Even keys to change the magnification independently in the vertical and horizontal directions. Alternatively, a process of changing the vertical and horizontal magnification at the same magnification is selected.

For example, by pressing the "full screen" key and selecting the magnification using the switch, it is possible to set the same magnification in the vertical and horizontal directions (the magnification is shown on the display section).

On the other hand, if you press the ``vertical'' key in this state and select the magnification using the ``sh'' key, the horizontal magnification will be the initial magnification and the fir will be the magnification set after that, achieving 141/* independent magnification.

Conversely, pressing the ``horizontal'' key instead of the ``vertical'' key has the same effect.

In a different method, the user may first press the ``vertical'' key to set the fir magnification, and then press the ``horizontal'' key to set the magnification.

If you want to use full screen, press the "Full screen" key and then press "
Press the "Reverse" key to copy (see Figure 97).

If you want to copy partially, press the "Partial" key and then the "Reverse" key to copy (see Figure 98).

゛ ° Mo′ Press the “Partial” key and then press the “In” key to copy (
(See Figure 99).

) Press the ``Full Screen'' key, press the ``Tighten'' key, and then copy (see Figure 100).

Press the "part" key, press the "in" key, press the "tighten" key, and then copy (see Figure 101).

几MO - ゛Press the ``Full Screen'' key, then press the ``Middle Screen'' key, and then press the Copy key (see Figure 102).

Press the "part" key, then the "middle blank" key, and then the copy key (see Figure 103).

-C Mode Press the ``full screen'' key, press the ``variable magnification'' key, set the magnification, and then press the copy key (see Figures 104 and 105).

Press the "Partial" key, the "Inner" key, and the "Enlarge" key to copy (see Figure 106).

1 mouth, 1 place J'' Press the ``Part'' key, press the ``Extract'' key, and then copy (see Figure 107).

, Erased "J1 Go" L Nie The function is the opposite of the extraction processing mode.

2-7. Press the ``Full Screen'', ``Colorless'', and ``Red'' keys to copy (see Figure 108).

Furthermore, by using the key switch group, it is possible to instruct various operations for operation confirmation. For example, 6 .

However, when the copy switch is turned off, the optical system will stop at that position with the halogen on 2+copy; Same function as 1+copy, but the optical system will move in the opposite direction 3+copy; Regular scanning will continue with the halogen on. 61P+Copy: With the halogen turned off and the scanner optical system stopped, press 1 to 6+Copy in this state to perform the same operation as above.

This operation is canceled by pressing the stop/clear key. Further, during each operation, it is possible to check the signal level of the image data output from each circuit.

7XP: Printer section check 70P+copy; only the polygon motor rotates and the laser is turned on. Is it possible to check the index signal? In this state, 1 + copy; printer controller data output 2 + copy; test pattern data output 3 + copy; patch data □ output possible? IP+copy; check mode related to recording section, 1+copy in this state; charger on 2+copy; black developer motor on, developing bias on 5+copy; transfer pole on 6+copy; cleaning blade crimping 7+copy; cleaning blade released 8+copy Cleaning roller application (voltage) 9+copy; separation pole on 10+copy; first paper feed motor on 11+copy; second paper feed motor on, etc. In this case, this mode is canceled by pressing the stop/clear key in the same manner as described above.

This type of self-diagnosis check is not limited to this example, and it is possible to perform such self-diagnosis checks, making it easier for service personnel to perform maintenance in the market, or by having users perform a simple check before going for maintenance. will be able to respond more quickly.

[Effects of the Invention] As described above, according to the present invention, image processing is performed after color separation but before multivalue processing. According to this, -Appropriate image processing can be performed for each color for multiple colors -Processing such as color erasure is possible -Multi-level recording can be used to achieve high image quality -Low price It is possible to realize a device with characteristics such as:

Moreover, this configuration eliminates the disadvantage of increasing the circuit scale and increasing the cost of the device as in the past.

In general, 1. In the present invention, enlargement/reduction processing, which is pixel density conversion processing, is performed after color separation and before multi-value processing.

According to this, interpolation processing can be performed based on the required amount of information, especially during enlargement processing, so that it is possible to eliminate the problem that, for example, diagonal lines are enlarged in a jagged manner.

That is, since the desired image processing can be performed without deteriorating the image quality, there is a practical benefit of achieving high quality recording.

[Brief explanation of the drawing]

FIG. 1 is a system diagram of essential parts showing an example of an image processing device according to the present invention, FIG. 2 is a schematic configuration diagram of an electrophotographic copying device applicable to the present invention, and FIG. 3 is a transmittance characteristic of a dichroic mirror. Figure 4 is an emission spectrum curve diagram, Figure 5 is a spectral sensitivity characteristic diagram, Figure 6 is a shading correction characteristic diagram, Figure 7 is a system diagram of the shading circuit, Figure 8 is its waveform diagram, and Figure 9 is a diagram of the shading circuit. The figure is a system diagram of the A/D converter, Figures 10 and 11 are diagrams for explaining its operation, Figures 12 and 13 are diagrams each showing an example of a color separation map, and Figure 14 is a color code. 15 and 16 are illustrations of color ghosts, respectively. FIGS. 17 and 18 are illustrations of color ghost occurrence, respectively. Figure 20 is a configuration diagram of the main parts, and Figure 21
The figure is a partial sectional view, FIG. 22 is an explanatory diagram of color ghost generation, FIGS. 23 and 24 are explanatory diagrams of color ghost correction, and FIG. 25 is a system diagram of color ghost correction means.
Figures 26 and 27 are explanatory diagrams of area specification, Figure 28 is a system diagram of the area extraction circuit, Figure 29 is a system diagram of the color marker detection circuit, Figure 30 is a system diagram of the area extraction section, and Figure 31 is a system diagram of the area extraction circuit. 32 is a system diagram of the area determination circuit, FIGS. 33 to 35 are diagrams explaining its operation, and FIG. 36 is a waveform diagram for explaining its operation.
The figure shows another example of area specification, Fig. 37 is a system diagram of the processing means, Fig. 38 is a system diagram of the multiplexer used for this, and Figs. 39 and 40 show the achromatic specification code and its 41 is a system diagram of the processing control signal generation circuit, FIG. 42 is a subsequent logical value table, FIGS. 43 and 44 are explanatory diagrams of enlargement/reduction processing, and FIG. 45 is a diagram showing the processing contents. A system diagram showing a specific example of an enlargement/reduction circuit; FIG. 46 is a diagram showing an example of interpolation data used during enlargement/reduction processing;
Fig. 7 is a system diagram of the input capacitor sofa, Fig. 48 is a system diagram of the output buffer, Figs. Fig. 53 is a waveform diagram of the enlargement/reduction processing operation, Fig. 54 and Fig. 55 are diagrams showing the numerical values of interpolation data used for the enlargement/reduction processing, respectively, Fig. 56 is a system diagram of the synchronization circuit, and Fig. 57 and FIG. 58 are waveform diagrams for explaining the operation, FIG. 59 is a diagram showing the contents of the data ROM, FIG. 60 is a diagram showing the data input/output state of the input/output buffer, and FIG. 61 is an enlarged view of the center reference.・An explanatory diagram of the reduction process, FIG. 62 is a diagram showing an example of data of the write start address when performing central reference recording, FIG. 63 is a waveform diagram to explain the processing operation in each case, and FIG. 64 65 is a waveform diagram for explaining the operation during image enlargement processing, FIG. 65 is a waveform diagram for explaining the operation during image reduction processing, and FIGS. 66 and 67 are diagrams showing other examples of image reading and image recording, respectively. , Figures 68 and 69 are diagrams showing the relationship between the write start address and preset data used at that time, Figures 70 and 71 are characteristic diagrams of MTF correction, respectively, and Figure 72 is a convolution diagram for MTF correction. Filter system diagram, Figure 73 is MTF
A system diagram showing another example of the correction means, FIG. 74 is an operational waveform diagram thereof, FIG. 75 is a system diagram of the hatching means, FIG. 76 is an operational waveform diagram thereof, and FIG. 77 is an example of the hatching pattern. Figures 78 and 79 are waveform diagrams before and after hatching and diagrams showing differences in output data, Figure 80 is a system diagram of the inversion processing circuit, and Figures 81 and 82 are the operations at that time. FIG. 83 is a diagram of a concentration histogram, FIGS. 84 to 86 are a system diagram of the automatic threshold determination means, FIG. 87 is a system diagram of the interface circuit, and FIG. 88 is a system diagram of the first interface. , FIG. 89 is a diagram of its operation waveforms, FIG. 90 is a system diagram of the output device, FIG. 91 is a configuration diagram of the laser beam scanner, FIG. 92 is an explanatory diagram of the developing process, and FIG. 93 is a diagram of the second control section. , FIG. 94 is a configuration diagram of the first control section, FIG. 95 is a waveform diagram for explaining its operation, FIG. 96 is a diagram showing the key layout of the operation/display section, and FIGS. 108
Each figure is an explanatory diagram of key operation processing, and FIG. 109 is an apparatus system diagram for explaining the conventional method. 1... Enlargement/reduction processing means 15A, 15B... Shading correction circuit 35...
Color discrimination circuit 40...Interface circuits 60A, 60B...A/D converter 70...Output device 300...Color ghost correction means 450...Resolution correction means 420...Processing means for extraction etc. 440...Shading means 460...Inversion means 500...Area extraction means 600A...Multi-value conversion means 600B...Automatic threshold setting means

Claims (2)

[Claims] (1) Color separation means that captures image information of a document and separates it into multiple colors; means that photoelectrically converts the color-separated image information; and color separation based on the photoelectrically converted image signals. a pixel density converting means that converts the pixel density of the image data after the color separation; and a pixel density converting means that converts the pixel density of the image data after the color separation; 1. An image processing device comprising: means for visualizing an image using the number of colors. (2) The image processing apparatus according to claim 1, wherein the pixel density conversion process is performed before multi-value processing.