JPH01189723A - Merging sorter - Google Patents

Abstract

PURPOSE:To shorten a sort processing time by eliminating a delay time by processing a string by a pass mode when the number of strings processed by a cell is odd, and processing the strings other than that by a sort mode. CONSTITUTION:An operation mode is used properly at an operation mode control circuit 19 as follows by finding the number of strings to be processed actually from the number of records of a stream and string length possible to be processed by the cell supplied as control information. The circuit 19 controls a switch 20 so as to process only a firstly inputted string by the pass mode and process the remaining strings by the sort mode when the value of the number of obtained strings is odd, and process the string only by the pass mode when the value is even. Thus, by introducing a pass mode function without storing a first string in a memory when the number of strings to be processed by the cell is odd, the delay time can be eliminated, and the sort processing time can be shortened.

Description

[Detailed Description of the Invention] [Objective of the Invention] (Industrial Application Field) The present invention is capable of quickly and efficiently performing sort processing, which is one of the basic operations in the field of non-numerical processing represented by database processing. Regarding the merge sorter.

(Prior art) Sorting processing, which arranges data in a specific order, is one of the basic operations in the field of non-numeric processing, and has been used in many software algorithms (simple selection method, simple exchange method, heap sort method, partition sort method) for a long time. method, quick sort method, merge sort method, etc.) have been proposed and used depending on the purpose.

In the 1970s, host computer sort processing routines were added to processor firmware, such as pitonic sorters and parallel counting sorters that sort n records using n cells, and log sorting routines that sort n records using n cells. There are pipeline type sorters that sort records. From the perspective of realizing these using current technology, a pipeline type sorter that sorts n records using log n cells is practical because it allows for miniaturization of hardware. It is said that

One of the pipeline type sorters that has been put into practical use is 2.
There is a way merge sorter. This sorter continuously performs a merge operation that matches two sorted record strings (hereinafter referred to as strings) to generate one sorted string using a large number of cells arranged in one dimension. be. Figure 5 shows the three-stage 2-way merge.
The operating principle of this sorter is shown when five records arranged in ascending order (assuming that they are input in the order of 1, 2°, etc.) are sorted in descending order using a sorter, and the pipeline is shown in Figure 6. Shows how it works. Sorter each one'-:15<
In UM, even-numbered input strings are stored alternately in LM. The sorter considers the input record string (hereinafter referred to as a stream) to be a string of length 1 lined up, merges two strings in input order, and calculates the string length (number of records in the string) at each stage. That is, as shown in FIG. 5, since the string length input to cell 21 is 1, cell 21 contains strings 1, 2, 3, 4, . . . of length 1. 5 is stored alternately in UM and LM in the input order, and the records of UM and LM are merged to create a string [2,j]c4. with a length of 2.
3] Generates [5, -] and outputs it to the cell 22. Cell 2 is the length 2 sent from cell 21.
While storing strings alternately in UM and LM in the input order, merging the records of UM and 'LM is performed, and a string of length 4 [4,3°2.11 [5, -, -+-1]
is generated and output to the cell 23. In this way, cell 2i (i-1, 2, .) stores the string of length 2j-1 sent from cell 21-1 alternately in UM and LM of memory 1 in the order of input. performs a merge operation on the records of , generates a string of length 21, and outputs it to cell 2 i+1. At this time, each stage starts processing every time the first data of an even numbered string is input, and performs a pipeline operation as shown in FIG. Determining the processing time T(1) of this sorter from FIG. 6, we get T (1) = t i + d L + d 2 +
t O...(1). Here, tl and to are the input time and output time of a stream consisting of 5 records, respectively. d1 is the delay time caused by the number of records in the stream deviating from the power of 2, and d2 is the time when the stream is Indicates the delay time for passing through a cell. The number of records in the stream is C1, and the number of cells is N.

When the processing time for one step is T, equation (1) is expressed as follows.

T(1)=CT+ (2a-C)T+ (N-1)T+
CT...(2) However, a
=<10g2C>(<>□ is an integer value rounded up to the nearest whole number), ti =tO=C'r, di=(
2a-C)T, d2=(N-1)T.

In the case of the above example, since C=5 and N=3, a=3 and T(1) becomes 15T.

−,,=,, (L) In formula, ti, to, d2
is a value determined by the specifications of the nearer, but dl is a value determined by the number of records in the stream, so it can be removed by devising a control method. It is.

, : Conventionally, as a method to remove ``d1'', a pseudo record addition method merge sorter (Todd,
S: Algorithm and Hardware
for a MergeSort Using Mu
ltiple Processors, lBM J,R
E.S.

DEVELOP, Vol. 22. No, 5. PP, 5
09-517 (1978)) and the dynamic merge type merge sorter (Hayashi, et al.; Reducing sorting time by improving the pipeline margin algorithm. Information Processing Society of Japan 29th National Conference PP-763-764 (1984)
)) is proposed.

As shown in Figure 7, the pseudo record addition method merge sorter performs virtual operations by adding pseudo records (10) to the beginning of the input stream so that the number of records in the stream becomes a power of 2. The delay time (dl
). However, in order to make the sorter operate beyond step 4, steps 1, 2.3
Since it is necessary to set the initial values of the control parameters in the cells 21 to 23 as if the processing has been completed, this method has a negative drawback.

'1) On the other hand, as shown in Figure 9, in the dynamic merging method Merge Saw, when the last string is input in a cell with an odd number of strings, the current merge operation is interrupted and the last string is input. Delay time (dl) is eliminated by dynamically switching streams so that strings are merged first. An example of processing using this method is shown in FIG. In Figure 10, steps 5 and 6
A dynamic merge operation is being performed.

That is, in step 5, the cell 41 detects that [5] is an odd number in the last string, merges strings [3] and [4], and outputs the string [4,,3]. , [4], the string [
Switch to the operation of merging [3] and [5]. The cell 42 also contains the string [2,1] in step 6.
and [4] to output the string [4, 2, 1], and when 4 is output, the string [2, 1]
and [5,3] are merged. This method has the disadvantage that the control i is complicated because each cell must dynamically change the processing string and handle strings of reasonable length.

(Problems to be Solved by the Invention) As mentioned above, in the conventional piper type merge sort, when the number of records in the input string is not a power of 2,
This method has the disadvantage that a delay time (dl) occurs. The reason for this is that in the case of a 2-way merge sorter, each cell repeats the operation of merging two strings and outputting one string. This is because the string to be merged may be lost. As a countermeasure to this problem, a method of adding pseudo records so that the number of records in a stream becomes a power of two, and a method of performing dynamic merging have been proposed. However, although these methods are correct as algorithms, they have the drawback of lacking in practicality.

The purpose of the present invention is to increase the number of records in the input string to a power of 2 (means for solving the problem) without using complicated control. ゛ The merge sorter according to the present invention selects cells in each stage. By combining these functions, the number of strings to be merged in each cell is always an even number.

In the sorting mode, two manually input strings input successively from the previous stage are stored in memory, and each time the first record of the input string is input -10-, both strings are constructed. In this mode, the records are compared in size, rearranged in an order determined from the comparison results, and the two strings are merged and output as a new string to the next stage.

The pass mode is a mode in which the input string is directly transferred to the next stage without passing through the memory.

Each cell has 1 string to process. (Function) 1 According to the present invention, when the number of input strings is odd, the first string is immediately transferred to the next stage, so that the number of strings processed by the cell is 1. This has the effect of reducing the number of processing steps compared to the case where . In addition, since the number of strings to be merged is always an even number in each cell, efficient processing is performed, and the delay time (dl) due to deviation from the power of 2 of the number of input records is eliminated. Can be done.

(Embodiment) FIG. 1 shows the principle of operation of a merge sorter according to an embodiment of the present invention, and FIG. 2 shows its pipeline processing operation.

This merge sorter has three processing units 5.5.5
3 are connected in cascade, and each processing unit 5i (i=
1 to 3) are composed of a memory 11 and a cell 61. Each cell 61 has a sort mode and a path.
mode, and when the number of strings to be processed by itself is an odd number, only the first string is processed in pass mode, and no delay time (dl) occurs for the remaining strings. The reason for this will be explained below using FIGS. 1 and 2.

Since one cell 61 must process five strings of length 1, that is, an odd number of strings, first, in pass mode, the first string [1] is directly transferred to cell 62 without going through memory. After that, store string [2] in UM and [3] in LM in sort mode, merge these two strings, and create string [3゜2] of length 2 in the same way. Output [5, 4] to cell 6°. Next, cell 62 has to process three strings of length 2, so similarly to cell 1, it transfers the first string [1,-] to cell 63 in pass mode, and then in sort mode. While storing the string [3,2] in UM and [5,4] in LM, merge these two strings to create a string [5,4] with length 4.
, 4, 3, 2] is output to cell 6. The cell 63 only needs to process two strings of length 4, so as soon as the first record of the second string is input, it is merged, and the input register 11 and memory 11 that store the data or input record 3 are merged. A comparator 14 compares the contents of the U register 12 and the L register 13, and the U register 12 and L register 13 store the data read out from the UM section and the LM section.
A selector 15 that selects the data in the register 12 or the L register 13, an output register 16 that temporarily holds the selected data in order to output it as the final result or to the next cell, and a read address and a write address of the memory 11. An address control circuit 17 that generates an address, a control information holding register 18 that holds control information from the outside, and an operation mode control circuit 19 that generates an operation mode switching signal based on the value of the control information holding register 18, and switches the mode. It is composed of a switching device 20, a siefence generator 21 operating in a sort mode, and a siefence generator 22 operating in a pass mode.

The cell 61 performs one of the sort mode operation or pass mode operation as shown in FIG. 4 in three cycles. In the sort mode, the first string is stored in the UM section and the next string is stored in the LM section. When the storage starts, as shown in FIG.
In cycle 2, the data in the UM part of the memory 11 is set to the
In cycle 3, the data read operation to the register 13 of the M part is compared, and the operation of setting predetermined data in the output register and the operation of storing the contents of the input register 11 in the memory 11 are performed.

On the other hand, in pass mode, input data is received in input register 11 in cycle 1, transferred to U register 12 in cycle 2, and transferred to output register 1 in cycle 3.
Perform the operation to transfer to 6.

These operation modes are determined by the operation mode control circuit 19 determining the number of strings actually processed by the cell from the number of records in the stream given as control information and the string length (number of string records) that can be processed by the cell. Next, path 19, when the value of the number of strings obtained is an odd number, ``1: Sort only the first string that is input manually.'' Where,
When the number is even, the switch 20 is controlled so that processing is performed only in pass mode.

In this way, when the number of strings to be processed in the cell is odd, the delay time (dl) can be reduced by introducing a pass mode function that directly transfers the first string to the next cell without storing it in memory. The sort processing time can be shortened by removing them.

In the above embodiment, a two-way merge sorter has been described, but the present invention is not limited to a two-way merge sorter, but can also be applied to a multi-way merge sorter.

[Effects of the Invention] According to the present invention, each cell of the merge/sorter
By using extremely simple control that performs two processes, mode operation and pass mode operation, and processing the rest in sort mode, operations on each cell can be performed and the number of strings can always be an even number. The delay time (d
l) can be removed with a simple 1° control circuit.

[Brief explanation of the drawing]

1 Fig. 1 is a diagram showing the operating principle of a merge sorter according to an embodiment of the present invention, Fig. 2 is a diagram showing the pipeline processing operation of the same merge sorter, and Fig. 3 is a diagram showing the operation of the same merge sorter. A more detailed configuration diagram of the cells that make up the cell, Figure 4 shows the same merge.
An explanatory diagram of the sort mode operation and pass mode operation in each cell of the sorter. Figure 5 shows the operating principle of a conventional merge sorter. Figure 6 shows the pipeline processing operation of the same merge sorter. Figure 7 shows the operating principle of the pseudo record addition method merge sorter, and Figure 8 shows the same merge sorter.
Figure 9 shows the operation principle of a merge sorter using the dynamic merge method; Figure 10 shows the pipeline processing operation of the sorter. It is a diagram. 1-1...Memory, 2-2.3-3. 4-4.6-6...Cell, 51-53...Processing unit, 211...Input register, 12...U register\13...L register, 14...Comparator,
15...,゛□'Female letter, 16...Output register, 17...Address control circuit, 18...Control information holding register, 1
9..."・Operating mode control circuit, 20... Switching device,
21...So3] i: = 10 figure

Claims (1)

[Claims] A memory for storing a record string consisting of a plurality of strings, and a memory for storing the plurality of strings that are continuously inputted in a predetermined order, and merging and outputting them according to a predetermined regulation. In the merge sorter, which is configured by connecting multiple stages of processing units consisting of cells and sorting an input record string through pipeline processing by these processing units, each cell has two inputs that are successively input from the previous stage. While storing the string in the memory, each time the first record of the later input string is input, the records constituting both strings are compared in size and rearranged in the order determined from the comparison result. It has a sort mode in which both the strings are merged and output as a new string to the next stage, and a pass mode in which the input string is transferred as it is to the next stage without going through the memory, and When the number of strings to be processed is odd, as soon as the first string is input, only that string is processed in the early pass mode, and the other strings are processed in the early sort mode. Marge Sota.