JPH01187652A - Memory control system - Google Patents

Abstract

PURPOSE:To effectively use an extended storage and to improve the performance of a system by determining an assignment to the extended storage by the combination of the two parameters of a virtual address range and a virtual address space. CONSTITUTION:The system consists of an arithmetic processing unit 30, a main storage device 31, an extended storage device 32, an external storage device 33. Here, by designating prior the virtual address range, the area common among the respective spaces can be assigned to the extended storage device 32. By designating the virtual address space and the virtual address range, the specific area of a specific space can be assigned to the extended storage device 32 and therefore, the data of a system common area of high use frequency, data/program related to a specific data base processing, etc., can be assigned to the extended storage device 32. Thus, the extended storage is effectively used and the performance of the whole system can be improved.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a memory control system for a data processing device that employs a multiple virtual memory system.

[Conventional technology]

In a data processing device that uses a virtual memory method, the address space visible to the software (virtual address space) is independent of the capacity of the hardware's main memory, and a typical data processing device uses a virtual address of 2 gigabytes (GB). It becomes an architecture that can be referenced.

FIG. 2 shows a conceptual diagram of a data processing device that uses a conventional virtual storage method. In FIG. 2, 20 is an arithmetic processing unit;
1 is a main storage device (actual memory IJ), and 22 is an external storage device. The storage devices are main storage device [21 and external storage device 2]
The programs and data necessary for execution by the arithmetic processing unit 20 are imported page by page from the external storage device 22 to the main storage device 21 (page-in).
Unnecessary programs and data are similarly output from the main storage device 21 to the external storage device 22 in page units (page out). In other words, even if the capacity of the main storage device 21 actually connected to the arithmetic processing unit 20 is smaller than the maximum value of the address space (virtual address space) for programs and data (even if the capacity of the main storage device 21 actually connected to the arithmetic processing unit 20 is It is treated as if there is space.

Information processing systems that further advance the idea of this virtual memory method and employ a multiple virtual memory method that provides a maximum virtual address space for each user have begun to spread, and have shown great effectiveness in, for example, TSS systems. in this case,
The problem is that as the number of TSS terminals increases, page-in/page-out between the main storage and external storage increases, resulting in a large overhead. In particular, when searching a database, the performance deteriorates significantly due to the following reasons, which is a big problem.

Recently, easy-to-use databases suitable for end users have become popular, and the data structure has changed from the conventional structured type based on regular work to an unstructured type (table format) that can also handle non-standard makeshift work. ing. With these databases, the scope for searching all data is wider than before (
However, the frequency with which databases residing on external files are read into the main storage device has increased, creating a major performance bottleneck.

On the other hand, advances in LSI manufacturing technology have been remarkable, and in recent years, large-capacity memories have become relatively inexpensive, and with the increase in the capacity of main storage devices, large-capacity storage devices (expansion storage devices) have begun to be used. This extended storage device is capable of high-speed data transfer with, for example, a main storage device, and is different from a device (main storage device) that is directly accessed from an arithmetic processing unit to perform calculations.

By using the above extended storage device as a paging device, it is possible to improve the performance common to the system. Furthermore, if it is desired to particularly speed up the processing of the database as described above, a method can be considered in which only the space where the database is located is allocated to extended storage. Tokukai 1986
- Publication No. 126749 allocates only a specific virtual address space to the expanded MS area, and the following problem occurs with the method of determining whether or not to allocate to extended storage based on the space unit (space ID) of access to the specific space. .

■ It becomes difficult to assign extended memory to a common area common to each space.

(1) When specified using a space ID, one unit is 2 GB, which is too large compared to the capacity of extended storage (several to several tens of GB). The number of spaces is limited.

■ A portion of a certain space is frequently used, and if it is assigned to extended storage, performance can be greatly improved, but assigning the entire space to extended storage is too wasteful.

For these reasons, even frequently used databases or data common to systems may not be able to be assigned to extended storage, making it impossible to effectively utilize extended storage.

An object of the present invention is to speed up the processing of specific data and applications such as the above-mentioned database in a data processing device that employs a multiple virtual memory method, and to allocate extended memory to frequently used programs/data for effective use. The above purpose is achieved by a method in which the assignment to extended memory is determined by a combination of two parameters: the virtual address range and the virtual address space. [Operation] Gives priority to the virtual address range. By specifying this, an area common to each space can be assigned to the extended storage device. In addition, by specifying the virtual address space (space ID) and virtual address range, you can assign a specific area of a specific space to the extended storage device, so you can easily store frequently used data such as system common areas and specific databases. By assigning data/programs, etc. related to processing to the extended storage device, extended storage can be effectively used and the overall system performance can be improved.
It can improve performance and speed up certain databases/applications.

〔Example〕 FIG. 3 is a system configuration diagram of an embodiment of the present invention.

In FIG. 3, 30 is an arithmetic processing unit, 51 is a main memory (MS), 32 is an extended storage device, and 36 is an external storage device.

FIG. 4 shows an example of the configuration of a virtual space that supports the multiple virtual memory system, with areas 40, . 12 is a system common area, and area 43 is an extended system common area (16M
This is a common area common to each space. The area 41 is a job-specific area, and the area 42 is an extended job-specific area (an area of 16 MB or more), which is allocated to each user. In the present invention, the shaded portion (area) in FIG. device 32
It is used by performing page-in/page-out between the main storage device 31 and the main storage device 31.

Figure 5 shows the flow of processing when implementing the present invention), and shows the processing when a page fault (occurs when the required page in virtual memory is not available on the MS) occurs. It is something.

When a page fault occurs during program execution, check the virtual address and virtual space number (ID) of the page where the page fault occurred (step 51).Next, the virtual address of the page where the page fault occurred is registered in advance. It is checked whether D is within a certain area (step 52).

If it is within the range, the process proceeds to step 56. If it is outside the range, it is checked whether the virtual space number of the page matches a pre-registered virtual space number (step 57). If they do not match, the required page is read into the MS 31 from the external storage device 56, as in conventional page fault processing (step 60). On the other hand, if the virtual space number where the page fault occurred matches the previously registered virtual space number, check whether the virtual address of the page is within the range of the previously registered area. (step 58). If it is outside the range, conventional page fault processing (step 60) is performed. If it is within the range, the expanded storage 32 is searched (step 53), and it is determined whether the required page is stored in the expanded storage 32 (step 54).

If the required page is in the extended memory 32, the required page is read from the extended memory 32 into the MS 31 (
Step 55), the program returns to the program where the page fault has occurred (Step 56). If the necessary page is not in the extended memory 52, the necessary page is read from the external storage device 33 into the extended memory 52 (step 59), and then the process proceeds to step 55. Note that when reading necessary pages from the extended memory 32 into the MS31 (page-in), it is necessary to eject unnecessary pages from the MS31 to the extended memory 32 (page-out), but at this page-out, unnecessary data is transferred to the extended memory tM52. You may leave it as is, or you may return it to the external storage device 33. FIG. 1 shows steps 51 and 52 in FIG.

This is an example in which the processing of 57.58 is realized using all hardware. In FIG. 1, the virtual storage area addresses allocated and used in extended storage are data@80, 81
, 82 , 83 , 84 to register 617 ,
8, 80, and 81 in advance. In register 6, a start address of an area commonly used in each space is registered, and in register 7, an end address of the area is registered. Generally, multiple areas can be specified. Register 8 contains the virtual space number.

(ID), the register 80 registers the start address of the area to be assigned to the expanded storage device 62 corresponding to the virtual space number, and the register 81 registers the page fault occurrence signal line 6 when a page fault occurs. The AND condition of the timing signal line 4 is taken by the AND gate 5, and the virtual address where the page fault has occurred is set in the register 77 through the data Ia1, and the virtual space number (ID
) is set in register 78 through data line 2.

Register 6.7 and register 77 are compared by comparison circuit 70, and it is checked whether the contents of register 77 are in the designated virtual address area.

Then, register 8 and register 78 are compared by comparison circuit 71, and it is checked whether the contents of register 78 are the designated virtual space number. If they match, the register 77 and the registers 80 and 81 are compared in the comparison circuit 72, and it is checked whether the contents of the register 77 are in the specified virtual address area.

The results of comparison circuit 70 and comparison circuit 72 pass through OR gate 75 and are set in latch 74 by timing signal line 76 . The contents of the latch 74 are used in the determination process shown in FIG. 5 via a signal line 75''f!:.

〔Effect of the invention〕

According to the present invention, it is possible to allocate a specific area, a specific space, and a specific area to a high-speed expanded storage device, so that the expanded storage device can be effectively used to improve the performance of the entire system, and also to improve the performance of the entire system. This has the effect of speeding up database processing/application processing.

[Brief explanation of the drawing]

Figure 1 is a diagram showing an embodiment of the present invention, Figure 2 is a conceptual diagram of a data processing device that uses a virtual storage method, Figure 3 is a conceptual diagram of the system configuration of the present invention, and Figure 4 is a multiple virtual space. FIG. 5 is a diagram showing a processing flow according to the present invention. 50... Arithmetic processing unit, 51... Main storage device,
32...Extended storage device, 53...External storage device. Representative patent attorney Katsutoshi Ogawa 1st volume 50th division 4th district

Claims (1)

[Claims] 1. In a data processing device that uses a multiple virtual memory method,
A high-speed storage device is installed between the main storage device and the external storage device, at least one virtual storage area is allocated to the high-speed storage device, and when a page fault occurs when a program is executed, the page fault occurs. A memory control method characterized by checking whether a page is allocated to the high-speed storage device, and if so, reading necessary data from the high-speed storage device to the main storage device.