JPH01186342A - Thermal printer - Google Patents

Abstract

PURPOSE:To make printing density constant and to enhance printing quality by mounting a heat generation quantity control means for controlling a heat generation control signal on the basis of a heat generation quantity control value corresponding to the degree of density of printing data. CONSTITUTION:A heat generation quantity control means consisting of a heat generation quantity control value selection circuit as a heat generation quantity control value selection means for selecting the heat generation quantity control value determined on the basis of the discrete ratio in printing data and a strobe control circuit 50 as a control signal adjusting means for adjusting the pulse width of the strobe signal being the heat generation control signal to a thermal head 1 is provided. In the heat generation quantity control value selection circuit 20, the strobe signal driving the thermal head 1 according to the timer data generated corresponding to the discrete ratio of DATA is outputted to strobe terminals STB1, STB2, STB3, STB4. A main scanning discrete degree counter, a sub-scanning discrete degree counter and a number-of-printing dot counter are selected in the heat generation quantity control value selection circuit 20 to perform counting.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a thermal printer, and particularly to a method of controlling the thermal head thereof.

(Prior art) Figure 8 is a schematic perspective view of the main parts of the Thermashift 0 printer.
The thermal head 1 has a heating resistor arranged in a line inside thereof, and the pulse motor 6 is decelerated by gears 5 and 4 to rotate the platen 2 and feed the paper 3. 9th
The figure is a schematic block diagram of a control circuit according to the prior art.

An interface line 7 transfers print data from the outside to the control unit 8. The control unit 8 is a microprocessor (not shown).

Consists of ROM, RAM, timer, etc.
The entire printer is controlled by the program. I10 port 1
0 controls the pulse motor 6 via the motor driver 1' 1 and senses paper information using the paper sensor 12. Ilo&-9 is an I10 port for controlling thermal head l. Figure 10 is a circuit diagram of the thermal head.CLO applied to CI and OCK terminals.
This is print data that is input to the DATA terminal in synchronization with the CK signal. The DATA signal is stored in the shift register circuit 13. Shift register circuit - When one line of print data is completed in 13, send the LATCH to the LATCH terminal.
By applying one pulse of the signal, the print data in the shift register circuit 13 is transferred to the latch circuit 14. In the printing operation, when a strobe signal as a heat generation control signal is applied to the strobe terminals STB 1 to STB 4, the NAND circuit 15 performs an AND operation and inversion with the print data of the launch circuit 14, and connects it to a power supply (not shown) through the voltage terminal VH. This is done by causing the connected heating element 16f to generate heat.

Next, the operation will be explained according to FIG. 11.

FIG. 11 is a print operation time chart for one line of the thermal printer. After the pulse motor 6 is rotated for one line, the DATA signal -i CLOCK signal, which is one line of print data from time T to T2, is shown. is input to the shift register circuit 13 in synchronization with , and then from time T3 to T
Apply the LATCH signal up to 4 and shift register circuit 1
3 to the launch circuit 14. In order to perform the printing operation, a strobe signal is applied to the strobe terminal STB 1 from time T5 to T6, and then sequentially applied to the strobe terminals STB 2 , STB 3 , and S from time T6 to T9.
By applying the TB4 Hestrop signal to finish the printing operation for one line, and repeating this operation, the print data from the outside can be transferred. However, in the apparatus with the above configuration, the applied energy to the thermal head is constant, There is a significant difference in print quality between areas where print data is discrete (coarse) and areas where print data is concentrated (dense). In other words, in areas where print data is concentrated, energy is continuously applied to the heating element, so the temperature of the heating element increases, and in the case of thermal transfer thermal printers, the amount of ink increases, causing printing problems. In extreme cases, sagging occurs around the dots, and in the case of similar heat-sensitive thermal printers, the printed areas tend to become darker.Also, the print data tends to be discrete. On the other hand, the temperature of the heat generating element does not rise in the areas where the heat generating element is heated, and the printed areas tend to fade, and in extreme cases, there is a problem in that fading occurs.

In order to solve the above-mentioned problems, the present invention provides a thermal printer that controls the amount of heat generated by a heat generation control signal based on print data that drives a heat generating element. It is equipped with a calorific value adjusting means for adjusting the amount of heat generated.

(Function) According to the present invention, since the thermal shift printer is configured as described above, the thermal head prints while changing the applied energy from the heating element in accordance with the heat generation adjustment value.

(Example) Embodiments of the present invention will be described with reference to the drawings.

Note that the same reference numerals are given to elements common to each drawing.

First Embodiment FIG. 1 is a schematic block diagram of a control circuit according to a first embodiment of the present invention. The heat generation adjustment value selection circuit 20 serves as a heat generation adjustment value selection means for selecting the heat generation adjustment value determined by The basic printing operation is the same as that of the prior art except that it has a heat generation amount adjusting means consisting of a strobe adjusting circuit 50.

Here, the degree of discreteness and discrete rate of print data will be explained. The data discreteness rate represents the degree of discreteness, that is, how much data to be printed continuously exists in all print data between adjacent dots. Figure 2 is an explanation of the discreteness rate of print data, and Figure (a) is a diagram explaining the discreteness rate in the main scanning direction (the line direction of the thermal head), where 3 out of 5 dots When printing, the part that is printed continuously between adjacent dots is 1 of part A.
The discrete rate is 1/3. Figure (b) is a diagram for explaining the discreteness rate between adjacent dots between the line t to be currently printed and the immediately preceding line A-1 that has already been printed in the sub-scanning direction (paper feeding direction). For the number of dots to be printed, 3, the previous line 7-1
If the dots are printed continuously at two places between B and 0, the discrete rate is 2/3.

FIG. 3 is a circuit diagram for selecting a heat generation amount adjustment value. When all print data is transferred from the I10 port 9 to the thermal head 1, the discrete rate in the transferred data is counted and the heat generation amount adjustment value is selected.

In this embodiment, one line is a thermal head composed of 1024 dots, and the number of divided drives is 4, so the print data must be divided into 4 parts every 256 dots. The counter 21 is for dividing one line of print data into a plurality of blocks. In this embodiment, the output (Qs, Qs) of the counter 21 is a clock pulse (hereinafter CI, oC
(0,0), (1,0), (0,1
), (1, 1). Decoder 22 is counter 2
The 2-bit data of 1 is decoded to enable a discreteness counter, which will be described later, to operate on a block-by-block basis.

Frill rough 0 flop circuit (hereinafter referred to as F/F) 23°2
4, AND circuit 25, and main scanning discrete dust counter 26°27
．． 28.29 counts the degree of discreteness in the main scanning direction.

Print data input in synchronization with CLOCK (hereinafter referred to as DA
TA) becomes DATA delayed by one clock due to F and /F 23.24, and is input to the AND circuit 25. When the AND circuit 25 receives DATA, CLOCK, and DATA delayed by one clock, it performs an AND operation, and the current DATA and the DATA one clock before are both parsed.
When CLOCK is 1'', the output is 1' 1 ''', indicating that both adjacent DATA are 1'''.
Outputs o. 4 output from the AND circuit 25
Rus is main scanning discrete dust counter 26.27.28.29
It is counted in binary numbers by . The main scanning discrete dust counter that operates at this time is controlled by the four outputs of the decoder 22, and counts the main scanning discrete dust for each block.

Next, the discreteness count in the sub-scanning direction is performed by a shift register 30,
AND circuit 31, sub-scanning discrete dust counter 32.33.3
4.35. The shift register 30 has the same number of bits as the number of heating elements in the thermal head 10, that is, 102
CI that has a storage capacity of 4 bits and is input to the CLK terminal
, DATA is input to the DIN terminal in synchronization with OCR. From the DOUT terminal, the same DA is input in the order input to DIN.
TA is output with a clock delay equal to the number of bits of the shift register. DAT output from p Dout terminal
A is DATA one line before the DATA input to the DIN terminal. Therefore, the AND circuit 31 performs a logical product operation of the DATA of the current line, the DATA of the previous line, the CI, and the OCK pulse, and the DATA of the current line and the previous line.
The output is 1 only when both are "1" and CLOCK is "1".
”, it outputs a pulse indicating that the DATA between adjacent lines are both 1'1'''. The pulse output from the AND circuit 31 is sent to sub-scanning discrete dust counters 32 and 33.
, 34° 35 for each diblock.

AND circuit 36, printed dot number counter 37°38.3
9.40 is a circuit that counts the number of printed dots for each block; the AND circuit 36 performs a logical product operation on DATA and CLOCK, and the result is sent to a printed dot number counter 37.38;
39. Enter 40 and perform binary counting.

Memory element (hereinafter referred to as ROM) 41, 42, 43° 44
is the discrete dust counter 26°27.2 in the main scanning direction.
8.29 output, discrete dust counter in sub-scanning direction, 92
, ,? The outputs of 3, 34, and 35 and the outputs of print dot number counters 37, 38, 39, and 40 are input as addresses to the ADR terminal. ROM 41.

42, 43, and 44 store in advance the timer values of the thermal head driving time corresponding to the main scanning discrete rate and the sub-scanning discrete rate, which are the counter values in the main scanning direction and the sub-scanning direction with respect to the print dot number counter value. Timer data TMD1 + TMD2 according to the above address
+ TMI)3 + 'rlVID4 The timer value for each block is output. F//F45146.

47, and NAND circuits 48 and 49 are timer data T.
MD1, TMD2, TMD3, TM
A TMDLOAD signal for loading D4 into a strobe control circuit, which will be described later, and counters 21, 26, 27,
28, 29, 32° 3.3.34.35.37.38,
This circuit generates a CLEAR signal for resetting F//F23 and F24.

FIG. 4 is a strobe adjustment circuit diagram. In the heat generation adjustment value selection circuit 20, timer data TMD1 . TMD 2, TM
D3.

A strobe signal for driving the thermal head 1 according to TMD4 is sent to the strobe terminal 5TBl+STB2.
This is a circuit that outputs to +STB3 +5TB4.

The strobe control circuit 50 includes four identical timer circuits 50a.
, 50b, 50c, and 50d, the timer circuit 50a will be explained. Timer data TMD 1 output from the ROM 41 is preset in the counter 51 by the TMLOAD signal output from the NAND circuit 48 . The timer starts at I10 shown in Figure 1.
One pulse sl signal 'i J output from port 9
By inputting to K F/F 55, the output Q becomes 1", and the strobe signal "1" is input to the strobe terminal 5TB1.
is output, and the other output Q is 0''. After the counter 51 is ready to start counting, the counter 51 performs a countdown operation. When the first shift of the counter 51 reaches 0, the NOR circuit 52 The output becomes 1" and this change is reflected by F/F5, ? , and is differentiated by an AND circuit 54 to output a - pulse. This pulse is JK F/F
55, the output Q of the JK F/F 55 becomes 0'', the strobe signal becomes 110)J, the output Q becomes 1'', and the counter 51 prohibits counting. Further, the pulse from the AND circuit 54 is sent to the microprocessor (not shown) of the control unit 8 shown in FIG. 1 through the I10 port 9 and processed. A control signal is again sent from the microprocessor (not shown) to the I10 port 9, a RESET signal "o" is output from the I10 port 9, and the counters s l and Fall' s s are output.

JK F/F55 After clearing f, when the s2 signal is output to the timer circuit sob, the strobe signal "1" is output to the strobe terminals STB,2.

Thereafter, the timer circuits 50c and 50d continue in the same manner, and the above operation is repeated every time the line changes.

Next, the operation will be explained according to FIGS. 5, 6, and 7.

Figure 5 is a time chart of the strobe adjustment circuit.
FIG. 6 is a diagram showing an example of a dot arrangement, and FIG. 7 is a time chart of the heat generation amount adjustment value selection circuit.

Assuming that one line to be printed, that is, from the O-th dot to the 9th dot of 1024 dots, has a dot arrangement as shown in FIG.
C shown in FIGS. 7(a) and 7(b) to the thermal head 1 and the heat generation adjustment value selection circuit 20 through the 10 port 9.
I, OCK and DATA are output. The DATA output to the thermal head l is CL from time T1 to T17.
The signals are sequentially input to the shift register circuit 13 shown in FIG. 10 and stored in synchronization with OC'K.

On the other hand, the calorific value adjustment value selection circuit 20 receives the CL input from time T1 to T14 as shown in FIG. 7(b).
OCK causes the output of the counter 21 (Q
8, Q9) becomes (0, 0), and as a result, the output of the decoder 22 ("1 + y2) Y3 + Y4) becomes (0, 1, 1, 1), and the main scanning discreteness counter 26
．． Sub-scanning discreteness counter 32. Print dot number counter 3
7 is selected and counted. Also, DATA is time T2
to T5 and from time T6 to T12 are 1", and Fat2.?, 24 shown in Fig. 3 is 1".
is output with a delay of one clock due to CLOCK, and the output is 1'' from time T3 to T7 and from time T8 to Th34.AND circuit 25 outputs DATA and FA''.
24 (7) After the output Q is ANDed with CLOCK, between time T3 and T4, between time T8 and T9,
Time T1. As a result, the main scanning discrete dust counter 26 sets the count number N to N=1 at time T3 and N=2 at time T8 based on the output of the AND circuit 25. , time T10'cN'=3. That is, N=1 between the 1st and 2nd dots shown in FIG. 6, and N=2 between the 4th and 5th dots. So, between the 5th and 6th dots, N=3
becomes. Thereafter, the discreteness in the main scanning direction is counted in binary numbers for 256 dots until time T14, and RO
Output to address terminal ADH of M41. Also, the sub-scanning discreteness is determined by ANDing the output from the shift register 30, which has already input the data of one line before, and the current data.
After performing an AND operation with CLOCK in the circuit 31, it is output to the sub-scanning discrete dust counter 32, and the sub-scanning discrete dust counter 32 counts the degree of discreteness in the sub-scanning direction for 256 dots in binary numbers until time T14. Output to address terminal ADR. Further, the AND circuit 36 performs a logical AND operation on the DATA from the O-th dot to the 255th dot and CLOCR, and outputs the result to the print dot number counter 37, which counts in binary and then stores it in the ROM.
41 address terminal ADR. At time T14, the output of the counter 21 (Q9.
Q8) is (0,1) and the output of the decoder 22 (Yl
, T2. T3. T4) becomes (1, 0, 1, 1), and the main scanning discrete dust counter 26, the sub-scanning discrete dust counter 32,
The print dot number counter 37 is prohibited from counting.
The value counted up to the 256th CLOCK is C, which will be described later.
It continues to be held until reset by the LEAR signal.

Also, the output of the decoder 22 (Yl, T21Y31 T4
) becomes (1, 0, 1, 1), the main scanning discrete dust counter 27, the sub-scanning discrete dust counter 33, and the print dot number counter 38 are selected and it becomes possible to start counting. Then, in the same way as from time Tl to TI'4, at time T14, from the 257th CLOCK to time T15, the discreteness in the main scanning direction and the sub-scanning direction and the number of printed dots are calculated, ROM 4, ? It is output as a binary number to the address terminal ADR of. From the 513th CLOCK at time T15 to the 768th CLOCK and the time Tt e te (D
It counts in the same way from the 769th CLOCK to the 1024th CLOCK and outputs it in binary to the address terminal ADH of ROM 43.44. ROM 41, 42
, 43', 4' 4 is timer data TMD, , TMD 2, TM, which uses the input count value as an address to determine the optimum heat generation adjustment value for the dot array divided into four parts.
D3. 'Strobe adjustment circuit 50 as TMD 4
timer circuits 5oa and 5ob.

Output to 50c and 50d. Then, from time T1g, TI
The LATCH signal and CLOCK are connected to I10 port 9.
The output is then outputted to the Fat 4 s and the thermal head l shown in FIGS. 1 and 10. One line of DATA stored in the shift register circuit 13 of the thermal head 1 is ■
, is transferred to the launch circuit 14 by the ATCH signal, and the NAND
It is output to the circuit 15. On the other hand, in the heat generation adjustment value selection circuit 20 shown in FIG. 3, at time T20, the output of Fat45 and the reset output Q delayed by one clock from Fat46 are output.
After performing an AND operation in the NAND circuit 48 using
MDl, TMD2. TMD3. TMD4 is a timer circuit 50a, 5'Ob, 50c, 50
d counters are preset respectively. After another clock delay, the output of Fat 46 and 1 of Fat" 47
Clock delayed reset output Q 'i NAND circuit 4
After performing the AND operation in step 9, the CI and EAR signals are output to the counter 21 and the main scanning discrete dust counter 2'6, 27, 28, 29.
, sub-scan discrete dust counter, ? 2, 33, 34,
．． 95, Print dot number counter, ? 7, 38,
,? 9, 40, F/'F23', 24f reset. In FIG. 5, I1 shown in FIG. 1 at time T21
One signal from port 0/Grus S1 is sent to timer circuit 50a
is input to JKF/F55, and JK is input by CLOCK.
The outputs Q and Q of F/'F55 are "1", respectively.
It becomes "O" and is held. Strobe terminal STB 1 of thermal head 1 shown in FIG. 10 with output Q=1
The strobe signal "1" is input to the NAND circuit 15, and after performing an AND operation with the DATA from the latch circuit 14, current flows from the voltage terminal ■□ due to the inverted signal P0''', and the heating element 16 generates heat. Also, the output Q=
O enables the counter 51 to start counting, and CL
Countdown is performed from the timer data value reset by OC and K, and when it reaches 0, the NOR circuit 52
1” i output, VF5,?, AND circuit 54
The outputs Q and Q of the JK F/F'55 become 0'' and 1, respectively.As a result, the strobe signal becomes 0'' and the heating element 16 stops generating heat, while the counter 51 starts counting. It becomes prohibited. Also, AND circuit 5
The output "1" of 4 is also sent to a microprocessor (not shown) of the control unit 8, and after being processed, a RESET signal is output from the I10 port 9 and the counter s J , F/F
ss.

JK F/F 55 is cleared, followed by one pulse S
2 signal is output, and the timer circuit 50b starts to generate heat and perform a timer operation in the same way as the timer circuit 50a described above. Thereafter, the timer circuits 50c and 50d continue, and the printing operation for one line is completed.

According to the first embodiment, since the pulse width of the strobe signal is directly controlled by a digital value, the amount of energy applied to the heating element can be adjusted accurately.

Second Embodiment FIG. 12 is a schematic block diagram of the main parts of the control circuit of the second embodiment.

The difference from the prior art is that a heat generation amount adjustment value selection circuit 60 and a voltage adjustment circuit 56 are provided as heat generation amount adjustment means, and the difference from the first embodiment is that a voltage is used as the heat generation control signal. FIG. 13 is a block diagram of the heat generation amount adjusting circuit, which corresponds to the heat generation amount adjustment means in FIG. 12. The calorific value adjustment value selection circuit 60 has a discrete rate counting circuit 62 which includes a counter circuit for counting the degree of discreteness in the main scanning direction and the sub-scanning direction shown in the first embodiment and a counter circuit for counting the number of printed dots. It consists of a ROM 61 that stores voltage values determined according to the ratio. The voltage adjustment circuit 56 includes a Dμ conversion circuit 59, a comparison circuit 58, and a voltage setting circuit 57. The D/A conversion circuit converts the voltage value read from the RQM 61 from a digital value to an analog quantity. As shown in FIG. 10, the voltage setting circuit 57 connects the heating element 16 from a power supply (not shown) through the voltage terminal V□ of the thermal head l.
This is a circuit that sets the voltage as a heat generation control signal applied to the

The comparison circuit 58 compares the output from the voltage setting circuit 57 and the output from the D/A conversion circuit 59, and the voltage setting circuit continues until the output i from the voltage setting circuit 57 is equal to the output from the D/A conversion circuit 59. 57 Hefeed back.

Next, the effect will be explained. As in the first embodiment, the discreteness rate counting circuit 62 counts the degree of discreteness and the number of printed dots for one line of print data, and outputs the counted values to the ROM 61 as an address. A voltage value is read out from the ROM, 6Z as a heat generation adjustment value, and the voltage value i is read out from the D/A conversion circuit 59.
The digital value is converted into an analog quantity and input to the comparator circuit 58. The comparator circuit 58 receives the first signal from the voltage setting circuit 57.
Feedback is applied to the voltage setting circuit 57 to adjust the output of the voltage setting circuit 57 until the voltage applied to the heating element 16 of the thermal head l shown in FIG. When the output of the voltage setting circuit 57 becomes equal to the voltage value read from the ROM 61, a strobe signal is output from the I10 port 19 shown in FIG.

In the thermal head 1, as shown in FIG. 10, the NAND circuit 15 performs an AND operation on the print data from the latch circuit 14 and the strobe signal, and then inverts the output to "0", so the output is adjusted through the voltage adjustment circuit 56. A current flows in accordance with the applied voltage, and the heating element 16 generates heat.

According to the second embodiment, the voltage adjustment circuit that is the control signal adjustment means of the second embodiment is simpler than the strobe adjustment circuit that is the control signal adjustment means of the first embodiment.

In this embodiment, the heating elements arranged in a line are divided into four blocks and driven, but the heating elements do not need to be divided into four blocks. If not divided, counter 21. Decoder 22 is not necessary.
It is sufficient to have one discrete dust counter in the main scanning direction and one in the sub-scanning direction, one printed dot counter, and one ROM.

Further, in this embodiment, a line thermal printer has been described, but the same applies to a serial printer.

(Effects of the Invention) As described above in detail, according to the present invention, in a thermal printer that completely controls the amount of heat generated by a heat generation control signal based on print data that drives a heat generating element, the amount of heat generated is adjusted according to the print data. Since the heat generation control signal is adjusted based on the heat generation adjustment value, the energy applied to the heating element is reduced in areas where print data is concentrated, and conversely, the energy applied to the heating element is reduced in areas where print data is concentrated. It is possible to print with increasing changes in the area where the image is present. Therefore,
The printing density becomes almost constant, and a thermal printer with excellent printing quality can be provided.

[Brief explanation of the drawing]

Fig. 1 is a schematic block diagram of the control circuit of the first embodiment of the present invention, Fig. 2 is an explanatory diagram of the discrete rate of print data, Fig. 3 is a calorific value adjustment value selection circuit diagram, and Fig. 4 is a strobe. Adjustment circuit diagram, Figure 5 is a time chart of the strobe adjustment circuit, Figure 6 is a diagram showing an example of a dot arrangement, Figure 7 is a time chart of the heat generation adjustment value selection circuit, and Figure 8 is a schematic overview of the thermal printer. 9 is a schematic block diagram of a control circuit according to the prior art, FIG. 10 is a circuit diagram of a thermal head, FIG. 11 is a one-line printing operation time chart of a thermal printer, and FIG. 12 is a diagram of a second implementation. FIG. 13 is a schematic block diagram of the main parts of the example control circuit, and FIG. 13 is a block diagram of the calorific value adjustment circuit. l...Thermal head, 16...Heating element, 20゜60...Heating amount adjustment value selection circuit, 41, 42, 43゜44...ROM, 50...Strobe adjustment circuit, 5
6... Voltage adjustment circuit. Moxibustion kataido (a) E leather drop): f゛-fu no (b) Reorganization diagram of imune base, ztsu ℃, T Figure 2 ・○ ・○ ・○

Claims (1)

[Claims] 1. In a thermal printer that controls the amount of heat generated by a heat generation control signal based on print data that drives a heat generating element, the heat generation control signal is controlled based on a heat generation amount adjustment value that corresponds to the density of the print data. A thermal printer characterized in that it is equipped with a means for adjusting the amount of heat generated. 2. As a heat generation amount adjustment means, a heat generation amount adjustment value selection means that determines a discrete rate representing continuous print data with respect to all print data, and selects the heat generation amount adjustment value determined in advance in accordance with the discrete rate in accordance with the discrete rate. 2. The thermal printer according to claim 1, further comprising: a control signal adjustment means for setting the heat generation amount adjustment value selected by the heat generation amount adjustment value selection means and adjusting the heat generation control signal. 3. The heating value adjustment value selection means includes a first counter circuit that calculates the continuous print data in the line direction, and a second counter circuit that calculates the density of the continuous print data in the direction perpendicular to the line direction with respect to the data of the immediately previous line. A discrete rate counting circuit consisting of a counter circuit and a third counter circuit that calculates all print data in the line direction, and a memory that reads out the heat generation amount adjustment value using the count value of the discrete rate counting circuit as an address are provided. The thermal printer according to claim 2, characterized in that: 4. The thermal printer according to claim 3, wherein the heat generation amount adjustment value is a timer value that determines the pulse width of the strobe signal as the heat generation control signal. 5. The thermal printer according to claim 3, wherein the heat generation amount adjustment value is a voltage value for adjusting a voltage as the heat generation control signal.