JPH01186167A - Power unit - Google Patents

Power unit

Info

Publication number
JPH01186167A
JPH01186167A JP847588A JP847588A JPH01186167A JP H01186167 A JPH01186167 A JP H01186167A JP 847588 A JP847588 A JP 847588A JP 847588 A JP847588 A JP 847588A JP H01186167 A JPH01186167 A JP H01186167A
Authority
JP
Japan
Prior art keywords
rectifier
choke coil
output
output end
switch
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP847588A
Other languages
Japanese (ja)
Inventor
Kikuo Yagi
八木 規矩夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Devices Industries Co Ltd
Original Assignee
Fuji Electric Devices Industries Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Devices Industries Co Ltd filed Critical Fuji Electric Devices Industries Co Ltd
Priority to JP847588A priority Critical patent/JPH01186167A/en
Publication of JPH01186167A publication Critical patent/JPH01186167A/en
Pending legal-status Critical Current

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  • Measurement Of Current Or Voltage (AREA)
  • Rectifiers (AREA)
  • Dc-Dc Converters (AREA)

Abstract

PURPOSE:To remove waveform distortion, by providing a second rectification means separate from and independent of a first rectification means so as not to be affected by the discharging current of the first capacitor. CONSTITUTION:A power unit is composed of an FET 3, a bridge rectifier D1, a low-pass filter LPF, capacitors C1-C2, a choke coil L1, a diode D2. a control amplifier 4, a multiplier 5, a comparator 6 and a gate control circuit 7. Another bridge rectifier D3 is connected so as to be in parallel to the rectifier D 1 to input terminals 1A-1B, of which the output voltage V 3 is resistively divided to input into the multiplier 5. No waveform of the output voltage V3 of the rectifier D3 will be affected by the capacitor C1 connected to the output terminal of the rectifier D1. Distortionless output can thereby be obtained at an output terminal 2.

Description

【発明の詳細な説明】 [産業上の利用分野] 本発明は電源装置に関する。[Detailed description of the invention] [Industrial application field] The present invention relates to a power supply device.

[従来の技術] 電源装置におけるアクティブ平滑フィルタは、整流電流
波形を電圧波形と相似形にすることによって、1次側に
急激な電流変化に伴なうノイズを出さないようにするた
めのものである。
[Prior Art] An active smoothing filter in a power supply device is designed to prevent noise caused by sudden current changes from being generated on the primary side by making the rectified current waveform similar to the voltage waveform. be.

第2図にアクティブ平滑フィルタを用いた従来の電源装
置を示す。この電源装置は平滑回路にDC−DCコンバ
ータ(昇圧形)を適用したものから基本構成されている
。第2図に示すように、入力端子IA、IBには商用周
波数の定格電圧の電源が接続され、同人力端子にローパ
スフィルタLPFを介して接続したブリッジ整流器D1
の+(プラス)出力端に整流出力v1が得られる。整流
器(ダイオード)Dlの十出力端にはチョークコイルL
1の一端が接続され、同コイルL1の他端にはダイオー
ド(フライホイールダイオード)D2のアノードが接続
され、同ダイオードD2のカソードは出力端子2に接続
される。C2は同ダイオード02のカソードに接続され
たコンデンサである。
FIG. 2 shows a conventional power supply device using an active smoothing filter. This power supply device basically consists of a DC-DC converter (step-up type) applied to a smoothing circuit. As shown in Figure 2, a power supply with a rated voltage of commercial frequency is connected to the input terminals IA and IB, and a bridge rectifier D1 is connected to the input terminal via a low-pass filter LPF.
A rectified output v1 is obtained at the + (plus) output terminal of. A choke coil L is installed at the output end of the rectifier (diode) Dl.
The anode of a diode (flywheel diode) D2 is connected to the other end of the coil L1, and the cathode of the diode D2 is connected to the output terminal 2. C2 is a capacitor connected to the cathode of the diode 02.

整流器O1の十出力端と接地間には、直列接続された抵
抗R1およびR2が接続され、さらにコンデンサCIが
接続されている。チョークコイルL1の他端と接地間に
は、FET(電界効果トランジスタ)3(のソース、ド
レイン)と抵抗R3との直列回路が接続されている。チ
ョークコイルLlには電流検出のための検出巻線L2が
巻かれている。この検出巻線L2の出力端電圧はチョー
クコイルLlが蓄積エネルギを放電中はハイ(H) レ
ベルとなる。
Resistors R1 and R2 connected in series are connected between the output terminal of the rectifier O1 and ground, and a capacitor CI is also connected. A series circuit of a FET (field effect transistor) 3 (its source and drain) and a resistor R3 is connected between the other end of the choke coil L1 and the ground. A detection winding L2 for current detection is wound around the choke coil Ll. The output end voltage of the detection winding L2 is at a high (H) level while the choke coil Ll is discharging the stored energy.

4は差動増幅器からなる制御アンプであって、その非反
転入力端には基準電圧が、反転入力端には出力端子2の
電圧(ダイオードD2の出力)が人力され、出力端には
目標値の大きさを決めるための直流(OC)出力が得ら
れる。5は乗算器であって、一方入力端には制御アンプ
4の出力を、他方入力端には、入力電圧として、整流出
力Vlを抵抗R1とR2とによって分圧した電圧を各々
人力し、これらを乗算して、出力としてしきい値(目標
値)を得る。
Reference numeral 4 denotes a control amplifier consisting of a differential amplifier, the reference voltage is input to the non-inverting input terminal, the voltage of the output terminal 2 (output of the diode D2) is input to the inverting input terminal, and the target value is input to the output terminal. A direct current (OC) output is obtained for determining the magnitude of . 5 is a multiplier, and one input terminal receives the output of the control amplifier 4, and the other input terminal receives a voltage obtained by dividing the rectified output Vl by resistors R1 and R2, respectively. and obtain the threshold value (target value) as the output.

6は差動増幅器からなる比較器であって、非反転入力端
に乗算器5の出力を、反転入力端にシャント抵抗R3の
電圧を各々人力する。
6 is a comparator consisting of a differential amplifier, and the output of the multiplier 5 is input to the non-inverting input terminal, and the voltage of the shunt resistor R3 is input to the inverting input terminal.

FET3の導通時にシャント抵抗R3によって検出され
る電圧降下は、コイルLlに流れる電流の瞬時値に相当
する。
The voltage drop detected by the shunt resistor R3 when the FET3 is conductive corresponds to the instantaneous value of the current flowing through the coil Ll.

比較器6の出力はシャント抵抗R3の電圧値が乗算器5
の出力値(すなわち目標値)に達するとオフ(Low)
になる。7はゲート制御回路であって、比較器6の出力
を人力して、同出力がオフになるとFET3のゲートを
オフする。そして、ゲート制御回路7は、チョークコイ
ルLLが放電を終了して検出巻線L2の出力端電圧がゼ
ロになるとFET3のゲートをオンする。
The output of the comparator 6 is the voltage value of the shunt resistor R3.
Turns off (Low) when the output value (i.e. target value) is reached.
become. Reference numeral 7 denotes a gate control circuit which manually inputs the output of the comparator 6 and turns off the gate of the FET 3 when the output is turned off. Then, the gate control circuit 7 turns on the gate of the FET 3 when the choke coil LL finishes discharging and the output terminal voltage of the detection winding L2 becomes zero.

以上の構成によれば、FET3の導通期間中は、チョー
クコイルL1は磁気エネルギを蓄積しながら電流を流し
、この電流がピーク値(目標値)に達すると、FET3
がターンオフし、コイルL1は放電を開始しながら電流
を流し、放電終了時には検出巻線L2の出力端電圧がゼ
ロになってFET3がターンオフし、チョークコイルL
lは再び磁気エネルギを蓄積しながら電流を流し始める
。このように動作することによって、第3儲■に示すよ
うにチョークコイルLlに流れる電流iLの平均値電流
iを、商用周波数で変化する電圧Vlの波形に対応して
変化させることができる。チョークコイルLlに流れる
電流は周波数が比較的高いので、その影響はローパスフ
ィルタLPFによって除去され、1次側にノイズ等が澗
洩しない。
According to the above configuration, during the conduction period of FET3, the choke coil L1 flows current while accumulating magnetic energy, and when this current reaches a peak value (target value), FET3
is turned off, coil L1 starts discharging while passing current, and at the end of discharging, the output terminal voltage of detection winding L2 becomes zero, FET3 is turned off, and choke coil L
l begins to flow current while accumulating magnetic energy again. By operating in this manner, the average value current i of the current iL flowing through the choke coil Ll can be changed in accordance with the waveform of the voltage Vl that changes at the commercial frequency, as shown in the third column (3). Since the current flowing through the choke coil Ll has a relatively high frequency, its influence is removed by the low-pass filter LPF, and noise etc. do not leak to the primary side.

[発明が解決しようとする課題] しかしながら、上記電源装置においては、ブリッジ整流
器DIとチョークコイルLlとの間にコンデンサCIが
あるため、第3儲■に示すように、整流器DIの出力電
圧Vlのピーク部分vpでコンデンサCIに充電された
電荷が完全放電されないままに次の電圧上昇に入ってし
まう、その結果、コンデンサCIには商用電源電圧のた
めのゼロクロス時(t2)に残留電荷による電圧vlが
残ってしまい、この電圧v1が抵抗R1と82との間か
らとり出される電圧v2にも影響を与えてしまう。した
がって、この電圧v2が乗算器5に入力されるので、そ
の悪影響が整流器DIの入力端子IIにもおよんでしま
い、結局ノイズが漏洩してしまうことになる。
[Problems to be Solved by the Invention] However, in the above power supply device, since the capacitor CI is provided between the bridge rectifier DI and the choke coil Ll, as shown in the third section (3), the output voltage Vl of the rectifier DI is The charge charged in the capacitor CI at the peak portion vp enters the next voltage rise without being completely discharged. As a result, the capacitor CI has a voltage vl due to the residual charge at the zero cross (t2) for the commercial power supply voltage. remains, and this voltage v1 also influences the voltage v2 taken out between the resistors R1 and 82. Therefore, since this voltage v2 is input to the multiplier 5, its adverse effect also extends to the input terminal II of the rectifier DI, resulting in noise leakage.

そこで本発明の目的は以上のような問題を解消し、ノイ
ズの漏洩しない電源装置を提供することにある。
SUMMARY OF THE INVENTION An object of the present invention is to solve the above-mentioned problems and provide a power supply device that does not leak noise.

[課題を解決するための手段] 本発明は交流電源からの交流信号を整流する第1整流手
段と、整流手段の出力端と平滑出力端とを結ぶチョーク
コイルと、チョークコイルの入力端とアース間を結ぶ″
741コンデンサと、チョークコイルの出力端とアース
間を結ぶ第2コンデンサと、チョークコイルの出力端と
アース間の導通をオンオフするスイッチと、交流電源か
らの交流信号を第1整流手段と同相で整流する第2整流
手段と、第2整梳手段からの整流出力信号とスイッチに
流れる信号とに基づいて当該スイッチをオンオフ制御す
る手段とを具える。
[Means for Solving the Problems] The present invention provides a first rectifier that rectifies an AC signal from an AC power source, a choke coil that connects an output end of the rectifier to a smoothing output end, and a first rectifier that connects an input end of the choke coil to a ground. connect between
741 capacitor, a second capacitor that connects the output end of the choke coil and the ground, a switch that turns on/off the continuity between the output end of the choke coil and the ground, and rectifies the AC signal from the AC power supply in the same phase as the first rectifier. and means for controlling the switch on/off based on the rectified output signal from the second combing means and the signal flowing to the switch.

[作 用] 本発明によれば、第1整流手段と別の独立した第2整流
手段または逆流阻止ダイオードによって第1コンデンサ
からの放電電流の影響を受けないようにして、スイッチ
のオンオフ制御のための情報を得る。これによって、い
わゆる波形歪を発生させないで済み、1次側にノイズが
漏洩しない。
[Function] According to the present invention, the first rectifier and the independent second rectifier or the reverse blocking diode are used to prevent the influence of the discharge current from the first capacitor, and to control the on/off of the switch. Get information about. This eliminates the occurrence of so-called waveform distortion and prevents noise from leaking to the primary side.

[実施例] 以下、図面を参照して本発明の実施例を詳細に説明する
[Example] Hereinafter, an example of the present invention will be described in detail with reference to the drawings.

第1図は本発明の一実施例を示す、第1図において第2
図と同じ部分は同一符号を付しである。
FIG. 1 shows an embodiment of the present invention.
The same parts as in the figure are given the same reference numerals.

すなわち、IA、IBは入力端子、2は出力端子、3は
FET 、 Diはブリッジ整流器、LPFはローパス
フィルタ、CI、C2はコンデンサ、Llはチョークコ
イル、Llは検出巻線、D2はダイオードである。4は
制御アンプ、5は乗算器、6は比較器、7はゲート制御
回路である。そして、本実施例の特徴は、入力端子IA
、IBに(LPFを介して)整流器DIと並列になるよ
うに別のブリッジ整流器D3を接続し、この整流器D3
の出力電圧v3を抵抗R1,R2で分圧した電圧v2を
乗算器5に入力したことにある。
That is, IA and IB are input terminals, 2 is output terminal, 3 is FET, Di is bridge rectifier, LPF is low pass filter, CI and C2 are capacitors, Ll is choke coil, Ll is detection winding, and D2 is diode. . 4 is a control amplifier, 5 is a multiplier, 6 is a comparator, and 7 is a gate control circuit. The feature of this embodiment is that the input terminal IA
, IB connects another bridge rectifier D3 in parallel with the rectifier DI (via the LPF), and this rectifier D3
The reason is that the voltage v2 obtained by dividing the output voltage v3 of the output voltage v3 by the resistors R1 and R2 is inputted to the multiplier 5.

このような構成によれば、整流器D3の出力電圧v3の
波形は整流器DIの出力端に接続したコンデンサCIの
影響を受けることがない、すなわち、第2図■のように
歪のない波形となる。したがって、電圧v3を分圧して
得られた電圧v2を乗算器5に人力することによって、
歪のない出力を出力端子2に得ることができ、結局入力
端子IA、IB側にはノイズが現われない。
According to this configuration, the waveform of the output voltage v3 of the rectifier D3 is not affected by the capacitor CI connected to the output terminal of the rectifier DI, that is, it becomes a distortion-free waveform as shown in Figure 2 (■). . Therefore, by manually inputting the voltage v2 obtained by dividing the voltage v3 to the multiplier 5,
A distortion-free output can be obtained at the output terminal 2, and as a result, no noise appears on the input terminals IA and IB.

第4図は本発明の他の実施例を示す。この実施例は、ダ
イオードD4を介してコンデンサCIに充電電流を与え
るようにした点に特徴があり、他の構成は第2図のもの
と全く同様である。このような構成によれば、コンデン
サC1の放電電流はダイオードD4に阻止されるため、
電圧v2に影響を与えることがない、したがって、出力
端子2に歪のない出力が得られ、1次側にはノイズが現
われない。
FIG. 4 shows another embodiment of the invention. This embodiment is characterized in that a charging current is applied to the capacitor CI via the diode D4, and the other configurations are exactly the same as that of FIG. 2. According to such a configuration, since the discharge current of the capacitor C1 is blocked by the diode D4,
It does not affect the voltage v2, so a distortion-free output is obtained at the output terminal 2, and no noise appears on the primary side.

[発明の効果] 以上説明したように、本発明によれば、1次側にノイズ
の漏洩しない電源装置を得ることができる。
[Effects of the Invention] As described above, according to the present invention, it is possible to obtain a power supply device that does not leak noise to the primary side.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例を示す回路図、第2図は従来
電源装置の回路図、 第3図は整流器出力波形を示す図、 第4図は本発明の他の実施例を示す回路図である。
Fig. 1 is a circuit diagram showing one embodiment of the present invention, Fig. 2 is a circuit diagram of a conventional power supply device, Fig. 3 is a diagram showing a rectifier output waveform, and Fig. 4 is a diagram showing another embodiment of the present invention. It is a circuit diagram.

Claims (1)

【特許請求の範囲】 1)交流電源からの交流信号を整流する第1整流手段と
、 該整流手段の出力端と平滑出力端とを結ぶチョークコイ
ルと、 該チョークコイルの入力端とアース間を結ぶ第1コンデ
ンサと、 前記チョークコイルの出力端とアース間を結ぶ第2コン
デンサと、 前記チョークコイルの出力端とアース間の導通をオンオ
フするスイッチと、 前記交流電源からの交流信号を前記第1整流手段と同相
で整流する第2整流手段と、 該第2整流手段からの整流出力信号と前記スイッチに流
れる信号とに基づいて当該スイッチをオンオフ制御する
手段とを具えたことを特徴とする電源装置。 2)交流電源からの交流信号を整流する整流手段と、 該整流手段の出力端にアノードを接続したダイオードと
、 該ダイオードのカソードと平滑出力端とを結ぶチョーク
コイルと、 該チョークコイルの入力端とアース間を結ぶ第1コンデ
ンサと、 前記チョークコイルの出力端とアース間を結ぶ第2コン
デンサと、 前記チョークコイルの出力端とアース間の導通をオンオ
フするスイッチと、 前記整流手段の出力端からの整流出力信号と前記スイッ
チに流れる信号とに基づいて当該スイッチをオンオフ制
御する手段とを具えたことを特徴とする電源装置。
[Claims] 1) A first rectifier for rectifying an AC signal from an AC power source; a choke coil connecting the output end of the rectifier to a smoothing output end; and a connection between the input end of the choke coil and ground. a first capacitor that connects the choke coil to the ground; a second capacitor that connects the output end of the choke coil to the ground; a switch that turns on/off continuity between the output end of the choke coil and the ground; and a switch that connects the AC signal from the AC power source to the first A power source comprising: a second rectifier that rectifies in the same phase as the rectifier; and a means for controlling the switch on and off based on a rectified output signal from the second rectifier and a signal flowing to the switch. Device. 2) rectifying means for rectifying an alternating current signal from an alternating current power source; a diode having an anode connected to the output end of the rectifying means; a choke coil connecting the cathode of the diode to a smooth output end; and an input end of the choke coil. a first capacitor that connects between the output end of the choke coil and the ground; a second capacitor that connects the output end of the choke coil with the ground; a switch that turns on/off continuity between the output end of the choke coil and the ground; and a switch that connects the output end of the choke coil with the ground. A power supply device comprising means for controlling on/off of the switch based on a rectified output signal of the switch and a signal flowing through the switch.
JP847588A 1988-01-20 1988-01-20 Power unit Pending JPH01186167A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP847588A JPH01186167A (en) 1988-01-20 1988-01-20 Power unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP847588A JPH01186167A (en) 1988-01-20 1988-01-20 Power unit

Publications (1)

Publication Number Publication Date
JPH01186167A true JPH01186167A (en) 1989-07-25

Family

ID=11694140

Family Applications (1)

Application Number Title Priority Date Filing Date
JP847588A Pending JPH01186167A (en) 1988-01-20 1988-01-20 Power unit

Country Status (1)

Country Link
JP (1) JPH01186167A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2014059736A1 (en) * 2012-10-19 2014-04-24 联合汽车电子有限公司 Output voltage detection circuit of dc/dc conversion circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2014059736A1 (en) * 2012-10-19 2014-04-24 联合汽车电子有限公司 Output voltage detection circuit of dc/dc conversion circuit

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