JPH01184579A - Logic circuit design information display device - Google Patents

Abstract

PURPOSE:To efficiently perform the generation of a test pattern by arranging and displaying the relation of a circuit whose function is described written in a hardware descriptive language in the case of generating the test pattern to operate the circuit whose function is described at a function designing stage. CONSTITUTION:Functional description 101 whose function is designed by using the hardware descriptive language is interpreted by a net conversion routine 102, and is converted to net data 103. Next, by tracing the net data 103 by a bus extraction routine 104 and analyzing connection relation, a bus on which a data signal is propagated is extracted, then, a bus list 105 is generated. And based on the condition tracing routine 106 of the bus, the condition of data propagation is traced, respectively. By designating a value output to be taken by the condition at the time of tracing the condition of the bus, an activated test pattern 107 to satisfy respective condition can be obtained. The connection relation of the net data 103 and the relation of the condition, etc., are displayed in a form easy to be recognized.

Description

[Detailed Description of the Invention] [Objective of the Invention] (Industrial Application Field) This invention provides a logic circuit that processes, organizes and displays logic circuit design information and supports test pattern creation, etc. in logic circuit design. The present invention relates to a design information display device.

(Prior art) At the initial stage of logic circuit design, the general components (block diagram) of the logic circuit are considered, and state transition diagrams are used to determine how to control data transfer between the components. Perform functional design to design. In functional design, we use the hardware description language to
sfer Level O design.

Using this description, check whether the simulator operates as specified.

Here, a test pattern for performing the shimmy rake test is created by a designer or the like keeping in mind the specifications of the circuit operation. However, although it is relatively easy to create test patterns for typical circuit operations, it is extremely difficult to create test patterns for detailed operations from block diagrams and state transition diagrams. circuit design information written in a hardware description language is required.

(Problem to be solved by the invention) When creating a test pattern for operating nine functionally designed circuits, it is possible to create one by referring only to the block diagram and state transition diagram used to create one functional description. Test patterns are for typical basic operations; in order to create test patterns for other detailed circuit operations, it is necessary to refer to the interrelationships of each component of the functionally described circuit. .

However, considering circuit operation by looking at a functional description written in a hardware description language is a more difficult task than considering circuit operation by looking at a block diagram. This is because, in the description, the connection relationship between each component is expressed by referring to the signal name or from the right side to the left side of the transfer symbol, and the same signal name appears in various places in the description.
Imagining the structure of the circuit from now on is a very time-consuming task.

Therefore, in the present invention, when creating a test pattern for operating a circuit whose function has been described at the function design stage,
By organizing and displaying circuit relationships in functional descriptions written in a hardware description language, test patterns can be created efficiently.

Function description input means using a hardware description language, or
Corresponding to the functional description, it has a functional diagram input means for convertible graphical circuit representation, and means for converting the input functional description into a net structure having connection relationships of circuit components and operational relationships such as control signals. means for extracting a data-based path from the net structure; and means for a user to specify a path; and means for tracing an activation condition such that data propagates through the path; It has a means for displaying bus connection relationships, a means for displaying path activation conditions, and a means for displaying the process of tracing those conditions, and from the results of tracing the conditions by the user,
It has means for creating an input test pattern.

(Function) In order for the designer to process and organize the contents of the functional description containing the nine design information, which is detailed to the rounding of the function actual frame of the logic circuit, and to display it to the designer, etc., the designer, etc. can verify the operation of the logic circuit. The present invention improves the efficiency of creating test patterns for performing logic circuit design, and improves the efficiency of functional design, which is the initial stage of logic circuit design.

(Example) Examples of the present invention will be described below. FIG. 1 is a schematic diagram of an example of the processing flow of the present invention.

101 is a functional description designed using a hardware description language. An example of this functional description is shown in FIG. The functional description shown in FIG. 2 describes a simple CPU circuit. FIG. 3(a) shows the state transition flow of this circuit.

Figure 3 (b) (c) (d) (e) (f) (g)
represents the data between blocks in each state. By interpreting this functional description, you can trace all the connections between the circuit components such as registers, the relationships between the conditions of IF statements and CASE statements that execute each connection that performs register transfer, and the values that the condition values should take. It is converted into a similar net structure. The net conversion routine 102 in FIG. 1 interprets the functional description and converts it into net data. FIG. 4(b) shows a part of the data structure of the net data.

This is a part that represents the connection relationship of components (facilities) in the functional description of FIG. 4(a), the correspondence between components and sentences, and the relationship between conditional sentences.

103 in FIG. 1 is net data. Figure 1 104
In the path extraction routine, the path along which the data signal propagates is extracted by analyzing the connection relationship between the net data and the net data. FIG. 1 105 is a path list consisting of an extracted path and a list of components that make up the path.

Here, the user can also newly designate a path on which the data signal propagates and register a path list. 106 is a path condition tracing routine that traces each propagation condition for one day so that data propagates along that path. Condition tracing can be specified by the user in the interaction,
If there are multiple conditions to choose from, the user can select one. FIG. 1 107 shows an input signal pattern that satisfies each condition, which is obtained by specifying the values that the conditions should take when tracing the path conditions. FIG. 1 108 is a graphical display routine that displays connection relationships of network data, relationship of conditions, etc. in an easy-to-read format.

FIG. 5 is an example of a screen display when the user specifies a path. When a user specifies a component (facility) that makes up a path, the program searches a certain range and displays the corresponding path. If there are multiple applicable paths, the user makes a selection. 6th
The figure is an example of displaying the connection relationships of components (facilities). Clicking on the right side of a component's rectangle with a pointing device will display the output light of that component, and clicking on the left side of the rectangle will display the input source of that component. Clicking on the mouth symbol or Δ symbol in the figure displays the contents of calculations between data signals (components) in the function description, the contents of conditions for executing data transfer between components, clock signals, etc. Furthermore, these display methods can be changed into various forms by specifying the display mode. FIG. 7 is an example of a screen display when tracing the conditions for data propagation through a certain path. Users can specify the values each condition should take. Furthermore, if the component (facility) that appears in the condition is not an input terminal, the connection relationship of the input source of that component can be further traced.

〔Effect of the invention〕

Analyzing, organizing, and displaying the connection relationships of circuit components and operational relationships such as control signals of logic circuits with functional descriptions to designers, etc. This allows designers, etc. to verify the operation of functionally designed logic circuits. It improves the efficiency of creating test patterns that should not be carried out, and it also makes it possible to discover design errors in the early stages of design by analyzing functional descriptions.
The design period for functional design can be shortened.

[Brief explanation of the drawing]

FIG. 1 is an example of a processing flow of a logic circuit design information display device. FIG. 2 shows an example of functional description using a hardware description language. Fig. 3 is a diagram showing the state transition flow of the functionally described circuit in Fig. 2, and a diagram showing the reception and passing of data between blocks in each state, and Fig. 4 is an example of the expression of the functional description. Figure 5 shows an example of a screen display for the user to specify a path.
FIG. 6 is a diagram showing an example of a graphical screen display of circuit connection relationships, and FIG. 7 is a diagram showing an example of a screen display when tracing conditions for a certain path. 101...Functional description of a circuit functionally designed using a hardware description language 102...Conversion routine for converting a functional description into net data 103...Net data 104 expressing connection relationships and condition relationships of functional descriptions ...Path extraction routine 105 that analyzes net data and extracts data propagation paths...Path list 106 that represents the constituent components of each path of the extracted paths...Routine that traces activation conditions of paths 107... Test pattern for activating paths 108... Routine 109 for graphically displaying path connection relationships, condition relationships, etc.... Window routine 110 for displaying graphics and the user specifying display...・Computer display 110...Computer keyboard representative Patent attorney Nori Chika Ken Yudo Hikaru Matsuyama Q\N-0
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Claims (1)

[Claims] (1) Function description input means using a hardware description language performed at the initial stage of logic circuit design and net conversion that converts the functional description into a net structure that expresses the connection relationships of circuit components and the relationships of control signals that control operations. It has a routine that analyzes the net structure and extracts paths through which data signals propagate, a means that allows the user to set paths, and an activation condition for each path for data to propagate. means for tracing, means for displaying path constituent components and path activation conditions on a screen, and means for creating an input test pattern for propagating data to the path by a user selecting activation conditions. A logic circuit design information display device characterized by: