JPH01183202A - Voltage controlled oscillator - Google Patents

Voltage controlled oscillator

Info

Publication number
JPH01183202A
JPH01183202A JP719288A JP719288A JPH01183202A JP H01183202 A JPH01183202 A JP H01183202A JP 719288 A JP719288 A JP 719288A JP 719288 A JP719288 A JP 719288A JP H01183202 A JPH01183202 A JP H01183202A
Authority
JP
Japan
Prior art keywords
circuit
parallel
variable capacitance
resistance
bias
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP719288A
Other languages
Japanese (ja)
Inventor
Katsuki Obayashi
勝喜 大林
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Denshi KK
Original Assignee
Hitachi Denshi KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Denshi KK filed Critical Hitachi Denshi KK
Priority to JP719288A priority Critical patent/JPH01183202A/en
Publication of JPH01183202A publication Critical patent/JPH01183202A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To attain parasitic oscillation with a high C/N(carrier/noise ratio) by connecting in parallel a variable capacity diode to a circuit in which a capacitor and a resistance are connected in serial and connecting the resistance in parallel with two Schottky barrier diodes which are in mutual reversed polarity. CONSTITUTION:The serial circuit in which the connection capacitor 21 and the bias resistance 22 are connected in serial is connected in parallel to the variable capacity diode 15 consisting a variable capacity circuit 3, and the DC bias resistance 22 is connected in parallel with two Schottky barrier diodes 23 and 24 which are in mutual reversed polarity. Since the resistance is prevented from being inserted into the DC bias voltage line of the variable capacity diode 15, a thermal noise voltage due to the resistance is prevented from occurring, and the high C/N can be realized. With connecting the Schottky barrier diodes to the variable capacity diode 15 in parallel, parasitic oscillation can be prevented.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は周波数シンセサイザ等に使用する電圧制御発振
器に関し、特Kg圧可変素子として可変容量ダイオード
を用いた電圧制御発振器に関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a voltage controlled oscillator used in a frequency synthesizer, etc., and particularly relates to a voltage controlled oscillator using a variable capacitance diode as a variable pressure element.

〔従来の技術〕[Conventional technology]

従来の電圧制御発振器の一例を第2図′Jt参照して説
明すると、この電圧制御発振器は、第2図に示すように
、トランジスタを用いた負性抵抗発生回路1と、共振周
波数を決定する共振回路2と、可変容量回路3とから構
成されている。このとき、負性抵抗発生回路1は、電界
効果トランジスタ(以下、FETと略称する)4と、ソ
ース抵抗5、ゲート・ソース間容量(容1に’cコンデ
ンサともいう)6、ソース容量7、直流バイアス抵抗8
、共振回路2への結合容量9、電源端子10.出力結合
容i11、出力端子12からなる。そして、共振回路2
は共振用コイル13と共振用容量14からなる。また、
可変容量回路3は、一端が接地てれた可変容量ダイオー
ド15と、共振回路2との結合容量16、可変容量ダイ
オード15の直流バイアス端子17、寄生発振防止用抵
抗18、高周波阻止用インダクタ19、接地用容量2o
からなっている。
An example of a conventional voltage controlled oscillator will be explained with reference to FIG. 2'Jt. As shown in FIG. It is composed of a resonant circuit 2 and a variable capacitance circuit 3. At this time, the negative resistance generation circuit 1 includes a field effect transistor (hereinafter abbreviated as FET) 4, a source resistance 5, a gate-source capacitance (capacitance 1 is also referred to as a 'c capacitor) 6, a source capacitance 7, DC bias resistance 8
, a coupling capacitance 9 to the resonant circuit 2, a power supply terminal 10. It consists of an output coupling capacitor i11 and an output terminal 12. And resonant circuit 2
consists of a resonance coil 13 and a resonance capacitor 14. Also,
The variable capacitance circuit 3 includes a variable capacitance diode 15 whose one end is grounded, a coupling capacitance 16 with the resonant circuit 2, a DC bias terminal 17 of the variable capacitance diode 15, a parasitic oscillation prevention resistor 18, a high frequency blocking inductor 19, Grounding capacity 2o
It consists of

ここで、直流バイアス端子1Tに供給する直流のバイア
ス電圧を変化させることにより、可変容量ダイオード1
5の容量を変化させて電圧制御発振器の発振周波数を変
化させることができる。
Here, by changing the DC bias voltage supplied to the DC bias terminal 1T, the variable capacitance diode 1
By changing the capacitance of 5, the oscillation frequency of the voltage controlled oscillator can be changed.

〔発明が解決しようとする[題〕[Problem that the invention seeks to solve]

しかし、上記した従来のものでは、寄生発振防止用抵抗
18の熱雑音のため、気圧制御発振器のC/N (キャ
リア対ノイズ比)を高くできない欠点がある。また、寄
生発振防止用抵抗18を取シ去ると、直流バイアス電圧
が約1.5v以下で可変容量ダイオード15の整流作用
により寄生発振するという問題があった。
However, the conventional device described above has the disadvantage that the C/N (carrier-to-noise ratio) of the air pressure controlled oscillator cannot be increased due to the thermal noise of the parasitic oscillation prevention resistor 18. Further, if the resistor 18 for preventing parasitic oscillation is removed, there is a problem that parasitic oscillation occurs due to the rectification action of the variable capacitance diode 15 when the DC bias voltage is about 1.5 V or less.

本発明は以上の点に鑑み、このような問題を解決すべく
なされたもので、その目的は、高C/Nで、しかも寄生
発振しない電圧制御発振器を提供することにある。
In view of the above points, the present invention has been made to solve such problems, and its purpose is to provide a voltage controlled oscillator that has a high C/N and does not cause parasitic oscillation.

〔課題を解決するための手段〕[Means to solve the problem]

上記の目的を達成するため、本発明は、電圧可変素子と
して可変容量ダイオードを用いた電圧制御発振器におい
て、可変容量ダイオードのバイアス電圧供給ラインに寄
生発振防止用抵抗を挿入せず、その可変容量ダイオード
に並列にコンデンサと抵抗を直列接続した回路を接続し
、この抵抗に並列に2個のショットキーバリアダイオー
ドを互いに逆極性で接続したものである。
To achieve the above object, the present invention provides a voltage controlled oscillator using a variable capacitance diode as a voltage variable element, without inserting a parasitic oscillation prevention resistor into the bias voltage supply line of the variable capacitance diode. A circuit in which a capacitor and a resistor are connected in series is connected in parallel to the resistor, and two Schottky barrier diodes are connected in parallel to this resistor with opposite polarities.

〔作用〕[Effect]

したがって、本発明においては、可変容量ダイオードの
直流バイアス電圧ラインに抵抗が挿入されないので、−
との抵抗による熱雑音電圧が発生しなくなり、高C/N
が実現できる。また、可変容量ダイオードに対してショ
ットキーバリアダイオードを並列接続することにより、
可変容量ダイオードの整流作用をなくシ、かつ電圧制御
発振器の寄生発振を生じなくすることができる。
Therefore, in the present invention, since no resistor is inserted in the DC bias voltage line of the variable capacitance diode, -
Thermal noise voltage due to resistance between the
can be realized. In addition, by connecting a Schottky barrier diode in parallel to a variable capacitance diode,
It is possible to eliminate the rectification effect of the variable capacitance diode and to prevent the generation of parasitic oscillation of the voltage controlled oscillator.

〔実施例〕〔Example〕

以下、本発明を図面に示す実施例に基づいて詳細に説明
する。
Hereinafter, the present invention will be described in detail based on embodiments shown in the drawings.

第1図は本発明による電圧制御発振器の一実施例を示す
回路図である。同図において、1は負性抵抗発生回路で
あって、FET4と、ソース抵抗5、ゲート・ソース間
容量6、ソース容量7、直流バイアス抵抗8、共振回路
2との結合容量9、電源端子10.出力結合容量11、
出力端子12から構成されている。そして、共振回路2
は共振用コイル13と共振用容f14からなる。また、
可変容量回路3は、一端が接地され六回変容量ダイオー
ド15と、共振回路2との結合容量16、可変容量ダイ
オード15の直流バイアス端子17.高周波阻止用イン
ダクタ19、接地用容fi20.可変容量ダイオード1
5との結合容量(コンデンサ)21、直流バイアス抵抗
22、寄生発振防止用ショットキーバリアダイオード2
3および24かも構成されている。
FIG. 1 is a circuit diagram showing an embodiment of a voltage controlled oscillator according to the present invention. In the figure, 1 is a negative resistance generation circuit, which includes an FET 4, a source resistance 5, a gate-source capacitance 6, a source capacitance 7, a DC bias resistance 8, a coupling capacitance 9 with the resonance circuit 2, and a power supply terminal 10. .. Output coupling capacitance 11,
It is composed of an output terminal 12. And resonant circuit 2
consists of a resonant coil 13 and a resonant capacitor f14. Also,
The variable capacitance circuit 3 has one end grounded, a six-time variable capacitance diode 15, a coupling capacitance 16 with the resonant circuit 2, and a DC bias terminal 17 of the variable capacitance diode 15. High frequency blocking inductor 19, grounding capacitor fi20. Variable capacitance diode 1
5, a coupling capacitor (capacitor) 21, a DC bias resistor 22, a Schottky barrier diode 2 for preventing parasitic oscillation.
3 and 24 are also configured.

すなわち、本実施例が第2図の従来例のものと異なる点
は、可変容量回路3を構成する直流バイアス電圧供給ラ
インに抵抗を挿入することなく、可変容量ダイオード1
5に対して並列に結合容量21と直流バイアス抵抗22
を直列接続した直列回路を接続し、この直流バイアス抵
抗22に並列に2個のショットキーバリアダイオード2
3.24を互いに逆極性で接続したものである。なお、
図中、同一符号は同一または和尚部分を示している。
That is, the difference between this embodiment and the conventional example shown in FIG. 2 is that the variable capacitance diode 1 is
A coupling capacitor 21 and a DC bias resistor 22 are connected in parallel to 5.
A series circuit is connected in series, and two Schottky barrier diodes 2 are connected in parallel to this DC bias resistor 22.
3.24 are connected with opposite polarity. In addition,
In the drawings, the same reference numerals indicate the same or monk parts.

このように、上記実施例のものによると、直流バイアス
端子17と高周波阻止用イ?ダクタ19の間に寄生発振
防止用抵抗18(第2図参照)が挿入されていないので
、その抵抗の熱雑音によるC/N低下がなく、高C/N
が得られる。また、可変容量ダイオード15に、鈷合容
t21を介して互いに逆極性のショットキーバリアダイ
オード23.24を並列接続することにより、可変容量
ダイオード15に発生する発振出力1ノベルが減少し、
可変容量ダイオード15の整流作用がなくなシ、寄生発
振を防ぐことができる。さらに、可変容量ダイオード1
5での発振出力レベルが小さくなるため、低い制御電圧
(1,5V以下)でもC/N劣化が少なくなり、広い範
囲で高C/Nが得られる等の利点を有する。
As described above, according to the above embodiment, the DC bias terminal 17 and the high frequency blocking terminal are connected to each other. Since the parasitic oscillation prevention resistor 18 (see Figure 2) is not inserted between the inductor 19, there is no C/N drop due to thermal noise of the resistor, resulting in a high C/N.
is obtained. In addition, by connecting Schottky barrier diodes 23 and 24 of opposite polarity to the variable capacitance diode 15 in parallel via the coupling capacitor t21, the oscillation output 1 novel generated in the variable capacitance diode 15 is reduced.
Since the rectifying effect of the variable capacitance diode 15 is eliminated, parasitic oscillation can be prevented. Furthermore, variable capacitance diode 1
Since the oscillation output level at 5 is small, C/N deterioration is reduced even with a low control voltage (1.5 V or less), and a high C/N can be obtained over a wide range.

〔発明の効果〕〔Effect of the invention〕

以上説明したように、本発明によれば、可変容量ダイオ
ードの直流バイアス電圧供給ラインに寄生発振防止用抵
抗を挿入しなくても、その可変容量ダイオードに並列に
互いに逆向きのショットキーバリアダイオードを接続す
ることによって、寄生発振を防止できるため、高C/N
の電圧制御発振器が実現でき、実用上の効果は頗る大で
ある。
As explained above, according to the present invention, Schottky barrier diodes in opposite directions are connected in parallel to the variable capacitance diode without inserting a parasitic oscillation prevention resistor into the DC bias voltage supply line of the variable capacitance diode. By connecting, parasitic oscillation can be prevented, resulting in high C/N.
A voltage-controlled oscillator can be realized, and the practical effects are extremely large.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例を示す回路図、第2図は従来
の電圧制御発振器の一例を示す回路図である。 1・尋φ・負性抵抗発生回路、2・・・・共振回路、3
・・・・可変容量回路、4・・・・FET 。 5.8.22・・・・抵抗、6.7.9.11,14゜
16.20.21−・・・容量(コンデンサ)、13−
・・・共振用コイル、15・・・・可変容量ダイオード
、1T・・・−[流バイアス端子、19・・・・高周波
阻止用インダクタ、23,24・・−・ショットキーバ
リアダイオード。
FIG. 1 is a circuit diagram showing an embodiment of the present invention, and FIG. 2 is a circuit diagram showing an example of a conventional voltage controlled oscillator. 1. Thickness φ. Negative resistance generation circuit, 2. Resonance circuit, 3
...Variable capacitance circuit, 4...FET. 5.8.22...Resistance, 6.7.9.11,14゜16.20.21-...Capacitance (capacitor), 13-
... Resonance coil, 15 ... Variable capacitance diode, 1T ... - [current bias terminal, 19 ... High frequency blocking inductor, 23, 24 ... Schottky barrier diode.

Claims (1)

【特許請求の範囲】[Claims] 負性抵抗発生回路と、この負性抵抗発生回路に結合され
た共振回路と、この共振回路に対しその共振周波数を可
変すべく挿入された可変容量ダイオード、該可変容量ダ
イオードに並列に接続されかつコンデンサと抵抗が直列
接続された回路および前記抵抗に並列に互いに逆極性で
接続された2個のショットキーバリアダイオードからな
る可変容量回路を具備し、前記可変容量ダイオードに供
給される直流電圧によつて発振周波数を制御するように
したことを特徴とする電圧制御発振器。
a negative resistance generating circuit, a resonant circuit coupled to the negative resistance generating circuit, a variable capacitance diode inserted in this resonant circuit to vary its resonant frequency, and connected in parallel to the variable capacitance diode. The variable capacitance circuit includes a circuit in which a capacitor and a resistor are connected in series, and two Schottky barrier diodes connected in parallel to the resistor with opposite polarities. A voltage-controlled oscillator characterized in that the oscillation frequency is controlled by the voltage control oscillator.
JP719288A 1988-01-16 1988-01-16 Voltage controlled oscillator Pending JPH01183202A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP719288A JPH01183202A (en) 1988-01-16 1988-01-16 Voltage controlled oscillator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP719288A JPH01183202A (en) 1988-01-16 1988-01-16 Voltage controlled oscillator

Publications (1)

Publication Number Publication Date
JPH01183202A true JPH01183202A (en) 1989-07-21

Family

ID=11659174

Family Applications (1)

Application Number Title Priority Date Filing Date
JP719288A Pending JPH01183202A (en) 1988-01-16 1988-01-16 Voltage controlled oscillator

Country Status (1)

Country Link
JP (1) JPH01183202A (en)

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