JPH01180796U - - Google Patents
Info
- Publication number
- JPH01180796U JPH01180796U JP1988074443U JP7444388U JPH01180796U JP H01180796 U JPH01180796 U JP H01180796U JP 1988074443 U JP1988074443 U JP 1988074443U JP 7444388 U JP7444388 U JP 7444388U JP H01180796 U JPH01180796 U JP H01180796U
- Authority
- JP
- Japan
- Prior art keywords
- timer reservation
- memory
- circuit
- reservation device
- timer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000015654 memory Effects 0.000 claims description 7
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Electric Clocks (AREA)
- Circuits Of Receivers In General (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1988074443U JPH01180796U (da) | 1988-06-03 | 1988-06-03 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1988074443U JPH01180796U (da) | 1988-06-03 | 1988-06-03 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH01180796U true JPH01180796U (da) | 1989-12-26 |
Family
ID=31299554
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1988074443U Pending JPH01180796U (da) | 1988-06-03 | 1988-06-03 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH01180796U (da) |
-
1988
- 1988-06-03 JP JP1988074443U patent/JPH01180796U/ja active Pending