JPH01180796U - - Google Patents
Info
- Publication number
- JPH01180796U JPH01180796U JP1988074443U JP7444388U JPH01180796U JP H01180796 U JPH01180796 U JP H01180796U JP 1988074443 U JP1988074443 U JP 1988074443U JP 7444388 U JP7444388 U JP 7444388U JP H01180796 U JPH01180796 U JP H01180796U
- Authority
- JP
- Japan
- Prior art keywords
- timer reservation
- memory
- circuit
- reservation device
- timer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000015654 memory Effects 0.000 claims description 7
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Electric Clocks (AREA)
- Circuits Of Receivers In General (AREA)
Description
第1図はこの考案の一実施例によるタイマ予約
装置を使用したVTRの回路を示すブロツク図、
第2図は第1図のタイマ予約動作のフローチヤー
ト、第3図はこの考案の他の実施例によるタイマ
予約装置を使用したVTRの回路を示すブロツク
図、第4図は従来のタイマ予約装置を使用したV
TRの回路を示すブロツク図、第5図は第4図の
もののフローチヤートである。
図において、1…予約開始ボタン、2…メモリ
制御回路、3…内部タイマメモリ、31,33…
外部タイマメモリ、32…接続端子、34…磁気
ヘツド、35…ヘツドアンプ、36…メモリ制御
回路用バツフア、7…制御マイコン、9…タイマ
予約装置。なお、図中、同一符号は同一、または
相当部分を示す。
FIG. 1 is a block diagram showing a circuit of a VTR using a timer reservation device according to an embodiment of this invention;
2 is a flowchart of the timer reservation operation shown in FIG. 1, FIG. 3 is a block diagram showing a circuit of a VTR using a timer reservation device according to another embodiment of this invention, and FIG. 4 is a conventional timer reservation device. V using
FIG. 5 is a block diagram showing the circuit of the TR, and FIG. 5 is a flowchart of the circuit shown in FIG. In the figure, 1...Reservation start button, 2...Memory control circuit, 3...Internal timer memory, 31, 33...
External timer memory, 32...Connection terminal, 34...Magnetic head, 35...Head amplifier, 36...Buffer for memory control circuit, 7...Control microcomputer, 9...Timer reservation device. In addition, in the figures, the same reference numerals indicate the same or corresponding parts.
Claims (1)
全部を1個以上の着脱可能で読み書も可能な外部
メモリに置き換えたことを特徴とする外部メモリ
タイマ予約装置。 An external memory timer reservation device characterized in that part or all of the memory that stores timer reservation information is replaced with one or more removable, readable and writable external memories.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1988074443U JPH01180796U (en) | 1988-06-03 | 1988-06-03 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1988074443U JPH01180796U (en) | 1988-06-03 | 1988-06-03 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH01180796U true JPH01180796U (en) | 1989-12-26 |
Family
ID=31299554
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1988074443U Pending JPH01180796U (en) | 1988-06-03 | 1988-06-03 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH01180796U (en) |
-
1988
- 1988-06-03 JP JP1988074443U patent/JPH01180796U/ja active Pending