JPH01179097A - Audio signal reproducing device - Google Patents

Abstract

PURPOSE:To vary the interval of a playback audio signal by varying and controlling the frequency of a clock signal supplied to an audio signal reproduction system. CONSTITUTION:A counter value varying circuit 30 varies the value of variation count data DCNT according to a counter value variation control signal CCNT and sends it out to a 2nd counter circuit 27. A comparison signal SCMP inputted to a phase comparator 24 varies in frequency about a reference signal SMST and the comparison output consisting of the frequency difference is supplied to the connection neutral point (b) of a bias generating circuit 28 to vary the frequency of a variable clock signal CKVAR sent out of a voltage-controlled oscillation circuit 25 and this variable clock signal CKVAR is sent out to respective parts of a CD player. Consequently, the processing period of the whole audio signal reproducing device is varied and controlled and the interval of the playback audio signal can be varied.

Description

DETAILED DESCRIPTION OF THE INVENTION A. Field of Industrial Application The present invention relates to an audio signal reproducing device, and is suitable for application to a digital audio signal reproducing device such as a compact disc (CD) player.

B. Summary of the Invention The present invention provides an audio signal reproducing device for reproducing digital audio data recorded on a recording medium, by variably controlling the frequency of a clock signal applied to an audio signal reproducing system, thereby changing the pitch of a reproduced audio signal. May be variable.

C. PRIOR TECHNOLOGY Conventionally, in this type of CD player, for use in karaoke, etc., the pitch of an accompaniment song made up of a reproduced audio signal is variably controlled so that the singer can select the pitch that is easiest for the singer to sing. Proposed.

That is, as shown in FIG. 2, in a CD player 1, digital audio data recorded on a compact disc (CD) 3, which is driven and rotated in a predetermined direction by a motor 2, is recorded using an optical head 4. The signal is read out as a reproduction signal RF and input to the data succession circuit 5.

This data succession circuit 5 obtains reproduced digital data S□ based on the input reproduced signal RF, and this reproduced digital data S! 1G to the subsequent digital signal processing circuit 6.

Next, in the digital signal processing circuit 6, a random access memory (RAM)? Then, error correction processing is performed using the time axis expansion/contraction circuit 8, etc., and pitch variable processing is performed using a time axis expansion/contraction method that varies the writing and reading intervals to the RAM 7, and reproduced digital audio data [)a
s, and this playback digital audio data D0
is sent out as a reproduced audio signal PB,t via the subsequent digital-to-analog conversion circuit 8.

In this way, the entire CD player 1 reproduces the audio data recorded on the CD 3 to obtain the reproduced audio signal PB0, and also obtains the reproduced audio signal PBA whose pitch is variably controlled based on the user's specifications, for example. is being done.

In this CD player 1, the motor 2 and the optical head 4 are driven and controlled based on servo signals SFG and ssm provided from a servo circuit 10, respectively.

Further, the digital signal processing circuit 6, the digital-to-analog conversion circuit 9, and the servo circuit IO are configured to operate under the control of control signals COP, CDA, and C8l, respectively, given from a system control circuit 11 configured with a microcomputer, for example. In addition, a data succession circuit 5, a digital processing circuit 6, a time axis expansion/contraction circuit 8,
The digital-to-analog conversion circuit 9, the servo circuit 10, and the system control circuit 11 are connected to a crystal oscillator 1 having a crystal 12.
It operates based on the master clock signal CKMst obtained from 3.

Furthermore, the system control circuit 11 sends a pitch variable signal to the digital signal processing circuit 6 to raise or lower the pitch, based on a key human power signal S KEY obtained from the key human power section 14, which includes a pitch variable key having an up-down key configuration, for example. By sending out a control signal C□ representing the process and a display signal SDSF representing the result of changing the pitch to the display unit 15, the result of changing the pitch is displayed, thus improving usability for the user. There is.

D Problems to be Solved by the Invention However, in a CD player l having such a configuration, the pitch is variably controlled by a time axis expansion/contraction method, and according to this method, the reproduction digital data 5ell with a constant sampling frequency is RAM at different times?
In order to read and write data on the CO3, special data processing such as thinning and interpolation is required for the original audio data recorded on the CO3, and the music information of the reproduced audio signal PBae after the data processing is incorrect. There is a problem that the circuit structure for preventing this problem becomes complicated and large as a whole.

Incidentally, conventionally, two large-scale integrated circuits (LSI), 16 (kbyte)
), a digital-to-analog conversion circuit, a low-pass filter, a crystal, etc. are required.

The present invention has been made in consideration of the above points, and it is an object of the present invention to propose an audio signal reproducing device that can perform pitch variable processing with a simple configuration.

E Means for Solving the Problem In order to solve this problem, the present invention uses a predetermined clock signal CKxsv to read out the digital audio data recorded on the recording medium 3, and reproduces the digital audio data based on the digital audio data. The audio signal reproducing device 1 that outputs the audio signal PBA is provided with a clock signal variable means 20 that variably controls the frequency of the clock signal CKvAIII.

The clock signal CKv is adjusted using the F-action clock signal variable means 20.
By variably controlling the frequency of a*, the processing cycle of the entire audio signal reproducing device 1 can be variably controlled, and thus the pitch of the reproduced audio signal PBA can be changed.

G example An embodiment of the present invention will be described in detail below with reference to the drawings.

In FIG. 1, in which parts corresponding to those in FIG.
This figure shows a clock signal generation circuit of a CD player 1 that can perform pitch variable processing without using a clock selection circuit 21, which is used to control a clock selection signal Ce1l inputted from the system control circuit 11 (FIG. 2). Based on this, for example, during a period when the pitch variable processing is not specified by the user, by selecting the first input terminal a1, the master clock signal CKHst oscillated from the crystal oscillator 13 that grows the crystal 12 in the same way as before. is sent to each part of the CD player l.

In this embodiment, the frequency of the master clock signal CKsst oscillated from the crystal oscillator 13 is 16.9 (M
Hz), and is sent to the clock selection circuit 21, and is also input to the l/4 frequency divider circuit 22 to be converted to l/4.
After being frequency-divided, it is applied to the first counter circuit 23.

This first counter circuit 23 has a 1/1000 counter configuration, for example, and divides the input signal by 1/1000,
The reference signal S is input to the subsequent phase comparator 24 as the reference signal S EF.

In addition to this, the phase comparator 24 receives a variable clock signal CKvae oscillated from the voltage controlled oscillation circuit 25.
The pitch variable processing is sent to the second input terminal a2 of the clock selection circuit 21 selected for a period specified by the user, and is frequency-divided by 1/4 through the 1/4 frequency divider circuit 26. Comparison signal S C
It is input as NF.

This voltage-controlled oscillator circuit 25 is connected to a bias generating circuit 28 having a series circuit of first and second resistors R1 and R2 having the same resistance between the power supply V and the ground. The point voltage is passed through a low pass filter (LPF) 29
As a result, the voltage controlled oscillation circuit 25 receives the master clock signal CK oscillated from the crystal oscillator 13 when its midpoint voltage is 1/2 V*.
A variable clock signal CKvam having a frequency of 16.9 (MHz) equal to xst is sent out.

Here, the second counter circuit 27 is configured such that its counter value can be set externally, and the changed count data DCN? inputted from the counter value changing circuit 30? The value of n
1 by adding to the initial value 1000 of the counter value.
/(1000+n) counter.

The counter value changing circuit 30 receives the key from the user's manual input section 14.
A key human power signal of 311 tV as pitch variable information input using the up/down keys of the system control circuit 1
1 as a counter value change control signal CCWT, the counter value change circuit 30 changes the value n of the change count data D CNF, for example, from -190 to 19, based on the counter value change control signal ccNt.
Within the range of 0, it is changed every 10 steps and sent to the second counter circuit 27.

As a result, the comparison signal SC input to the phase comparator 24
□ indicates the reference signal S by changing the counter value of the counter circuit 27. Its frequency changes with respect to T,
A comparator droop (PLL) circuit is formed by the frequency difference, and the variable clock signal sent from the voltage-controlled oscillation circuit 25 is controlled to change the counter value based on the pitch change specification from the user. The frequency of CKV□ can be changed.

Thus, by sending this variable clock signal CKv□ to each part of the CD player l, the data reading circuit 5,
Digital processing circuit 6, digital-to-analog conversion circuit 9
, the servo circuit 10 and the system control circuit 11 can be controlled based on the variable clock signal CKvAII, thereby controlling the entire CD player 1 using the variable clock signal CKvA having a higher (or lower) frequency than the reference clock signal CKHsr. , I, it is possible to change the pitch of the output reproduced audio signal PBaa to be higher (or lower) according to the user's preference.

In the above configuration, when the user specifies, for example, to raise the pitch of the reproduced audio signal PBao by 1% (or 10%), the counter value changing circuit 30 changes the changed count data DcNT to a value n in response to this. ---
10 (or -100), and the second counter circuit 2
By setting 7 to 1/990 (or 1/900) counter, the phase-locked loop of the clock signal generation circuit 20 is locked at a frequency 1% (or 10%) higher than the frequency of the reference clock signal CKxst. Thus, the entire CD player l can be controlled at a frequency of 1% (
or 10%) high frequency variable clock signal GKVAI
By driving using the reproduced audio signal PB
Al) pitch can be raised by 1% (or 10%).

In addition, conversely, the playback audio signal PB is received from the user.
When the pitch of 0 is specified to be lowered by 1% (or 10%), the counter value changing circuit 30 changes the changed count data D CHT to the value n=10 (or 10%) accordingly.
00), and the second counter circuit 27 is set to 1/101.
0 (or 1/1100) counter to lock the phase-locked loop of the clock signal generation circuit 20 at a frequency 1% (or 10%) lower than the frequency of the reference clock signal CK, 4st. In this way, the entire CD player l is controlled by 1% (or 10%) with respect to the frequency of the reference clock signal CK, 1st.
By driving using a low frequency variable clock signal cKv□, the reproduced audio signal PB&! It is possible to lower the pitch of 1 by 1% (or 10%).

According to the above configuration, a clock signal CKV
By changing the frequency of the playback audio signal PB0, it is possible to realize a CD player 1 that can change the pitch of the reproduced audio signal PB0 according to the user's preference with a simple configuration.

Further, according to the embodiment described above, 1
74 frequency divider circuit 22, 26, first and second counter circuits 23 and 27, phase comparator 24, counter value changing circuit 3
By configuring 0 on one chip of a large-scale integrated circuit (LSI), a CD player having a pitch variable function can be made much smaller and simpler than the conventional one.

In the above embodiment, the master clock signals CK9 and CK7 sent from the crystal oscillator 13 are directly supplied to each part of the CD player during the period when the pitch change process is not specified by the user. Instead, the first
and the second counter circuits 23 and 27 are both 1/100
By setting the counter to 0, the clock selection circuit 2
1 and instead supplying the variable clock signal CKvam output from the constant voltage controlled oscillation circuit 25 to each part of the CD player, the same effect as in the above-described embodiment can be achieved.

Furthermore, in the above-described embodiments, the case where the present invention is applied to a CD player has been described, but the present invention is not limited to this and can be widely applied to other audio signal reproducing devices such as a rotary head type audio tape recorder. It is suitable.

Effects of the Invention As described above, according to the present invention, in an audio signal reproducing apparatus that reproduces digital audio data recorded on a recording medium, the frequency of the clock signal applied to the audio signal reproducing system is adjusted using the clock signal variable means. By variably controlling , it is possible to realize an audio signal reproducing device that can vary the pitch of a reproduced audio signal with a simple configuration.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing a clock signal generation circuit of a CD player according to an embodiment of the present invention, and FIG. 2 is a block diagram showing the configuration of the CD player. 1...CD player, 2...motor,
3...CD. 4... Optical head, 5... Data reading circuit, 6... Digital signal processing circuit, 7...
...RAM, 8...Time axis expansion/contraction circuit, 9...
...Digital-to-analog conversion circuit, 10...
・Servo circuit, 11...System control circuit, 1
2...Crystal, 13...Crystal oscillator, 2
0...Clock signal generation circuit, 21...
・Clock selection circuit, 22.26...174 frequency division circuit, 23.27...Counter circuit, 24.
... Phase comparator, 25 ... Voltage controlled oscillation circuit, 30 ... Counter value changing circuit.

Claims (1)

[Scope of Claims] An audio signal reproducing device that uses a predetermined clock signal to read digital audio data recorded on a recording medium and outputs a reproduced audio signal based on the digital audio data, comprising: An audio signal reproducing device comprising a clock signal variable means for variably controlling the frequency, and changing the pitch of the reproduced audio signal.