JPH01177679A - System for processing circuit diagram data - Google Patents

System for processing circuit diagram data

Info

Publication number
JPH01177679A
JPH01177679A JP63002317A JP231788A JPH01177679A JP H01177679 A JPH01177679 A JP H01177679A JP 63002317 A JP63002317 A JP 63002317A JP 231788 A JP231788 A JP 231788A JP H01177679 A JPH01177679 A JP H01177679A
Authority
JP
Japan
Prior art keywords
symbol
data
diagrams
diagram
circuit diagram
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63002317A
Other languages
Japanese (ja)
Inventor
Shinichi Sato
眞一 佐藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP63002317A priority Critical patent/JPH01177679A/en
Publication of JPH01177679A publication Critical patent/JPH01177679A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To obtain a clean and easy-to-see circuit diagram by extracting stored symbol diagrams and the arranged data, rearranging the symbol diagrams of the data in lining them up, and storing the symbol diagrams and rearranged data into a file. CONSTITUTION:A symbol diagram input arranging means 1 inputs plural symbol diagrams to express a circuit function and arranges them on a CRT screen. A symbol diagram arranged data storing means 2 stores the symbol diagrams arranged on the screen and the arranged data. A symbol diagram line-up means 3 extracts the symbol diagrams stored in the symbol diagram arranged data stored means 2 and the arranged data, lines up the symbol diagrams and rearranges them. A symbol diagram rearranged data storing means 4 stores the symbol diagrams rearranged in a line shape and the rearranged data to the file. Further, a symbol diagram connecting means 5 extracts the symbol diagrams stored in the symbol diagram rearranged data storing means 4 and the arranged data, and executes a connection between the symbol diagrams. Thus, the clean and easy-to-see circuit diagram can be obtained.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は回路図データ処理方式に関し、特にコンピュー
タに回路図データを入力して処理する回路図データ処理
方式に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a circuit diagram data processing system, and more particularly to a circuit diagram data processing system in which circuit diagram data is input to a computer and processed.

〔従来の技術〕[Conventional technology]

コンピュータに回路図データを入力して処理する従来の
回路図データ処理方式は、使用者がCRT画面を見なが
らキーボードとマウスを操作して、回路機能を表わすシ
ンボル図形を入力して、それらをCRT画面上に配置す
るとともに、それらのシンボル図形を整列させるために
は、使用者が各シンボル図形の座標位置を意識して、C
R,T画面上に時間をかけて正確に配置する必要がある
In the conventional circuit diagram data processing method, which inputs circuit diagram data into a computer and processes it, the user operates a keyboard and mouse while looking at a CRT screen, inputs symbol shapes representing circuit functions, and then inputs them to the CRT. In order to arrange the symbol figures on the screen and to align them, the user must be aware of the coordinate position of each symbol figure and press C.
It is necessary to take a long time to accurately place it on the R and T screens.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

上述した従来の回路図データ処理方式は、時間をかけな
ければ、シンボル図形を入力して、それらをCRT画面
上に配置するとき、多少ずれる場合が多いので、きれい
で見やすい回路図が得られないという欠点がある。
The conventional circuit diagram data processing method described above does not take much time, and it is difficult to obtain a clean and easy-to-read circuit diagram because there are often slight deviations when inputting symbol figures and placing them on a CRT screen. There is a drawback.

このため、従来の回路図データ処理方式は、きれいで見
やすい回路図を作成するためには、使用者が各シンボル
図形の座標位置を意識して、CRT画面上に正確に配置
しなければならないので、回路図データを入力するため
に長時間を要するという問題点がある。
For this reason, in conventional circuit diagram data processing methods, in order to create a clean and easy-to-read circuit diagram, the user must be aware of the coordinate position of each symbol figure and place it accurately on the CRT screen. However, there is a problem in that it takes a long time to input circuit diagram data.

本発明の目的は、きれいで見やすい回路図が出力できる
回路図データを能率良く作成できる回路図データ処理方
式を提供することである。
An object of the present invention is to provide a circuit diagram data processing method that can efficiently create circuit diagram data that can output a clean and easy-to-read circuit diagram.

〔問題点を解決するための手段〕[Means for solving problems]

本発明の回路図データ処理方式は、 (A)回路機能を表わす複数のシンボル図形を入力して
、画面上に配置するシンボル図形入力配置手段、 (B)前記シンボル図形入力配置手段で画面上に配置さ
れたシンボル図形とその配置データをファイルに記憶す
るシンボル図形配置データ記憶手段、 (C)前記シンボル図形配置データ記憶手段に記憶され
たシンボル図形とその配置データを取出し、それらのシ
ンボル図形を整列させて再配置するシンボル図形整列手
段、 (D)前記シンボル図形整列手段で整列状に再配置され
たシンボル図形とその再配置データをファイルに記憶す
るシンボル図形再配置データ記憶手段、 を備えて構成されている。
The circuit diagram data processing method of the present invention includes: (A) symbol figure input arrangement means for inputting a plurality of symbol figures representing circuit functions and arranging them on the screen; (B) symbol figure input arrangement means for inputting a plurality of symbol figures representing circuit functions and arranging them on the screen; symbol figure arrangement data storage means for storing arranged symbol figures and their arrangement data in a file; (C) extracting the symbol figures and their arrangement data stored in the symbol figure arrangement data storage means and arranging the symbol figures; (D) symbol figure relocation data storage means for storing symbol figures rearranged in an aligned manner by the symbol figure alignment means and their rearrangement data in a file; has been done.

〔実施例〕〔Example〕

次に本発明の実施例について図面を参照して説明する。 Next, embodiments of the present invention will be described with reference to the drawings.

第1図は本発明の回路図データ処理方式の一実施例を示
すブロック図である。
FIG. 1 is a block diagram showing an embodiment of the circuit diagram data processing method of the present invention.

第1図において、シンボル図形入力配置手段1は、使用
者がコンピュータのCRT画面を見ながらキーボードと
マウスを操作し、回路機能を表わす複数のシンボル図形
を入力して、CRT画面上に配置する。
In FIG. 1, a symbol figure input arrangement means 1 allows a user to operate a keyboard and mouse while looking at a CRT screen of a computer, input a plurality of symbol figures representing circuit functions, and arrange them on the CRT screen.

この入力と配置は、あまり正確性を要求しないので、短
時間に能率よく行うことができる。
This input and placement does not require much accuracy, so it can be done efficiently in a short time.

第3図は入力されCR,T画面上に配置されたシ〉′ポ
ル図形の一例を示す画面情報図である。
FIG. 3 is a screen information diagram showing an example of a C〉'pol figure inputted and placed on the CR, T screen.

第3図に示すように、シンボル図形a、b、cの左端の
位置は、縦方向にそれぞれ多少ずれた状態になっている
As shown in FIG. 3, the positions of the left ends of symbol figures a, b, and c are slightly shifted in the vertical direction.

シンボル図形配置データ記憶手段2は、シンボル図形入
力配置手段1で画面上に配置されたシンボル図形とその
配置データをファイルに記憶する。
The symbol figure arrangement data storage means 2 stores the symbol figures arranged on the screen by the symbol figure input arrangement means 1 and their arrangement data in a file.

また、シンボル図形整列手段3は、シンボル図形配置デ
ータ記憶手段2に記憶されたシンボル図形とその配置デ
ータを取出し、それらのシンボル図形を整列させて再配
置する。
Further, the symbol figure arrangement means 3 retrieves the symbol figures and their arrangement data stored in the symbol figure arrangement data storage means 2, and aligns and rearranges the symbol figures.

第2図はシンボル図形整列手段3の動作の一例を示す流
れ図である。
FIG. 2 is a flowchart showing an example of the operation of the symbol/figure arrangement means 3.

シ〉ポル図形整列手段3は、まず、ステップ81で、キ
ーとなるシンボル図形を選択し、ステップS2で、整列
させるシンボル図形を選択する。
The symbol figure arrangement means 3 first selects a key symbol figure in step 81, and selects a symbol figure to be arranged in step S2.

次に、ステップS3で、選択されたキーとなるシンボル
図形の左端のX座標を抽出する。
Next, in step S3, the X coordinate of the left end of the symbol figure serving as the selected key is extracted.

さらに、ステップS4で、選択された整列すべきシンボ
ル図形の左端のX座標をキーとなるシンボル図形の左端
のX座標に一致させることにより、各シンボル図形を縦
方向に整列させて、きれいで見やすい回路図に再配置す
ることができる。
Furthermore, in step S4, by matching the X coordinate of the left end of the selected symbol shapes to be aligned with the X coordinate of the left end of the key symbol shape, each symbol shape is aligned vertically and is clean and easy to see. Can be rearranged on the schematic.

第4図は縦方向に整列されたシンボル図形の一例を示す
画面情報図である。
FIG. 4 is a screen information diagram showing an example of symbol figures arranged in the vertical direction.

第4図に示すように、シンボル図形a、bの左端の位置
は、シンボル図形Cの左端の位置に整列した状態になっ
ている。
As shown in FIG. 4, the left end positions of symbol figures a and b are aligned with the left end position of symbol figure C.

この結果、シンボル図形再配置データ記憶手段4は、シ
ンボル図形整列手段3で整列状に再配置されたシンボル
図形とその再配置データをファイルに記憶する。
As a result, the symbol/figure rearrangement data storage means 4 stores the symbol figures rearranged in an aligned manner by the symbol/figure alignment means 3 and their rearrangement data in a file.

上記のシンボル図形配置データ記憶手段2、シンホル図
形整列手段3およびシンボル図形再配置データ記憶手段
4は、いずれもあまり人手を要せず、コンピュータか処
理するので、短時間に能率よく行うことがてきる。
The above symbol figure arrangement data storage means 2, symbol figure arrangement means 3 and symbol figure rearrangement data storage means 4 do not require much manpower and are processed by a computer, so they can be performed efficiently in a short time. Ru.

また、シンボル図形結線手段5は、シ〉′ポル図形再配
置データ記憶手段4に記憶されたシンボル図形とその配
置テークを取出し、それらのシンボル図形間を結線する
Further, the symbol figure connecting means 5 retrieves the symbol figures and their arrangement takes stored in the symbol figure rearrangement data storage means 4, and connects these symbol figures.

以」二説明したように、本実施例の回路図データ処理方
式は、きれいて見やすい回路図が出力できる回路図デー
タを能率良く作成できる。  “〔発明の効果〕 以上説明したように、本発明の回路図データ処理方式は
、きれいて見やすい回路図が出力できる回路図データを
能率良く作成できるという効果を有している。
As explained above, the circuit diagram data processing method of this embodiment can efficiently create circuit diagram data that can output a clean and easy-to-read circuit diagram. [Effects of the Invention] As explained above, the circuit diagram data processing method of the present invention has the effect of efficiently creating circuit diagram data that can output a clean and easy-to-read circuit diagram.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の回路図データ処理方式の一実施例を示
ずブロック図、第2図はシンボル図形整列手段の動作の
一例を示す流れ図、第3図は入力されCR,T画面上に
配置されたシンボル図形の一例を示す画面情報図、第4
図は縦方向に整列されたシンボル図形の一例を示す画面
情報図である。 1 ・・・シンボル図形入力配置手段、2・・・・・シ
ンボル図形配置データ記憶手段、3・・・・・シ〉・ポ
ル図形整列手段、4 ・・・・シシ・ポル図形再配置デ
ータ記憶手段、5・・・・・シンボル図形結線手段、a
、b。 C・・・・・・シンボル図形。
Fig. 1 is a block diagram showing an embodiment of the circuit diagram data processing method of the present invention, Fig. 2 is a flowchart showing an example of the operation of the symbol figure arrangement means, and Fig. 3 is a block diagram showing an example of the operation of the symbol figure arrangement means. Screen information diagram showing an example of arranged symbol figures, 4th
The figure is a screen information diagram showing an example of symbol figures arranged in the vertical direction. 1...Symbol figure input arrangement means, 2...Symbol figure arrangement data storage means, 3...Shi>Pol figure arrangement means, 4...ShishiPol figure rearrangement data storage Means, 5...Symbol figure connection means, a
,b. C...Symbol figure.

Claims (1)

【特許請求の範囲】 (A)回路機能を表わす複数のシンボル図形を入力して
、画面上に配置するシンボル図形入力配置手段、 (B)前記シンボル図形入力配置手段で画面上に配置さ
れたシンボル図形とその配置データをファイルに記憶す
るシンボル図形配置データ記憶手段、 (C)前記シンボル図形配置データ記憶手段に記憶され
たシンボル図形とその配置データを取出し、それらのシ
ンボル図形を整列させて再配置するシンボル図形整列手
段、 (D)前記シンボル図形整列手段で整列状に再配置され
たシンボル図形とその再配置データをファイルに記憶す
るシンボル図形再配置データ記憶手段、 を備えることを特徴とする回路図データ処理方式。
[Scope of Claims] (A) Symbol figure input arrangement means for inputting a plurality of symbol figures representing circuit functions and arranging them on the screen; (B) Symbols arranged on the screen by the symbol figure input arrangement means. symbol figure arrangement data storage means for storing figures and their arrangement data in a file; (C) retrieves the symbol figures and their arrangement data stored in the symbol figure arrangement data storage means, aligns and rearranges the symbol figures; (D) symbol figure rearrangement data storage means for storing symbol figures rearranged in an aligned manner by the symbol figure rearrangement means and their rearrangement data in a file. Figure data processing method.
JP63002317A 1988-01-07 1988-01-07 System for processing circuit diagram data Pending JPH01177679A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63002317A JPH01177679A (en) 1988-01-07 1988-01-07 System for processing circuit diagram data

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63002317A JPH01177679A (en) 1988-01-07 1988-01-07 System for processing circuit diagram data

Publications (1)

Publication Number Publication Date
JPH01177679A true JPH01177679A (en) 1989-07-13

Family

ID=11525953

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63002317A Pending JPH01177679A (en) 1988-01-07 1988-01-07 System for processing circuit diagram data

Country Status (1)

Country Link
JP (1) JPH01177679A (en)

Similar Documents

Publication Publication Date Title
JPH01177679A (en) System for processing circuit diagram data
JPS62113277A (en) Component information controller
JP3729755B2 (en) Screen conversion device and screen conversion method
JP2763657B2 (en) Figure database management method
CN113467985A (en) Function checking method and device, electronic equipment and storage medium
JPH09245064A (en) Component registration system
JPH0667955A (en) Data file editing system
JP2637208B2 (en) Graphic processing system
JPH04195580A (en) Device for forming index term file
JPH0314170A (en) Business form generating device
JPH04344976A (en) Drawing preparing device
JPH02187823A (en) Automatic correcting system for original program
JPH1124908A (en) Automatic software generating device
JPS62232019A (en) Input system for mixed information of alpha-numeric and japanese language
JPH04280301A (en) Control program design support system
JPH01217560A (en) Telegraphic message editing processor
JPH0728870A (en) Cad system provided with means for grouping and editing graphic data
JPS5854416A (en) Operating method of computer
JPH06175804A (en) Data change screen recognizing system
JPH04127374A (en) Interactive parametric graphic processing method
JPH07249056A (en) Graphic processor
JPH10143592A (en) Report preparation device provided with connection repetitive frame and connection repetitive frame generation method
JPH04302324A (en) Field arranging method in generation of interactive picture
JPH03263103A (en) Preparation system for parts constitution table
JPH0241559A (en) Function selecting system