JPH01177625U - - Google Patents
Info
- Publication number
- JPH01177625U JPH01177625U JP7392288U JP7392288U JPH01177625U JP H01177625 U JPH01177625 U JP H01177625U JP 7392288 U JP7392288 U JP 7392288U JP 7392288 U JP7392288 U JP 7392288U JP H01177625 U JPH01177625 U JP H01177625U
- Authority
- JP
- Japan
- Prior art keywords
- signal
- intermediate frequency
- circuit
- converter
- positive
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000003321 amplification Effects 0.000 claims description 5
- 238000003199 nucleic acid amplification method Methods 0.000 claims description 5
- 238000010586 diagram Methods 0.000 description 3
- 238000001514 detection method Methods 0.000 description 1
Description
第１図はこの考案の一実施例による電源回路を
用いたＢＳコンバータの回路図、第２図は従来の
ＢＳコンバータの回路図、第３図は第１図および
第２図における高周波増幅回路１のＦＥＴの特性
を示す図である。
１……高周波増幅回路、４……中間周波増幅回
路、２０……局部発振器、１０……基準発振器、
６……検波回路、２２……信号出力端兼電源供給
端。
Fig. 1 is a circuit diagram of a BS converter using a power supply circuit according to an embodiment of the invention, Fig. 2 is a circuit diagram of a conventional BS converter, and Fig. 3 is a high-frequency amplifier circuit 1 in Figs. 1 and 2. FIG. 3 is a diagram showing the characteristics of FET. 1...High frequency amplification circuit, 4...Intermediate frequency amplification circuit, 20...Local oscillator, 10...Reference oscillator,
6...Detection circuit, 22...Signal output terminal and power supply terminal.
Claims (1)
あつて、ＦＥＴを増幅素子とし、正および負の電
源によつて増幅動作する高周波増幅回路と、ＰＬ
Ｌ制御回路によつて制御された局部発振器と、前
記高周波増幅回路の出力信号と前記局部発振器の
出力信号とを混合して中間周波信号を出力する混
合器と、前記中間周波信号を増幅して出力する中
間周波増幅回路とからなるＢＳコンバータにおい
て、前記ＢＳコンバータの信号出力線路に重畳し
て前記正および負のいずれか一方の電源が供給さ
れ、前記ＰＬＬ制御回路に位相基準信号を供給す
る基準発振器の出力信号の一部を整流して、前記
正および負のいずれか他方の電源を得ることを特
徴とするＢＳコンバータの電源回路。 A high-frequency amplification circuit that amplifies and outputs a BS signal, uses an FET as an amplification element, and operates by positive and negative power supplies, and a PL.
a local oscillator controlled by an L control circuit; a mixer that mixes the output signal of the high frequency amplifier circuit and the output signal of the local oscillator to output an intermediate frequency signal; and a mixer that amplifies the intermediate frequency signal. In a BS converter comprising an intermediate frequency amplification circuit that outputs an intermediate frequency, one of the positive and negative power supplies is supplied superimposed on a signal output line of the BS converter, and a standard for supplying a phase reference signal to the PLL control circuit. A power supply circuit for a BS converter, characterized in that a part of an output signal of an oscillator is rectified to obtain the other of the positive and negative power supplies.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7392288U JPH01177625U (en) | 1988-06-03 | 1988-06-03 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7392288U JPH01177625U (en) | 1988-06-03 | 1988-06-03 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01177625U true JPH01177625U (en) | 1989-12-19 |
Family
ID=31299047
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7392288U Pending JPH01177625U (en) | 1988-06-03 | 1988-06-03 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01177625U (en) |
-
1988
- 1988-06-03 JP JP7392288U patent/JPH01177625U/ja active Pending
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