JPH01172154U - - Google Patents
Info
- Publication number
- JPH01172154U JPH01172154U JP6665388U JP6665388U JPH01172154U JP H01172154 U JPH01172154 U JP H01172154U JP 6665388 U JP6665388 U JP 6665388U JP 6665388 U JP6665388 U JP 6665388U JP H01172154 U JPH01172154 U JP H01172154U
- Authority
- JP
- Japan
- Prior art keywords
- memory
- terminals
- switch
- control signal
- generation circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Techniques For Improving Reliability Of Storages (AREA)
- Test And Diagnosis Of Digital Computers (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6665388U JPH01172154U (en:Method) | 1988-05-20 | 1988-05-20 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6665388U JPH01172154U (en:Method) | 1988-05-20 | 1988-05-20 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01172154U true JPH01172154U (en:Method) | 1989-12-06 |
Family
ID=31292051
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6665388U Pending JPH01172154U (en:Method) | 1988-05-20 | 1988-05-20 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01172154U (en:Method) |
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1988
- 1988-05-20 JP JP6665388U patent/JPH01172154U/ja active Pending