JPH01171385A - Digital television video signal processor - Google Patents

Digital television video signal processor

Info

Publication number
JPH01171385A
JPH01171385A JP62331804A JP33180487A JPH01171385A JP H01171385 A JPH01171385 A JP H01171385A JP 62331804 A JP62331804 A JP 62331804A JP 33180487 A JP33180487 A JP 33180487A JP H01171385 A JPH01171385 A JP H01171385A
Authority
JP
Japan
Prior art keywords
signal
blanking
data
blanking period
blk
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62331804A
Other languages
Japanese (ja)
Inventor
Masashi Onozato
小野里 正志
Masakazu Tsuji
正和 辻
Tomoe Shikina
識名 朝恵
Takeo Tsutsui
健夫 筒井
Masatoshi Yorozu
萬 政俊
Yutaka Tanaka
豊 田中
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Japan Broadcasting Corp
Original Assignee
NEC Corp
Nippon Hoso Kyokai NHK
Japan Broadcasting Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Hoso Kyokai NHK, Japan Broadcasting Corp filed Critical NEC Corp
Priority to JP62331804A priority Critical patent/JPH01171385A/en
Publication of JPH01171385A publication Critical patent/JPH01171385A/en
Pending legal-status Critical Current

Links

Landscapes

  • Processing Of Color Television Signals (AREA)
  • Color Television Systems (AREA)

Abstract

PURPOSE:To execute an exact blanking processing by providing a circuit to switch a Y signal to a constant value, which is smaller than a pedestal level, in correspondence to a signal to show a blanking period and integrating the value of data, which show the blanking period, into picture data. CONSTITUTION:A video input signal 1 is converted to the PCM data of 8 bits, for example, by an A/D 2. In a blanking period generator 11, a blanking(BLK) control signal 14 to be synchronized to the video input and to express the blanking period is obtained from vertical phase information 12 and a clock 13. A selector 7 is operated by the BLK control signal 14 and the BLK data from a BLK data generator 8 are padded into the Y signal after being black- clipped. Here, the BLK data are obtained as a 3B (16-ary). Since there is no value of <3C for the Y signal by a black clip 6, the period of the value 3B can be easily and securely detected with the blanking period.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明はデジタルテレビジョン映像信号処理装置に関し
、特にブランキング期間の処理技術に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a digital television video signal processing device, and particularly to a blanking period processing technique.

〔従来の技術〕[Conventional technology]

従来、テレビジョン映像信号をデジタル信号(PCMデ
ータ)に変換した映像データを処理する装置において、
画像のシフトが伴うとき映像期間ではないブランキング
期間が処理の対象になっていくことがあり、このような
場合には処理を中止させる必要があった。この処理を中
止させるためには、それぞれ処理中止を必要とする回路
でのブランキング位相を系統の中での遅延量から算出し
て個別にブランキング位相をつくりあげ、これを処理中
止の制御信号としていた。
Conventionally, in a device that processes video data obtained by converting a television video signal into a digital signal (PCM data),
When an image shift is involved, the blanking period, which is not the video period, may become the subject of processing, and in such a case, it is necessary to stop the processing. In order to stop this processing, the blanking phase of each circuit that requires processing to be stopped is calculated from the amount of delay in the system, a blanking phase is created individually, and this is used as a control signal to stop processing. there was.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

従来のこのような方法では映像データの処理のルートが
多くなればなるほど、またブランキング期間の処理の中
止が必要な部分が多くなればなるほど、それぞれの部分
でブランキング位相をつくる回路が増加していき、膨大
なものとなってくる欠点がある。
In conventional methods, the more routes there are to process video data, and the more parts need to stop processing during the blanking period, the more circuits that create the blanking phase in each part increase. As time goes by, there are many drawbacks.

〔問題点を解決するための手段〕[Means for solving problems]

本発明においては、ブランキング期間を示すデータの値
を映像データ内に組み入れることより、それぞれの処理
回路でこのデータ値を読み取ることでブランキング位相
を検知することができ、多くの映像データ処理ルートが
あっても、簡単にしかも正確に中止処理ができる。
In the present invention, by incorporating the data value indicating the blanking period into the video data, the blanking phase can be detected by reading this data value in each processing circuit, and many video data processing routes can be used. Even if there is a problem, cancellation processing can be easily and accurately performed.

特に、動きベクトル値を使用した画像処理に於てはフィ
ールド毎にベクトル値が変化するため、従来においては
、正確なブランキング位相を得ることは不可能であった
が、本発明では映像データとブランキング情報とは常に
一体となるので正確なブランキング処理ができる。
In particular, in image processing using motion vector values, the vector values change for each field, so in the past it was impossible to obtain an accurate blanking phase. Since it is always integrated with the blanking information, accurate blanking processing can be performed.

〔実施例〕〔Example〕

次に、本発明について図面により説明する。第1図は本
発明の一実施例を示す図であり、映像入力信号1はA/
D2により例えば8ビツトのPCMデータに変換され、
Y/C分離回路3によりルミナンス信号4とクロマ信号
5に分離される。ルミナンス信号(以下Y信号と称す)
はブラッククリップ6に於てプデスタルレベルに相当す
るPCMデータの30(16進)以下の値は全て30に
おきかえられる。
Next, the present invention will be explained with reference to the drawings. FIG. 1 is a diagram showing an embodiment of the present invention, in which a video input signal 1 is an A/
For example, it is converted to 8-bit PCM data by D2,
The Y/C separation circuit 3 separates the signal into a luminance signal 4 and a chroma signal 5. Luminance signal (hereinafter referred to as Y signal)
In the black clip 6, all values below 30 (hexadecimal) of the PCM data corresponding to the pudestal level are replaced with 30.

一方映像入力から同期分離回路9により、水平位相と垂
直位相情報12が得られる。またクロック発生器10に
よりクロック信号13が得られる。ブランキング期間発
生器11では水平、垂直位相情報12とクロック信号1
3から映像入力に同期してブランキング期間を表すブラ
ンキング(ELK)制御信号14を得る。BLK制御信
号14によりセレクタ7が動作させられ、ブラッククリ
ップされた後のY信号にブランキングデータ発生器8か
らのブランキングデータがうめ込まれる。ここでブラン
キングデータ(BLK値)は例えば3B(16進)とす
る。Y信号はブラッククリップ6によ03C未満の値は
なくなっているので、3Bの値の期間がブランキング期
間と簡単にしかも確実に検知できる。
On the other hand, the synchronization separation circuit 9 obtains horizontal phase and vertical phase information 12 from the video input. A clock signal 13 is also obtained by the clock generator 10. The blanking period generator 11 includes horizontal and vertical phase information 12 and a clock signal 1.
3, a blanking (ELK) control signal 14 representing a blanking period is obtained in synchronization with the video input. The selector 7 is operated by the BLK control signal 14, and the blanking data from the blanking data generator 8 is embedded in the Y signal after black clipping. Here, the blanking data (BLK value) is, for example, 3B (hexadecimal). Since the Y signal has no values less than 03C due to the black clip 6, the period of the value 3B can be easily and reliably detected as the blanking period.

第2図に本発明を使用した動きベクトルを用いたフレー
ム数変換処理を示す。ここで、クロマ信号とルミナンス
信号は同一処理であるのでルミナンス信号についてのみ
述べる。図でBLK値すげ替え後のルミナンス信号i 
5 (y+)はフレーム遅延回路16を通過した1フレ
ーム前のルミナンス信号17(Y2)と比較され、動き
ベクトル値検出回路18で移動の方向とその大きさが求
められる。フレーム数変換に於てはY1信号とY2信号
の間の信号を求める処理が必要となり、またY1信号と
Y2信号の時間差及び求めるフレーム数変換後の時間関
係はあらかじめ決められているから、位相変換回路20
においては検出回路18で求めたベクトル値19 (V
l)を使用して第3図に示すようにY1信号をVIXk
だけ移動させ、Y2信号を(−Vl)x (t−k)だ
け移動させる動作を行った後加算し、出力21(Y3)
を得ることができる。
FIG. 2 shows frame number conversion processing using motion vectors according to the present invention. Here, since the chroma signal and the luminance signal are processed in the same way, only the luminance signal will be described. In the figure, luminance signal i after BLK price change
5 (y+) is compared with the luminance signal 17 (Y2) of one frame before, which has passed through the frame delay circuit 16, and the motion vector value detection circuit 18 determines the direction of movement and its magnitude. Frame number conversion requires processing to obtain a signal between the Y1 signal and Y2 signal, and since the time difference between the Y1 signal and Y2 signal and the time relationship after the desired frame number conversion are determined in advance, phase conversion is required. circuit 20
In this case, the vector value 19 (V
l) to convert the Y1 signal to VIXk as shown in Figure 3.
After moving the Y2 signal by (-Vl) x (t-k), the output is 21 (Y3).
can be obtained.

しかし位相変換回路20に於ては元々の画像を移動させ
ているのであるから画像データの端ではブランキングが
出て来てしまう。そこでブランキング情報としてうめ込
んだ3B(16進)の値が出てきたら位相変換回路20
でこれを検出しBLK1信号(22)として出力する。
However, since the phase conversion circuit 20 moves the original image, blanking occurs at the edges of the image data. When the 3B (hexadecimal) value embedded as blanking information appears, the phase conversion circuit 20
This is detected and output as a BLK1 signal (22).

第2図の処理においては、BLKI信号によりY115
とY217とを単純に加算した結果を用いるため加算回
路23の出力をセレクタ24で選択する。これにより画
像の端もブランキングが出力されることのないフレーム
数変換処理を行うことができる。
In the process shown in Fig. 2, Y115 is set by the BLKI signal.
In order to use the result of simply adding Y217 and Y217, the output of the adder circuit 23 is selected by the selector 24. This allows frame number conversion processing to be performed without outputting blanking even at the edges of the image.

〔発明の効果〕〔Effect of the invention〕

実施例で示したように動きベクトル値によって処理画像
のブランキング位相が変化するが、このブランキング期
間を従来のように外部回路で得ようとすれば映像データ
系と同じ回路が必要となる。しかし本発明によれば、映
像データにブランキング情報がうめ込まれているので移
動後の映像データからブランキング期間を取り出すこと
ができ、動きベクトルに応じた画像処理が含まれる場合
でも回路構成が簡単になる効果がある。
As shown in the embodiment, the blanking phase of the processed image changes depending on the motion vector value, but if this blanking period is to be obtained by an external circuit as in the past, the same circuit as the video data system is required. However, according to the present invention, since the blanking information is embedded in the video data, the blanking period can be extracted from the video data after movement, and the circuit configuration can be simplified even when image processing according to the motion vector is included. It has the effect of making it easier.

【図面の簡単な説明】 第1図は本発明の一実施例を示す図、第2図はフレーム
数変換回路に本発明が応用された場合を示す図、第3図
はフレーム数変換処理に於ける求める画像の時間関係を
示す図。 代理人 弁理士  内 原   音 箭づ図
[Brief Description of the Drawings] Fig. 1 is a diagram showing an embodiment of the present invention, Fig. 2 is a diagram showing a case where the present invention is applied to a frame number conversion circuit, and Fig. 3 is a diagram showing a case where the present invention is applied to a frame number conversion circuit. FIG. Agent: Patent Attorney Otozuzu Uchihara

Claims (1)

【特許請求の範囲】[Claims] 入力テレビジョン映像信号をA/D変換し、PCM画像
データとした後Y/C分離を行い映像データの処理を行
う装置に於て、Y信号をペデスタルの値でブラッククリ
ップする回路と、入力テレビジョン映像信号に同期して
ブランキング期間を示す信号の発生器と、得られたブラ
ンキング期間を示す信号に応じてY信号をペデスタルレ
ベルより小さい一定の値にすげ替える回路とを具備し、
映像処理を行うときY信号に含まれる前記一定の値によ
りブランキング期間を検出できるようにしたデジタルテ
レビジョン映像信号処理装置。
In a device that A/D converts an input television video signal, converts it into PCM image data, performs Y/C separation, and processes the video data, a circuit that black clips the Y signal with a pedestal value, and an input television a generator for generating a signal indicating a blanking period in synchronization with a video video signal; and a circuit for changing the Y signal to a constant value smaller than the pedestal level in accordance with the obtained signal indicating the blanking period;
A digital television video signal processing device capable of detecting a blanking period based on the constant value included in the Y signal when performing video processing.
JP62331804A 1987-12-25 1987-12-25 Digital television video signal processor Pending JPH01171385A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62331804A JPH01171385A (en) 1987-12-25 1987-12-25 Digital television video signal processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62331804A JPH01171385A (en) 1987-12-25 1987-12-25 Digital television video signal processor

Publications (1)

Publication Number Publication Date
JPH01171385A true JPH01171385A (en) 1989-07-06

Family

ID=18247825

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62331804A Pending JPH01171385A (en) 1987-12-25 1987-12-25 Digital television video signal processor

Country Status (1)

Country Link
JP (1) JPH01171385A (en)

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