JPH01165997U - - Google Patents
Info
- Publication number
- JPH01165997U JPH01165997U JP1988061666U JP6166688U JPH01165997U JP H01165997 U JPH01165997 U JP H01165997U JP 1988061666 U JP1988061666 U JP 1988061666U JP 6166688 U JP6166688 U JP 6166688U JP H01165997 U JPH01165997 U JP H01165997U
- Authority
- JP
- Japan
- Prior art keywords
- rom
- writing
- dynamic ram
- refresh signal
- stopping
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 claims description 3
- 238000013500 data storage Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 5
- 238000000034 method Methods 0.000 description 3
Landscapes
- Dram (AREA)
Description
第１図は、本考案の一実施例の外観を示す図、
第２図は、上記実施例の回路構成を示す図、第３
図は第２図におけるＲＡＭ１８ｂの構成を示す図
、第４図は、第２図におけるＰＲＯＭ２２の構成
を示す図、第５図は上記実施例の動作の概要を示
すジエネラルフローチヤート、第６図は第５図に
おける録音処理を詳細に示すフローチヤート、第
７図は第５図における再生処理を詳細に示すフロ
ーチヤート、第８図は第５図における書込処理を
詳細に示すフローチヤートである。
１……本体ケース、１１……マイクロホン、１
２，１６……増幅器、１３，１５……フイルタ、
１４……音声録再ＬＳＩ、１７……スピーカ、１
８……ＣＰＵ、１８ａ……プログラム記憶ＲＯＭ
、１８ｂ，２１……ＲＡＭ、１９……スイツチ部
、２０……リフレツシユ回路部、２０ｃ……リフ
レツシユ信号発生回路、２０ｄ……カウンタ、２
２……ＰＲＯＭ、２３……録音用電源、２４……
再生用電源、Ｓ１，Ｓ２，Ｓ２０……再生キー、
ＳＲ……録音キー、ＳＷ……書込キー、ＳＤ……
電源キー、Ｌ１，Ｌ２，Ｌ２０……文字記入部、
ｍ，ｉ……データバス、ｌ……アドレスバス。
FIG. 1 is a diagram showing the appearance of an embodiment of the present invention;
Figure 2 is a diagram showing the circuit configuration of the above embodiment, and Figure 3 is a diagram showing the circuit configuration of the above embodiment.
4 is a diagram showing the configuration of the PROM 22 in FIG. 2, FIG. 5 is a general flow chart showing an overview of the operation of the above embodiment, and FIG. 6 is a diagram showing the configuration of the RAM 18b in FIG. 2. is a flowchart showing in detail the recording process in FIG. 5, FIG. 7 is a flowchart showing in detail the playback process in FIG. 5, and FIG. 8 is a flowchart showing in detail the writing process in FIG. . 1...Body case, 11...Microphone, 1
2, 16...Amplifier, 13, 15...Filter,
14...Audio recording/playback LSI, 17...Speaker, 1
8...CPU, 18a...Program storage ROM
, 18b, 21...RAM, 19...Switch section, 20...Refresh circuit section, 20c...Refresh signal generation circuit, 20d...Counter, 2
2...PROM, 23...Recording power supply, 24...
Power supply for reproduction, S 1 , S 2 , S 20 ... reproduction key,
SR...Recording key, SW...Writing key, SD...
Power key, L 1 , L 2 , L 20 ...Character entry section,
m, i...data bus, l...address bus.
Claims (1)
発生するリフレツシユ信号発生回路と、 前記ダイナミツクＲＡＭにデータを記憶するデ
ータ入力手段と、 ＲＯＭと、 前記ダイナミツクＲＡＭのデータを前記ＲＯＭ
に書込む書込手段と、 この書込手段による書込終了後前記リフレツシ
ユ信号発生回路のリフレツシユ信号の発生を停止
する停止手段と、 この停止手段によるリフレツシユ信号停止状態
で前記ＲＯＭからデータを読出す読出手段とを備
えることを特徴とするデータ記憶装置。[Claims for Utility Model Registration] A dynamic RAM, a refresh signal generation circuit for generating a refresh signal for the dynamic RAM, a data input means for storing data in the dynamic RAM, a ROM, and a ROM for storing data in the dynamic RAM. ROM
a writing means for writing into the ROM; a stopping means for stopping the generation of a refresh signal from the refresh signal generation circuit after the writing by the writing means is completed; and a stopping means for reading data from the ROM while the refreshing signal is stopped by the stopping means. A data storage device comprising: reading means.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1988061666U JPH0743839Y2 (en) | 1988-05-12 | 1988-05-12 | Data storage |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1988061666U JPH0743839Y2 (en) | 1988-05-12 | 1988-05-12 | Data storage |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH01165997U true JPH01165997U (en) | 1989-11-21 |
| JPH0743839Y2 JPH0743839Y2 (en) | 1995-10-09 |
Family
ID=31287321
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1988061666U Expired - Lifetime JPH0743839Y2 (en) | 1988-05-12 | 1988-05-12 | Data storage |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0743839Y2 (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62226309A (en) * | 1986-03-28 | 1987-10-05 | Fanuc Ltd | Write system for rom cassette in programmable machine controller |
| JPS6337893A (en) * | 1986-07-31 | 1988-02-18 | Oki Electric Ind Co Ltd | Storage device |
-
1988
- 1988-05-12 JP JP1988061666U patent/JPH0743839Y2/en not_active Expired - Lifetime
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62226309A (en) * | 1986-03-28 | 1987-10-05 | Fanuc Ltd | Write system for rom cassette in programmable machine controller |
| JPS6337893A (en) * | 1986-07-31 | 1988-02-18 | Oki Electric Ind Co Ltd | Storage device |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0743839Y2 (en) | 1995-10-09 |
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