JPH01143000U - - Google Patents
Info
- Publication number
- JPH01143000U JPH01143000U JP1988037830U JP3783088U JPH01143000U JP H01143000 U JPH01143000 U JP H01143000U JP 1988037830 U JP1988037830 U JP 1988037830U JP 3783088 U JP3783088 U JP 3783088U JP H01143000 U JPH01143000 U JP H01143000U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- audio data
- data storage
- power supply
- inhibition
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000015572 biosynthetic process Effects 0.000 claims description 5
- 238000013500 data storage Methods 0.000 claims description 5
- 238000003786 synthesis reaction Methods 0.000 claims description 5
- 230000005764 inhibitory process Effects 0.000 claims 3
- 238000010586 diagram Methods 0.000 description 1
Description
第１図は本考案の一実施例を示したブロツク図
、第２図は第１図の動作を説明するためのタイム
チヤートである。
３……音声データ記憶回路、４……音声分析合
成回路、５……禁止回路、６……ゲート回路、７
……補助電源。
FIG. 1 is a block diagram showing an embodiment of the present invention, and FIG. 2 is a time chart for explaining the operation of FIG. 3...Speech data storage circuit, 4...Speech analysis and synthesis circuit, 5...Prohibition circuit, 6...Gate circuit, 7
...Auxiliary power supply.
Claims (1)
路と、 この音声データ記憶回路に対して音声データの
書込みおよび読出しを行ない、且つ電源投入時の
イニシヤライズ動作において上記音声データ記憶
回路の内容を書き換える音声分析合成回路と、 この音声分析合成回路によるイニシヤライズ動
作期間は禁止信号を発生する禁止回路と、 この禁止回路からの禁止信号によつて上記音声
分析合成回路による上記音声データ記憶回路の内
容の書換え動作を禁止するゲート回路と、 省電力モードにおいて上記音声データ記憶回路
に電力を供給するための補助電源と、 を具備し、上記省電力モードにおいては上記音
声分析合成回路への電力の供給を遮断しておくこ
とを特徴とする音声録音再生装置。[Claims for Utility Model Registration] An audio data storage circuit that stores arbitrary audio data, and an audio data storage circuit that writes and reads audio data to and from the audio data storage circuit, and that stores the audio data in an initialization operation when the power is turned on. a speech analysis and synthesis circuit that rewrites the contents of the circuit; an inhibition circuit that generates an inhibition signal during the initialization period of the speech analysis and synthesis circuit; and a prohibition signal from the inhibition circuit that causes the speech analysis and synthesis circuit to store the audio data. A gate circuit that prohibits rewriting of the contents of the circuit; and an auxiliary power supply for supplying power to the audio data storage circuit in the power saving mode, and in the power saving mode, the power supply to the audio analysis and synthesis circuit is provided. A voice recording and playback device characterized by cutting off power supply.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1988037830U JPH01143000U (en) | 1988-03-23 | 1988-03-23 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1988037830U JPH01143000U (en) | 1988-03-23 | 1988-03-23 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01143000U true JPH01143000U (en) | 1989-09-29 |
Family
ID=31264404
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1988037830U Pending JPH01143000U (en) | 1988-03-23 | 1988-03-23 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01143000U (en) |
-
1988
- 1988-03-23 JP JP1988037830U patent/JPH01143000U/ja active Pending
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