JPH01165632U - - Google Patents

Info

Publication number
JPH01165632U
JPH01165632U JP6195288U JP6195288U JPH01165632U JP H01165632 U JPH01165632 U JP H01165632U JP 6195288 U JP6195288 U JP 6195288U JP 6195288 U JP6195288 U JP 6195288U JP H01165632 U JPH01165632 U JP H01165632U
Authority
JP
Japan
Prior art keywords
chip
mounts
base surface
stem
mount base
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6195288U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP6195288U priority Critical patent/JPH01165632U/ja
Publication of JPH01165632U publication Critical patent/JPH01165632U/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/75—Apparatus for connecting with bump connectors or layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は本考案の一実施例を示す斜視図、第２
図イ〜ニは本考案の動作説明図、第３図は従来例
を示す斜視図、第４図イ〜ニは従来例の動作説明
図である。 １……クランプ爪、２……チツプ、３……ソル
ダー、４……マウントベース、５……押え板。 Fig. 1 is a perspective view showing one embodiment of the present invention;
Figures I to D are explanatory diagrams of the operation of the present invention, Figure 3 is a perspective view showing the conventional example, and Figures 4 I to D are explanatory diagrams of the operation of the conventional example. 1... Clamp claw, 2... Chip, 3... Solder, 4... Mount base, 5... Holding plate.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] ステムのマウントベース面にチツプをマウント
するチツプマウンターにおいて、チツプの側面を
クランプして該チツプをステムのマウントベース
面に降下マウントするクランプ爪と、該クランプ
爪にてマウントされたチツプをマウントベース面
に圧着させる押え板とを有することを特徴とする
チツプマウンター。 A chip mounter that mounts a chip on the mount base surface of a stem includes a clamp claw that clamps the side of the chip and lowers and mounts the chip on the mount base surface of the stem, and a clamp claw that lowers and mounts the chip on the mount base surface of the stem. A chip mounter characterized by having a presser plate for crimping the chip mounter.
JP6195288U 1988-05-11 1988-05-11 Pending JPH01165632U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6195288U JPH01165632U (en) 1988-05-11 1988-05-11

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6195288U JPH01165632U (en) 1988-05-11 1988-05-11

Publications (1)

Publication Number Publication Date
JPH01165632U true JPH01165632U (en) 1989-11-20

Family

ID=31287589

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6195288U Pending JPH01165632U (en) 1988-05-11 1988-05-11

Country Status (1)

Country Link
JP (1) JPH01165632U (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010027841A (en) * 2008-07-18 2010-02-04 Precise Gauges Co Ltd Electronic component mounting apparatus
CN102858094A (en) * 2011-06-28 2013-01-02 住友电气工业株式会社 Mounting method, mounting device and mounting jig

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010027841A (en) * 2008-07-18 2010-02-04 Precise Gauges Co Ltd Electronic component mounting apparatus
CN102858094A (en) * 2011-06-28 2013-01-02 住友电气工业株式会社 Mounting method, mounting device and mounting jig
JP2013010156A (en) * 2011-06-28 2013-01-17 Sumitomo Electric Ind Ltd Mounting method, mounting device and mounting jig

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