JPH01163839A - Test program execution method for cpu - Google Patents

Abstract

PURPOSE:To omit a useless confirming time by attaining an execution without an abnormal end in the middle even when a user, etc., erroneously designate the model of a CPU or an execution mode and a catalogued test program (TMP) corresponding thereto. CONSTITUTION:When an operator erroneously designates a catalog or the TMP which is different from the CPU model of a CPU 2 or the program execution mode at the time of the action confirmation of the CPU 2, the comparison and checking of them with the CPU model automatically designated by catalog information 6 before the TMP execution or the program execution mode is carried out. The TMP is executed at the time of consistency, and at the time of inconsistency, a message is outputted through an operator input/output device 1 in order to notify the operator of the inconsistency. Consequently, the abnormal end in the middle of the execution of the TMP does not occur. Thus, the useless time for a cause investigation or a catalog re-execution, etc., can be prevented from being wasted.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a method for executing a test program for a CPU, and in particular, the present invention relates to a method for executing a test program for a CPU, and in particular, the present invention relates to a method for executing a test program for a CPU. This invention relates to a method for executing a test program that can be executed without abnormally terminating in the middle even if it is specified incorrectly.

[Conventional technology]

In general, there are various models and program execution modes for CPUs.
(abbreviated as P) are usually created corresponding to these. Also, these TMPs.

They are aggregated and cataloged in TMP units that are executed in the same mode.

A conventional method for executing a test program for a CPU is disclosed in, for example, Japanese Patent Laid-Open No. 14351/1983.

and r described in JP-A No. 60-14353, etc.
A data processing system testing method and apparatus J is proposed.

FIG. 2 is an explanatory diagram showing an example of these conventional test methods.

In Figure 2, 1 is an operator input/output device, 2 is a CP
U, 3 is catalog file, 4 is catalog information, 5 is T
It is an MP file.

When performing an operation check on a certain CPU 2, the operator uses his/her own knowledge to obtain the model and program execution mode of the CPU 2, and then creates a series of TMs corresponding to these.
One of the catalog files 3 in which the P group is registered is selected, and input for designation is made from the operator input/output device 1. As another designation method, it is also possible to designate a TMP that is not registered in the catalog file 3 alone.

The input specified TMP is sequentially TMP according to catalog information 4.
It is input to the CPU 2 from the MP file 5 and executed sequentially. Note that another method for inputting the TMP to the CPU 2 is to input each catalog into the main memory of the CPU 2 at once, and then sequentially read them from the main memory and execute them, but the details are omitted here. do.

In addition, TMP specified alone as described above is TMP
After being input directly to the CPU 2 from the file 5, it is executed.

Further, in FIG. 2, the catalog file 3 and the TMP file 5 are shown as separate volumes, but in this case, of course, there is no problem even if they are the same volume. Second
In the figure, model -■ is specified as the CPU model, and ml is specified as the execution mode.

[Problem that the invention seeks to solve]

For users, operators often specify the execution mode of TMP incorrectly, so TMP
An abnormal termination occurred during execution. Normally, if you specify the execution mode incorrectly and run a catalog, the TMP
It ends abnormally during execution. That is, the conventional T
MP is the CPU model or program execution mode of the CPU to be checked for operation, and the CPU of the TMP to be executed.
No consideration was given to cases where models or program execution modes do not match.

For example, CPU modes include (a) M mode with normal 24-bit addressing, (b) M mode with 26-bit addressing, (c) M/EA mode with 31-bit extended addressing mode, (d) There is an M/Ex mode with extended addressing + extended channel system, and (e)VSE mode.

Most TMPs run in one of the above modes and check the operation in that CPU mode. Therefore, if the vehicle runs in a mode different from that of the TMP, an unexpected failure will occur during the operation check, and it will take more time than expected to take countermeasures.

If an abnormal termination occurs during TMP execution, time is wasted in IJK investigation and catalog re-execution, so it is desirable to develop a TMP that can prevent operational errors during TMP execution. ing.

The purpose of the present invention is to solve such conventional problems, and to solve this problem when the CPU model or program execution mode of the CPU to be checked for operation does not match the CPU model or program execution mode of the TMP to be executed. Automatically detect discrepancies early before TMP execution,
To provide a CPU test program execution method that can notify an operator and eliminate wasteful confirmation time.

[Means for solving problems]

In order to achieve the above object, the CPU test program execution method according to the present invention provides a plurality of catalog groups in which test programs corresponding to the CPU model or program execution mode unit are edited and included in the catalog group. or one of the test programs not included
When specified, an instruction exception interrupt is generated based on the fact that the CPU model or program execution mode and the specified CPU model or program execution mode are different in the usable instruction words for each CPU model and execution mode. The test program is compared and checked before execution, and the program is executed only when the two match, and when there is a mismatch, it is reported.

[For production]

In the present invention, a comparison check between the CPU model or program execution mode and the TMP CPU model or program execution mode is automatically performed before executing the TMP without changing the existing hardware specifications.

In order to perform this automatic check, the CPU model or program execution mode, which is the execution condition of each TMP, is added as the first condition, and the second condition is added.

Before executing that TMP, the CPU of the CPU to be executed
model or program execution mode.

Taking advantage of the fact that usable instruction words differ depending on the CPU model or program execution mode, a series of instruction words are executed, and when a program interrupt due to an instruction exception occurs, a determination is made based on which instruction word it occurs. In this way, the execution mode obtained under the first condition and the CPU mode obtained under the second condition are compared and checked, and if they match, the TMP is executed, and if they do not match, the TMP is executed. The operator is notified of this via the input/output device.

〔Example〕

Hereinafter, one embodiment of the present invention will be described in detail with reference to the drawings.

FIG. 1 is an explanatory diagram of a test program execution method for a CPU showing an embodiment of the present invention, and FIG. 3 is an operation flowchart showing an outline of the operation of FIG. 1.

In the present invention, as shown in FIG. 1, (a) catalog information 6 is enriched to display the CPU model and execution mode for each TMP. (b) Before executing TMP on CPU2, compare the CPU model and program execution mode.
Perform checks.

(c) Execute TMP only when the comparison results in a match.

Note that as a means of detecting the CPU model or program execution mode of the CPU 2, it is possible to provide a bit indicating the execution mode in the prefix area of the main storage device or the control register, etc., but for this purpose, hardware such as providing a logic circuit may be used. An additional amount will be required.

Therefore, in order to be able to detect program execution modes without increasing hardware or changing existing specifications, software The determination is made by executing these instruction words and causing a program interrupt by an instruction exception.

In FIG. 2, when an operator checks the operation of CPU 2 based on a maintenance plan, etc., he first checks the target CPU.
Examine the model and program execution mode (step 30)
1) Next, select a catalog in which a series of TMP groups are registered from among the catalog files 3 (Step 302), specify the selected catalog via the operator input/output device 1 (Step 304), and select this catalog file. Catalog information 6 in 3 includes CPU model or program execution mode information in addition to the TMP name or pointer.

FIG. 4 is a diagram showing an example of the relationship between the catalog name in the catalog file in the first (!!), the CPU mode to which the catalog is applied, and the program execution mode.

Catalog A with the catalog name in Figure 4 is for the case where the CPU model is model -■ and the program execution mode is m.
In the case of □, and the model − ■ is m, the model − ■ is m□,
Model-■ has a TMP group applied to each case of ml. Note that m□ means 24-bit addressing mode, m2 means 26-bit addressing mode, ml means mode with extended channel, and m4 means 31-bit addressing mode.

Returning to FIG. 3, as described above, when the necessary catalogs are designated and input (step 304), TMPs are sequentially read from the TMP file 5 based on the catalog information 6 and input to the CPU 2.

Then, before executing TMP, CPU2
2 CPU model or program execution mode is detected (step 305).

FIG. 5 is an operational flowchart showing a method for detecting a program execution mode according to the present invention.

In the present invention, the CPU 2 takes advantage of the fact that usable command words differ depending on the CPU model or program execution mode, and sequentially executes a series of command words that do not operate in each execution mode unit, as shown in FIG. Then, due to the instruction word that caused the program interrupt due to the instruction exception, the CPU 2's C
Detects the PU model or program execution mode.

For example, assume that mL mode 504 in FIG. 5 indicates M mode, which is an addressing mode of up to 24 bits. In addition, the i-engineering instruction 501 is
rt Storage Key Extend
d) This is an instruction that loads the protection key of the main memory block into a designated general-purpose register within the range of 31-bit addressing, and is an instruction word that cannot be executed in M mode.

An instruction exception program interrupt occurs in the i□ instruction execution 501, and it is determined that the current execution mode is M mode (504).
2 using the Program Mask) instruction.
Addressing modes up to 6 bits can be detected (by executing 12 instructions 502).

The M mode is determined based on the occurrence of an instruction exception) (505).

Also, I S K (I n5art S tora
The extended channel mode can be detected using the ga Key) instruction (by executing the ia instruction 503, the M mode is determined based on the occurrence of an instruction exception) (506).

Returning to FIG. 3, in this way, the CPU model or program execution mode specified by the catalog information 6 is compared and checked (step 305), and if they match, the TMP is executed. 30
6) If there is a mismatch, a message is outputted via the operator input/output device 1 to notify the operator of this fact (step 307). Here, if the cause of the discrepancy is an error in catalog selection, re-enter the correct catalog (steps 308, 309, 304), and if there is an error in the information in the catalog, correct the catalog information (step 310). ), re-enter (step 305)
. In addition, TMPs that are not registered in catalog file 3
is specified alone (steps 311, 312
), compare and check with CPU2 (step 3
05). In this case, the TMP CPU mode or program execution mode is simultaneously instructed when the TMP is instructed by the operator (steps 311 and 3).
12).

If you specified it as a TMP for catalog entry but it is not (step 308), or if you search for a usable TMP that is not catalogued and cannot find it, contact the person in charge of TMP and take countermeasures. (Step 313).

〔Effect of the invention〕

As explained above, according to the present invention, even if the operator mistakenly specifies a catalog or TMP that is different from the CPU model or program execution mode of the CPU when checking the operation of the CPU, the By comparing and checking these and detecting errors at an early stage, the operator is notified, so there is no wasted time, and the software executes unexecutable commands in each execution mode. Since the comparison result is determined by causing a program interrupt of an instruction exception, there is no need to change the existing hardware specifications.

[Brief explanation of the drawing]

Fig. 1 is an explanatory diagram of a CPU test program execution method showing an embodiment of the present invention, Fig. 2 is an explanatory diagram of a conventional test program execution method, and Fig. 3 is an operational overview showing an embodiment of the present invention. FIG. 4 is a diagram showing an example of the catalog in FIG. 1, and FIG. 5 is a flow chart showing a method for detecting a program execution mode according to the present invention. 1: Operator input/output device, 2: CPU, 3: Catalog file, 4: Catalog information, 5: TMP file, 6
:Catalog information.

Claims (1)

[Claims] 1. In a test program execution method for checking the operation of a CPU, a plurality of catalog groups are provided in which test programs corresponding to the CPU model or program execution mode unit are edited, and the catalogs are included or not included in the catalog group. When one of the test programs is selected and specified, the CPU model or program execution mode and the specified CPU model or program execution mode are
Generating an instruction exception interrupt based on the fact that usable instruction words differ depending on each CPU model and execution mode,
A test program execution method for a CPU, characterized by comparing and checking the test programs before executing them, executing the program only when they match, and reporting the fact when they do not match.